Add support for 48 and 64 bit ARC instructions.
gas * config/tc-arc.c (parse_opcode_flags): New function. (find_opcode_match): Move flag parsing code out to new function. Ignore operands marked IGNORE. (build_fake_opcode_hash_entry): New function. (find_special_case_long_opcode): New function. (find_special_case): Lookup long opcodes. * testsuite/gas/arc/nps400-7.d: New file. * testsuite/gas/arc/nps400-7.s: New file. include * opcode/arc.h (MAX_INSN_ARGS): Increase to 16. (struct arc_long_opcode): New structure. (arc_long_opcodes): Declare. (arc_num_long_opcodes): Declare. opcodes * arc-dis.c (struct arc_operand_iterator): New structure. (find_format_from_table): All the old content from find_format, with some minor adjustments, and parameter renaming. (find_format_long_instructions): New function. (find_format): Rewritten. (arc_insn_length): Add LSB parameter. (extract_operand_value): New function. (operand_iterator_next): New function. (print_insn_arc): Use new functions to find opcode, and iterator over operands. * arc-opc.c (insert_nps_3bit_dst_short): New function. (extract_nps_3bit_dst_short): New function. (insert_nps_3bit_src2_short): New function. (extract_nps_3bit_src2_short): New function. (insert_nps_bitop1_size): New function. (extract_nps_bitop1_size): New function. (insert_nps_bitop2_size): New function. (extract_nps_bitop2_size): New function. (insert_nps_bitop_mod4_msb): New function. (extract_nps_bitop_mod4_msb): New function. (insert_nps_bitop_mod4_lsb): New function. (extract_nps_bitop_mod4_lsb): New function. (insert_nps_bitop_dst_pos3_pos4): New function. (extract_nps_bitop_dst_pos3_pos4): New function. (insert_nps_bitop_ins_ext): New function. (extract_nps_bitop_ins_ext): New function. (arc_operands): Add new operands. (arc_long_opcodes): New global array. (arc_num_long_opcodes): New global. * arc-nps400-tbl.h: Add comments referencing arc_long_opcodes.
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10 changed files with 1030 additions and 163 deletions
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@ -25,7 +25,7 @@
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#define OPCODE_ARC_H
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#ifndef MAX_INSN_ARGS
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#define MAX_INSN_ARGS 8
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#define MAX_INSN_ARGS 16
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#endif
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#ifndef MAX_INSN_FLGS
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unsigned char flags[MAX_INSN_FLGS + 1];
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};
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/* Structure used to describe 48 and 64 bit instructions. */
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struct arc_long_opcode
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{
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/* The base instruction is either 16 or 32 bits, and is described like a
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normal instruction. */
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struct arc_opcode base_opcode;
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/* The template value for the 32-bit LIMM extension. Used by the
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assembler and disassembler in the same way as the 'opcode' field of
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'struct arc_opcode'. */
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unsigned limm_template;
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/* The mask value for the 32-bit LIMM extension. Used by the
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disassembler just like the 'mask' field in 'struct arc_opcode'. */
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unsigned limm_mask;
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/* Array of operand codes similar to the 'operands' array in 'struct
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arc_opcode'. These operands are used to fill in the LIMM value. */
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unsigned char operands[MAX_INSN_ARGS + 1];
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};
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extern const struct arc_long_opcode arc_long_opcodes[];
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extern const unsigned arc_num_long_opcodes;
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/* The table itself is sorted by major opcode number, and is otherwise
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in the order in which the disassembler should consider
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instructions. */
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