FreeChainXenon/binutils-gdb
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Remove high bit set characters

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gas/
	* doc/c-lm32.texi: Fix chars with high bit set.
	* testsuite/gas/bfin/vector2.s: Likewise.
gold/
	* arm.cc: Fix comment chars with high bit set.
include/
	* coff/pe.h: Fix comment chars with high bit set.
	* opcode/xgate.h: Likewise.
ld/
	* testsuite/ld-scripts/sysroot-prefix.exp: Fix chars with high bit set.
This commit is contained in:
Alan Modra 2016-12-21 19:13:52 +10:30
parent 9962fe293d
commit 4e25adb395
10 changed files with 40 additions and 22 deletions
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16
include/opcode/xgate.h
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@ -29,14 +29,14 @@
#define XGATE_C_BIT 0x01 /* XGC - Carry Flag */
/* Access Detail Notation
V — Vector fetch: always an aligned word read, lasts for at least one RISC core cycle
P — Program word fetch: always an aligned word read, lasts for at least one RISC core cycle
r — 8-bit data read: lasts for at least one RISC core cycle
R — 16-bit data read: lasts for at least one RISC core cycle
w — 8-bit data write: lasts for at least one RISC core cycle
W — 16-bit data write: lasts for at least one RISC core cycle
A — Alignment cycle: no read or write, lasts for zero or one RISC core cycles
f — Free cycle: no read or write, lasts for one RISC core cycles. */
V - Vector fetch: always an aligned word read, lasts for at least one RISC core cycle
P - Program word fetch: always an aligned word read, lasts for at least one RISC core cycle
r - 8-bit data read: lasts for at least one RISC core cycle
R - 16-bit data read: lasts for at least one RISC core cycle
w - 8-bit data write: lasts for at least one RISC core cycle
W - 16-bit data write: lasts for at least one RISC core cycle
A - Alignment cycle: no read or write, lasts for zero or one RISC core cycles
f - Free cycle: no read or write, lasts for one RISC core cycles. */
#define XGATE_CYCLE_V 0x01
#define XGATE_CYCLE_P 0x02
#define XGATE_CYCLE_r 0x04