diff --git a/gas/ChangeLog b/gas/ChangeLog index a19515a82d6..35d62ce351c 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,12 @@ +2021-09-25 Peter Bergner + + * testsuite/gas/ppc/power5.s: New test. + * testsuite/gas/ppc/power5.d: Likewise. + * testsuite/gas/ppc/ppc.exp: Run it. + * testsuite/gas/ppc/power7.s: Remove tests for mfppr, mfppr32, mtppr + and mtppr32. + * testsuite/gas/ppc/power7.d: Likewise. + 2021-09-13 Jan Beulich * config/tc-ia64.c (cross_section): Use obj_elf_section_name to diff --git a/gas/testsuite/gas/ppc/power5.d b/gas/testsuite/gas/ppc/power5.d new file mode 100644 index 00000000000..e46cea456f9 --- /dev/null +++ b/gas/testsuite/gas/ppc/power5.d @@ -0,0 +1,14 @@ +#as: -mpower5 +#objdump: -dr -Mpower5 +#name: POWER5 tests + +.* + +Disassembly of section \.text: + +0+00 : +.*: (7d 40 e2 a6|a6 e2 40 7d) mfppr r10 +.*: (7d 62 e2 a6|a6 e2 62 7d) mfppr32 r11 +.*: (7d 80 e3 a6|a6 e3 80 7d) mtppr r12 +.*: (7d a2 e3 a6|a6 e3 a2 7d) mtppr32 r13 +#pass diff --git a/gas/testsuite/gas/ppc/power5.s b/gas/testsuite/gas/ppc/power5.s new file mode 100644 index 00000000000..8bf65ff2f16 --- /dev/null +++ b/gas/testsuite/gas/ppc/power5.s @@ -0,0 +1,6 @@ + .text +power5: + mfppr 10 + mfppr32 11 + mtppr 12 + mtppr32 13 diff --git a/gas/testsuite/gas/ppc/power7.d b/gas/testsuite/gas/ppc/power7.d index a2e6df44a57..bb8d87ff270 100644 --- a/gas/testsuite/gas/ppc/power7.d +++ b/gas/testsuite/gas/ppc/power7.d @@ -103,9 +103,5 @@ Disassembly of section \.text: .*: (7f bd eb 78|78 eb bd 7f) mdoio .*: (7f de f3 78|78 f3 de 7f) mdoom .*: (7f de f3 78|78 f3 de 7f) mdoom -.*: (7d 40 e2 a6|a6 e2 40 7d) mfppr r10 -.*: (7d 62 e2 a6|a6 e2 62 7d) mfppr32 r11 -.*: (7d 80 e3 a6|a6 e3 80 7d) mtppr r12 -.*: (7d a2 e3 a6|a6 e3 a2 7d) mtppr32 r13 .*: (7d 60 52 64|64 52 60 7d) tlbie r10,r11 #pass diff --git a/gas/testsuite/gas/ppc/power7.s b/gas/testsuite/gas/ppc/power7.s index b8111128d6f..4f767832c1d 100644 --- a/gas/testsuite/gas/ppc/power7.s +++ b/gas/testsuite/gas/ppc/power7.s @@ -94,8 +94,4 @@ power7: or 29,29,29 mdoom or 30,30,30 - mfppr 10 - mfppr32 11 - mtppr 12 - mtppr32 13 tlbie 10,11 diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp index b5ce36da4d4..dcf4f74f54c 100644 --- a/gas/testsuite/gas/ppc/ppc.exp +++ b/gas/testsuite/gas/ppc/ppc.exp @@ -116,6 +116,7 @@ run_dump_test "e500mc64_nop" run_dump_test "e5500_nop" run_dump_test "e6500_nop" run_dump_test "power4_32" +run_dump_test "power5" run_dump_test "power6" run_dump_test "power7" run_dump_test "power8" diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a32af60864d..62e677efe00 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2021-09-25 Peter Bergner + + * ppc-opc.c (powerpc_opcodes) : Enable + on POWER5 and later. + 2021-09-20 Andrew Burgess * riscv-dis.c (riscv_disassemble_insn): Print a .%dbyte opcode diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 13d8b6c3c07..a34df1700d0 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -7073,8 +7073,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"mfdvlim", XSPR(31,339,883), XSPR_MASK, TITAN, EXT, {RT}}, {"mfclcsr", XSPR(31,339,884), XSPR_MASK, TITAN, EXT, {RT}}, {"mfccr1", XSPR(31,339,888), XSPR_MASK, TITAN, EXT, {RT}}, -{"mfppr", XSPR(31,339,896), XSPR_MASK, POWER7, EXT, {RT}}, -{"mfppr32", XSPR(31,339,898), XSPR_MASK, POWER7, EXT, {RT}}, +{"mfppr", XSPR(31,339,896), XSPR_MASK, POWER5, EXT, {RT}}, +{"mfppr32", XSPR(31,339,898), XSPR_MASK, POWER5, EXT, {RT}}, {"mfgqr", XSPR(31,339,912), XSPRGQR_MASK, PPCPS, EXT, {RT, SPRGQR}}, {"mfhid2", XSPR(31,339,920), XSPR_MASK, GEKKO, EXT, {RT}}, {"mfwpar", XSPR(31,339,921), XSPR_MASK, GEKKO, EXT, {RT}}, @@ -7514,8 +7514,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"mtdvlim", XSPR(31,467,883), XSPR_MASK, TITAN, EXT, {RS}}, {"mtclcsr", XSPR(31,467,884), XSPR_MASK, TITAN, EXT, {RS}}, {"mtccr1", XSPR(31,467,888), XSPR_MASK, TITAN, EXT, {RS}}, -{"mtppr", XSPR(31,467,896), XSPR_MASK, POWER7, EXT, {RS}}, -{"mtppr32", XSPR(31,467,898), XSPR_MASK, POWER7, EXT, {RS}}, +{"mtppr", XSPR(31,467,896), XSPR_MASK, POWER5, EXT, {RS}}, +{"mtppr32", XSPR(31,467,898), XSPR_MASK, POWER5, EXT, {RS}}, {"mtgqr", XSPR(31,467,912), XSPRGQR_MASK, PPCPS, EXT, {SPRGQR, RS}}, {"mthid2", XSPR(31,467,920), XSPR_MASK, GEKKO, EXT, {RS}}, {"mtwpar", XSPR(31,467,921), XSPR_MASK, GEKKO, EXT, {RS}},