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LoongArch: Add gas testsuit for LA64 relocations

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Test the relocation of the LA64 instruction set.
This commit is contained in:
Lulu Cai 2024-01-11 09:45:57 +08:00 • committed by liuzhensong
parent 0c7cde4d9a
commit 4cde4ce70a
2 changed files with 253 additions and 0 deletions
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144
gas/testsuite/gas/loongarch/relocs_64.d Normal file
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#as: -mthin-add-sub
#objdump: -dr
#skip: loongarch32-*-*
.*: file format .*
Disassembly of section .text:
0+ <.*>:
0: 4c008ca4 jirl \$a0, \$a1, 140
0: R_LARCH_B16 .L1
4: 40008880 beqz \$a0, 136 # 8c <.L1>
4: R_LARCH_B21 .L1
8: 50008400 b 132 # 8c <.L1>
8: R_LARCH_B26 .L1
c: 14000004 lu12i.w \$a0, 0
c: R_LARCH_ABS_HI20 .L1
10: 038000a4 ori \$a0, \$a1, 0x0
10: R_LARCH_ABS_LO12 .L1
14: 16000004 lu32i.d \$a0, 0
14: R_LARCH_ABS64_LO20 .L1
18: 03000085 lu52i.d \$a1, \$a0, 0
18: R_LARCH_ABS64_HI12 .L1
1c: 1a000004 pcalau12i \$a0, 0
1c: R_LARCH_PCALA_HI20 .L1
20: 02c00085 addi.d \$a1, \$a0, 0
20: R_LARCH_PCALA_LO12 .L1
24: 16000004 lu32i.d \$a0, 0
24: R_LARCH_PCALA64_LO20 .L1
28: 03000085 lu52i.d \$a1, \$a0, 0
28: R_LARCH_PCALA64_HI12 .L1
2c: 1a000004 pcalau12i \$a0, 0
2c: R_LARCH_GOT_PC_HI20 .L1
30: 28c00085 ld.d \$a1, \$a0, 0
30: R_LARCH_GOT_PC_LO12 .L1
34: 16000004 lu32i.d \$a0, 0
34: R_LARCH_GOT64_PC_LO20 .L1
38: 03000085 lu52i.d \$a1, \$a0, 0
38: R_LARCH_GOT64_PC_HI12 .L1
3c: 14000004 lu12i.w \$a0, 0
3c: R_LARCH_GOT_HI20 .L1
40: 03800084 ori \$a0, \$a0, 0x0
40: R_LARCH_GOT_LO12 .L1
44: 16000004 lu32i.d \$a0, 0
44: R_LARCH_GOT64_LO20 .L1
48: 03000085 lu52i.d \$a1, \$a0, 0
48: R_LARCH_GOT64_HI12 .L1
4c: 14000004 lu12i.w \$a0, 0
4c: R_LARCH_TLS_LE_HI20 TLSL1
50: 03800085 ori \$a1, \$a0, 0x0
50: R_LARCH_TLS_LE_LO12 TLSL1
54: 16000004 lu32i.d \$a0, 0
54: R_LARCH_TLS_LE64_LO20 TLSL1
58: 03000085 lu52i.d \$a1, \$a0, 0
58: R_LARCH_TLS_LE64_HI12 TLSL1
5c: 1a000004 pcalau12i \$a0, 0
5c: R_LARCH_TLS_IE_PC_HI20 TLSL1
60: 02c00005 li.d \$a1, 0
60: R_LARCH_TLS_IE_PC_LO12 TLSL1
64: 16000005 lu32i.d \$a1, 0
64: R_LARCH_TLS_IE64_PC_LO20 TLSL1
68: 030000a5 lu52i.d \$a1, \$a1, 0
68: R_LARCH_TLS_IE64_PC_HI12 TLSL1
6c: 14000004 lu12i.w \$a0, 0
6c: R_LARCH_TLS_IE_HI20 TLSL1
70: 03800084 ori \$a0, \$a0, 0x0
70: R_LARCH_TLS_IE_LO12 TLSL1
74: 16000004 lu32i.d \$a0, 0
74: R_LARCH_TLS_IE64_LO20 TLSL1
78: 03000084 lu52i.d \$a0, \$a0, 0
78: R_LARCH_TLS_IE64_HI12 TLSL1
7c: 1a000004 pcalau12i \$a0, 0
7c: R_LARCH_TLS_LD_PC_HI20 TLSL1
80: 14000004 lu12i.w \$a0, 0
80: R_LARCH_TLS_LD_HI20 TLSL1
84: 1a000004 pcalau12i \$a0, 0
84: R_LARCH_TLS_GD_PC_HI20 TLSL1
88: 14000004 lu12i.w \$a0, 0
88: R_LARCH_TLS_GD_HI20 TLSL1
0+8c <.L1>:
8c: 00000000 .word 0x00000000
8c: R_LARCH_32_PCREL .L2
0+90 <.L2>:
...
90: R_LARCH_64_PCREL .L3
0+98 <.L3>:
98: 03400000 nop
9c: 03400000 nop
9c: R_LARCH_ALIGN .*
a0: 03400000 nop
a4: 03400000 nop
a8: 1800000c pcaddi \$t0, 0
a8: R_LARCH_PCREL20_S2 .L1
ac: 1e000001 pcaddu18i \$ra, 0
ac: R_LARCH_CALL36 a
b0: 4c000021 jirl \$ra, \$ra, 0
b4: 1a000004 pcalau12i \$a0, 0
b4: R_LARCH_TLS_DESC_PC_HI20 TLSL1
b8: 02c000a5 addi.d \$a1, \$a1, 0
b8: R_LARCH_TLS_DESC_PC_LO12 TLSL1
bc: 16000005 lu32i.d \$a1, 0
bc: R_LARCH_TLS_DESC64_PC_LO20 TLSL1
c0: 030000a5 lu52i.d \$a1, \$a1, 0
c0: R_LARCH_TLS_DESC64_PC_HI12 TLSL1
c4: 14000004 lu12i.w \$a0, 0
c4: R_LARCH_TLS_DESC_HI20 TLSL1
c8: 03800084 ori \$a0, \$a0, 0x0
c8: R_LARCH_TLS_DESC_LO12 TLSL1
cc: 16000004 lu32i.d \$a0, 0
cc: R_LARCH_TLS_DESC64_LO20 TLSL1
d0: 03000084 lu52i.d \$a0, \$a0, 0
d0: R_LARCH_TLS_DESC64_HI12 TLSL1
d4: 28c00081 ld.d \$ra, \$a0, 0
d4: R_LARCH_TLS_DESC_LD TLSL1
d8: 4c000021 jirl \$ra, \$ra, 0
d8: R_LARCH_TLS_DESC_CALL TLSL1
dc: 14000004 lu12i.w \$a0, 0
dc: R_LARCH_TLS_LE_HI20_R TLSL1
dc: R_LARCH_RELAX \*ABS\*
e0: 001090a5 add.d \$a1, \$a1, \$a0
e0: R_LARCH_TLS_LE_ADD_R TLSL1
e0: R_LARCH_RELAX \*ABS\*
e4: 29800085 st.w \$a1, \$a0, 0
e4: R_LARCH_TLS_LE_LO12_R TLSL1
e4: R_LARCH_RELAX \*ABS\*
e8: 14000004 lu12i.w \$a0, 0
e8: R_LARCH_TLS_LE_HI20_R TLSL1
e8: R_LARCH_RELAX \*ABS\*
ec: 001090a5 add.d \$a1, \$a1, \$a0
ec: R_LARCH_TLS_LE_ADD_R TLSL1
ec: R_LARCH_RELAX \*ABS\*
f0: 29800085 st.w \$a1, \$a0, 0
f0: R_LARCH_TLS_LE_LO12_R TLSL1
f0: R_LARCH_RELAX \*ABS\*
f4: 18000004 pcaddi \$a0, 0
f4: R_LARCH_TLS_LD_PCREL20_S2 TLSL1
f8: 18000004 pcaddi \$a0, 0
f8: R_LARCH_TLS_GD_PCREL20_S2 TLSL1
fc: 18000004 pcaddi \$a0, 0
fc: R_LARCH_TLS_DESC_PCREL20_S2 TLSL1

109
gas/testsuite/gas/loongarch/relocs_64.s Normal file
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/* b16. */
jirl $r4,$r5,%b16(.L1)
/* b21. */
beqz $r4,%b21(.L1)
/* b26. */
b %b26(.L1)
/* lu12i.w. */
lu12i.w $r4,%abs_hi20(.L1)
/* ori */
ori $r4,$r5,%abs_lo12(.L1)
/* lu32i.d. */
lu32i.d $r4,%abs64_lo20(.L1)
/* lu52i.d. */
lu52i.d $r5,$r4,%abs64_hi12(.L1)
pcalau12i $r4,%pc_hi20(.L1)
addi.d $r5,$r4,%pc_lo12(.L1)
lu32i.d $r4,%pc64_lo20(.L1)
lu52i.d $r5,$r4,%pc64_hi12(.L1)
pcalau12i $r4,%got_pc_hi20(.L1)
ld.d $r5,$r4,%got_pc_lo12(.L1)
lu32i.d $r4,%got64_pc_lo20(.L1)
lu52i.d $r5,$r4,%got64_pc_hi12(.L1)
lu12i.w $r4,%got_hi20(.L1)
ori $r4,$r4,%got_lo12(.L1)
lu32i.d $r4,%got64_lo20(.L1)
lu52i.d $r5,$r4,%got64_hi12(.L1)
/* TLS LE. */
lu12i.w $r4,%le_hi20(TLSL1)
ori $r5,$r4,%le_lo12(TLSL1)
lu32i.d $r4,%le64_lo20(TLSL1)
lu52i.d $r5,$r4,%le64_hi12(TLSL1)
/* Part of IE relocs. */
pcalau12i $r4,%ie_pc_hi20(TLSL1)
addi.d $r5,$r0,%ie_pc_lo12(TLSL1)
lu32i.d $r5,%ie64_pc_lo20(TLSL1)
lu52i.d $r5,$r5,%ie64_pc_hi12(TLSL1)
lu12i.w $r4,%ie_hi20(TLSL1)
ori $r4,$r4,%ie_lo12(TLSL1)
lu32i.d $r4,%ie64_lo20(TLSL1)
lu52i.d $r4,$r4,%ie64_hi12(TLSL1)
/* Part of LD relocs. */
pcalau12i $r4,%ld_pc_hi20(TLSL1)
lu12i.w $r4,%ld_hi20(TLSL1)
/* Part of GD relocs. */
pcalau12i $r4,%gd_pc_hi20(TLSL1)
lu12i.w $r4,%gd_hi20(TLSL1)
/* Test insn relocs. */
.L1:
/* 32-bit PC relative. */
.4byte .L2-.L1
.L2:
/* 64-bit PC relative. */
.8byte .L3-.L2
.L3:
nop
/* R_LARCH_ALIGN. */
.align 4
/* R_LARCH_PCREL20_S2. */
pcaddi $r12,.L1
/* R_LARCH_ADD_CALL36 */
pcaddu18i $r1, %call36(a)
jirl $r1, $r1, 0
/* Part of DESC relocs. */
pcalau12i $r4,%desc_pc_hi20(TLSL1)
addi.d $r5,$r5,%desc_pc_lo12(TLSL1)
lu32i.d $r5,%desc64_pc_lo20(TLSL1)
lu52i.d $r5,$r5,%desc64_pc_hi12(TLSL1)
lu12i.w $r4,%desc_hi20(TLSL1)
ori $r4,$r4,%desc_lo12(TLSL1)
lu32i.d $r4,%desc64_lo20(TLSL1)
lu52i.d $r4,$r4,%desc64_hi12(TLSL1)
ld.d $r1,$r4,%desc_ld(TLSL1)
jirl $r1,$r1,%desc_call(TLSL1)
/* New TLS Insn. */
lu12i.w $r4,%le_hi20_r(TLSL1)
add.d $r5,$r5,$r4,%le_add_r(TLSL1)
st.w $r5,$r4,%le_lo12_r(TLSL1)
/* New TLS Insn with addend. */
lu12i.w $r4,%le_hi20_r(TLSL1)
add.d $r5,$r5,$r4,%le_add_r(TLSL1)
st.w $r5,$r4,%le_lo12_r(TLSL1)
/* Part of relaxed LD/GD/DESC insn sequence. */
pcaddi $a0,%ld_pcrel_20(TLSL1)
pcaddi $a0,%gd_pcrel_20(TLSL1)
pcaddi $a0,%desc_pcrel_20(TLSL1)