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Fix some PPC assembler errors.

Browse source 
Remove the wait instructions for server processors, since they were never
implemented.  Also add the extra operands added to the tlbie and slbia
instructions with ISA 2.06 and ISA 2.05 respectively.

binutils/
	* MAINTAINERS: Add myself as PPC maintainer.

opcodes/
        * ppc-opc.c (IH) New define.
        (powerpc_opcodes) <wait>: Do not enable for POWER7.
        <tlbie>: Add RS operand for POWER7.
        <slbia>: Add IH operand for POWER6.

gas/testsuite/
        * gas/ppc/power4.d: Add a slbia test.
        * gas/ppc/power4.s: Likewise.
        * gas/ppc/power6.d: Add slbia and tlbie tests.
        * gas/ppc/power6.s: Likewise.
        * gas/ppc/power7.d: Remove wait tests. Add a tlbie test.
        * gas/ppc/power7.s: Likewise.
This commit is contained in:
Peter Bergner 2015-05-14 20:57:50 -05:00
parent 49a84e1373
commit 4bc0608a8b
11 changed files with 50 additions and 12 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
binutils/ChangeLog
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@ -1,3 +1,7 @@
2015-05-14 Peter Bergner <bergner@vnet.ibm.com>
* MAINTAINERS: Add myself as PPC maintainer.
2015-05-14 H.J. Lu <hongjiu.lu@intel.com> 2015-05-14 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (uncompress_section_contents): Add a parameter for * readelf.c (uncompress_section_contents): Add a parameter for

1
binutils/MAINTAINERS
View file

@ -119,6 +119,7 @@ responsibility among the other maintainers.
OR1K Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> OR1K Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
PPC Geoff Keating <geoffk@geoffk.org> PPC Geoff Keating <geoffk@geoffk.org>
PPC Alan Modra <amodra@gmail.com> PPC Alan Modra <amodra@gmail.com>
PPC Peter Bergner <bergner@vnet.ibm.com>
PPC vector ext Aldy Hernandez <aldyh@redhat.com> PPC vector ext Aldy Hernandez <aldyh@redhat.com>
RL78 DJ Delorie <dj@redhat.com> RL78 DJ Delorie <dj@redhat.com>
RX DJ Delorie <dj@redhat.com> RX DJ Delorie <dj@redhat.com>

9
gas/testsuite/ChangeLog
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@ -1,3 +1,12 @@
2015-05-14 Peter Bergner <bergner@vnet.ibm.com>
* gas/ppc/power4.d: Add a slbia test.
* gas/ppc/power4.s: Likewise.
* gas/ppc/power6.d: Add slbia and tlbie tests.
* gas/ppc/power6.s: Likewise.
* gas/ppc/power7.d: Remove wait tests. Add a tlbie test.
* gas/ppc/power7.s: Likewise.
2015-05-13 Max Filippov <jcmvbkbc@gmail.com> 2015-05-13 Max Filippov <jcmvbkbc@gmail.com>
* gas/xtensa/trampoline.s: Add regression testcase. * gas/xtensa/trampoline.s: Add regression testcase.

3
gas/testsuite/gas/ppc/power4.d
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@ -10,7 +10,7 @@ start address 0x0+
Sections: Sections:
Idx Name +Size +VMA +LMA +File off +Algn Idx Name +Size +VMA +LMA +File off +Algn
+0 \.text +0+c8 +0+ +0+ +.* +0 \.text +0+cc +0+ +0+ +.*
+CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+1 \.data +0+20 +0+ +0+ +.* +1 \.data +0+20 +0+ +0+ +.*
+CONTENTS, ALLOC, LOAD, DATA +CONTENTS, ALLOC, LOAD, DATA
@ -98,3 +98,4 @@ Disassembly of section \.text:
.*: (f8 40 00 12|12 00 40 f8) stq r2,16\(0\) .*: (f8 40 00 12|12 00 40 f8) stq r2,16\(0\)
.*: (f8 05 00 12|12 00 05 f8) stq r0,16\(r5\) .*: (f8 05 00 12|12 00 05 f8) stq r0,16\(r5\)
.*: (f8 45 00 12|12 00 45 f8) stq r2,16\(r5\) .*: (f8 45 00 12|12 00 45 f8) stq r2,16\(r5\)
.*: (7c 00 03 e4|e4 03 00 7c) slbia

1
gas/testsuite/gas/ppc/power4.s
View file

@ -71,6 +71,7 @@ dsym1:
stq 2,16(0) stq 2,16(0)
stq 0,16(5) stq 0,16(5)
stq 2,16(5) stq 2,16(5)
slbia
.section ".data" .section ".data"
usym0: .llong 0xcafebabe usym0: .llong 0xcafebabe

6
gas/testsuite/gas/ppc/power6.d
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@ -71,4 +71,10 @@ Disassembly of section \.text:
f4: (7d 4b 60 94|94 60 4b 7d) addg6s r10,r11,r12 f4: (7d 4b 60 94|94 60 4b 7d) addg6s r10,r11,r12
f8: (60 21 00 00|00 00 21 60) ori r1,r1,0 f8: (60 21 00 00|00 00 21 60) ori r1,r1,0
fc: (60 21 00 00|00 00 21 60) ori r1,r1,0 fc: (60 21 00 00|00 00 21 60) ori r1,r1,0
.*: (7c 00 03 e4|e4 03 00 7c) slbia
.*: (7c 00 03 e4|e4 03 00 7c) slbia
.*: (7c e0 03 e4|e4 03 e0 7c) slbia 7
.*: (7c 00 52 64|64 52 00 7c) tlbie r10
.*: (7c 00 52 64|64 52 00 7c) tlbie r10
.*: (7c 20 52 64|64 52 20 7c) tlbie r10,1
#pass #pass

6
gas/testsuite/gas/ppc/power6.s
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@ -66,3 +66,9 @@ start:
addg6s 10,11,12 addg6s 10,11,12
ori 1,1,0 ori 1,1,0
.p2align 4,,15 .p2align 4,,15
slbia
slbia 0
slbia 7
tlbie 10
tlbie 10,0
tlbie 10,1

7
gas/testsuite/gas/ppc/power7.d
View file

@ -29,8 +29,6 @@ Disassembly of section \.text:
.*: (f1 6c 67 87|87 67 6c f1) xvmovdp vs43,vs44 .*: (f1 6c 67 87|87 67 6c f1) xvmovdp vs43,vs44
.*: (f0 64 2f 80|80 2f 64 f0) xvcpsgndp vs3,vs4,vs5 .*: (f0 64 2f 80|80 2f 64 f0) xvcpsgndp vs3,vs4,vs5
.*: (f1 6c 6f 87|87 6f 6c f1) xvcpsgndp vs43,vs44,vs45 .*: (f1 6c 6f 87|87 6f 6c f1) xvcpsgndp vs43,vs44,vs45
.*: (7c 00 00 7c|7c 00 00 7c) wait
.*: (7c 00 00 7c|7c 00 00 7c) wait
.*: (4c 00 03 24|24 03 00 4c) doze .*: (4c 00 03 24|24 03 00 4c) doze
.*: (4c 00 03 64|64 03 00 4c) nap .*: (4c 00 03 64|64 03 00 4c) nap
.*: (4c 00 03 a4|a4 03 00 4c) sleep .*: (4c 00 03 a4|a4 03 00 4c) sleep
@ -95,12 +93,12 @@ Disassembly of section \.text:
.*: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15 .*: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15
.*: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15 .*: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15
.*: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28 .*: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28
.*: (7f 7b db 78|78 db 7b 7f) yield
.*: (7f 7b db 78|78 db 7b 7f) yield
.*: (60 42 00 00|00 00 42 60) ori r2,r2,0 .*: (60 42 00 00|00 00 42 60) ori r2,r2,0
.*: (60 00 00 00|00 00 00 60) nop .*: (60 00 00 00|00 00 00 60) nop
.*: (60 00 00 00|00 00 00 60) nop .*: (60 00 00 00|00 00 00 60) nop
.*: (60 42 00 00|00 00 42 60) ori r2,r2,0 .*: (60 42 00 00|00 00 42 60) ori r2,r2,0
.*: (7f 7b db 78|78 db 7b 7f) yield
.*: (7f 7b db 78|78 db 7b 7f) yield
.*: (7f bd eb 78|78 eb bd 7f) mdoio .*: (7f bd eb 78|78 eb bd 7f) mdoio
.*: (7f bd eb 78|78 eb bd 7f) mdoio .*: (7f bd eb 78|78 eb bd 7f) mdoio
.*: (7f de f3 78|78 f3 de 7f) mdoom .*: (7f de f3 78|78 f3 de 7f) mdoom
@ -109,4 +107,5 @@ Disassembly of section \.text:
.*: (7d 62 e2 a6|a6 e2 62 7d) mfppr32 r11 .*: (7d 62 e2 a6|a6 e2 62 7d) mfppr32 r11
.*: (7d 80 e3 a6|a6 e3 80 7d) mtppr r12 .*: (7d 80 e3 a6|a6 e3 80 7d) mtppr r12
.*: (7d a2 e3 a6|a6 e3 a2 7d) mtppr32 r13 .*: (7d a2 e3 a6|a6 e3 a2 7d) mtppr32 r13
.*: (7d 60 52 64|64 52 60 7d) tlbie r10,r11
#pass #pass

7
gas/testsuite/gas/ppc/power7.s
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@ -22,8 +22,6 @@ power7:
xvcpsgndp 43,44,44 xvcpsgndp 43,44,44
xvcpsgndp 3,4,5 xvcpsgndp 3,4,5
xvcpsgndp 43,44,45 xvcpsgndp 43,44,45
wait
wait 0
doze doze
nap nap
sleep sleep
@ -88,10 +86,10 @@ power7:
frsqrtes 14,15 frsqrtes 14,15
frsqrtes. 14,15 frsqrtes. 14,15
isel 2,3,4,28 isel 2,3,4,28
ori 2,2,0
.p2align 4,,15
yield yield
or 27,27,27 or 27,27,27
ori 2,2,0
.p2align 4,,15
mdoio mdoio
or 29,29,29 or 29,29,29
mdoom mdoom
@ -100,3 +98,4 @@ power7:
mfppr32 11 mfppr32 11
mtppr 12 mtppr 12
mtppr32 13 mtppr32 13
tlbie 10,11

7
opcodes/ChangeLog
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@ -1,3 +1,10 @@
2015-05-14 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (IH) New define.
(powerpc_opcodes) <wait>: Do not enable for POWER7.
<tlbie>: Add RS operand for POWER7.
<slbia>: Add IH operand for POWER6.
2015-05-11 H.J. Lu <hongjiu.lu@intel.com> 2015-05-11 H.J. Lu <hongjiu.lu@intel.com>
* opcodes/i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit * opcodes/i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit

11
opcodes/ppc-opc.c
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@ -866,6 +866,9 @@ const struct powerpc_operand powerpc_operands[] =
#define ERAT_T UIM + 1 #define ERAT_T UIM + 1
{ 0x7, 21, NULL, NULL, 0 }, { 0x7, 21, NULL, NULL, 0 },
#define IH ERAT_T + 1
{ 0x7, 21, NULL, NULL, PPC_OPERAND_OPTIONAL },
}; };
const unsigned int num_powerpc_operands = (sizeof (powerpc_operands) const unsigned int num_powerpc_operands = (sizeof (powerpc_operands)
@ -4486,7 +4489,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}}, {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}},
{"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}}, {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, PPCNONE, {0}},
{"wait", X(31,62), XWC_MASK, POWER7|E500MC|PPCA2|PPCVLE, PPCNONE, {WC}}, {"wait", X(31,62), XWC_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {WC}},
{"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA0, RB}}, {"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2|PPCVLE, PPCNONE, {RA0, RB}},
@ -4780,7 +4783,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mfbhrbe", X(31,302), X_MASK, POWER8, PPCNONE, {RT, BHRBE}}, {"mfbhrbe", X(31,302), X_MASK, POWER8, PPCNONE, {RT, BHRBE}},
{"tlbie", X(31,306), XRTLRA_MASK, PPC, TITAN, {RB, L}}, {"tlbie", X(31,306), XRA_MASK, POWER7, TITAN, {RB, RS}},
{"tlbie", X(31,306), XRTLRA_MASK, PPC, POWER7|TITAN, {RB, L}},
{"tlbi", X(31,306), XRT_MASK, POWER, PPCNONE, {RA0, RB}}, {"tlbi", X(31,306), XRT_MASK, POWER, PPCNONE, {RA0, RB}},
{"eciwx", X(31,310), X_MASK, PPC, TITAN, {RT, RA0, RB}}, {"eciwx", X(31,310), X_MASK, PPC, TITAN, {RT, RA0, RB}},
@ -5372,7 +5376,8 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"icbtlse", X(31,494), X_MASK, PPCCHLK, E500MC, {CT, RA, RB}}, {"icbtlse", X(31,494), X_MASK, PPCCHLK, E500MC, {CT, RA, RB}},
{"slbia", X(31,498), 0xffffffff, PPC64, PPCNONE, {0}}, {"slbia", X(31,498), 0xff1fffff, POWER6, PPCNONE, {IH}},
{"slbia", X(31,498), 0xffffffff, PPC64, POWER6, {0}},
{"cli", X(31,502), XRB_MASK, POWER, PPCNONE, {RT, RA}}, {"cli", X(31,502), XRB_MASK, POWER, PPCNONE, {RT, RA}},