Update function declarations to ISO C90 formatting
This commit is contained in:
Nick Clifton
parent
e4e8248d79
commit
47b0e7ad8c
119 changed files with 13365 additions and 15909 deletions
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@ -1,6 +1,6 @@
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/* Print SPARC instructions.
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Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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2000, 2002, 2003, 2004 Free Software Foundation, Inc.
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2000, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -14,7 +14,8 @@
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include <stdio.h>
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@ -34,7 +35,7 @@
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#define V9_P(insn) (((insn)->architecture & MASK_V9) != 0)
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/* The sorted opcode table. */
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static const struct sparc_opcode **sorted_opcodes;
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static const sparc_opcode **sorted_opcodes;
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/* For faster lookup, after insns are sorted they are hashed. */
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/* ??? I think there is room for even more improvement. */
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@ -46,18 +47,13 @@ static const struct sparc_opcode **sorted_opcodes;
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static int opcode_bits[4] = { 0x01c00000, 0x0, 0x01f80000, 0x01f80000 };
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#define HASH_INSN(INSN) \
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((((INSN) >> 24) & 0xc0) | (((INSN) & opcode_bits[((INSN) >> 30) & 3]) >> 19))
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struct opcode_hash
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typedef struct sparc_opcode_hash
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{
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struct opcode_hash *next;
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const struct sparc_opcode *opcode;
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};
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static struct opcode_hash *opcode_hash_table[HASH_SIZE];
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struct sparc_opcode_hash *next;
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const sparc_opcode *opcode;
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} sparc_opcode_hash;
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static void build_hash_table
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PARAMS ((const struct sparc_opcode **, struct opcode_hash **, int));
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static int is_delayed_branch PARAMS ((unsigned long));
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static int compare_opcodes PARAMS ((const PTR, const PTR));
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static int compute_arch_mask PARAMS ((unsigned long));
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static sparc_opcode_hash *opcode_hash_table[HASH_SIZE];
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/* Sign-extend a value which is N bits long. */
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#define SEX(value, bits) \
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@ -65,16 +61,16 @@ static int compute_arch_mask PARAMS ((unsigned long));
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>> ((8 * sizeof (int)) - bits) )
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static char *reg_names[] =
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{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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"o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
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"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
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"i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
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"o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",
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"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
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"i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",
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"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
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"f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
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"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
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"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
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"f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
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"f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
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"f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
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"f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47",
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"f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55",
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"f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63",
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/* psr, wim, tbr, fpsr, cpsr are v8 only. */
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@ -104,21 +100,21 @@ static char *v9a_asr_reg_names[] =
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/* Macros used to extract instruction fields. Not all fields have
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macros defined here, only those which are actually used. */
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#define X_RD(i) (((i) >> 25) & 0x1f)
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#define X_RS1(i) (((i) >> 14) & 0x1f)
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#define X_LDST_I(i) (((i) >> 13) & 1)
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#define X_ASI(i) (((i) >> 5) & 0xff)
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#define X_RS2(i) (((i) >> 0) & 0x1f)
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#define X_IMM(i,n) (((i) >> 0) & ((1 << (n)) - 1))
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#define X_SIMM(i,n) SEX (X_IMM ((i), (n)), (n))
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#define X_DISP22(i) (((i) >> 0) & 0x3fffff)
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#define X_IMM22(i) X_DISP22 (i)
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#define X_DISP30(i) (((i) >> 0) & 0x3fffffff)
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#define X_RD(i) (((i) >> 25) & 0x1f)
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#define X_RS1(i) (((i) >> 14) & 0x1f)
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#define X_LDST_I(i) (((i) >> 13) & 1)
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#define X_ASI(i) (((i) >> 5) & 0xff)
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#define X_RS2(i) (((i) >> 0) & 0x1f)
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#define X_IMM(i,n) (((i) >> 0) & ((1 << (n)) - 1))
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#define X_SIMM(i,n) SEX (X_IMM ((i), (n)), (n))
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#define X_DISP22(i) (((i) >> 0) & 0x3fffff)
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#define X_IMM22(i) X_DISP22 (i)
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#define X_DISP30(i) (((i) >> 0) & 0x3fffffff)
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/* These are for v9. */
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#define X_DISP16(i) (((((i) >> 20) & 3) << 14) | (((i) >> 0) & 0x3fff))
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#define X_DISP19(i) (((i) >> 0) & 0x7ffff)
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#define X_MEMBAR(i) ((i) & 0x7f)
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#define X_DISP16(i) (((((i) >> 20) & 3) << 14) | (((i) >> 0) & 0x3fff))
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#define X_DISP19(i) (((i) >> 0) & 0x7ffff)
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#define X_MEMBAR(i) ((i) & 0x7f)
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/* Here is the union which was used to extract instruction fields
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before the shift and mask macros were written.
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@ -176,23 +172,22 @@ static char *v9a_asr_reg_names[] =
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unsigned int adisp30:30;
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#define disp30 call.adisp30
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} call;
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};
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*/
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}; */
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/* Nonzero if INSN is the opcode for a delayed branch. */
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static int
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is_delayed_branch (insn)
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unsigned long insn;
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is_delayed_branch (unsigned long insn)
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{
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struct opcode_hash *op;
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sparc_opcode_hash *op;
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for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next)
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{
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const struct sparc_opcode *opcode = op->opcode;
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const sparc_opcode *opcode = op->opcode;
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if ((opcode->match & insn) == opcode->match
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&& (opcode->lose & insn) == 0)
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return (opcode->flags & F_DELAYED);
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return opcode->flags & F_DELAYED;
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}
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return 0;
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}
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@ -203,6 +198,236 @@ is_delayed_branch (insn)
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to compare_opcodes. */
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static unsigned int current_arch_mask;
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/* Given BFD mach number, return a mask of SPARC_OPCODE_ARCH_FOO values. */
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static int
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compute_arch_mask (unsigned long mach)
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{
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switch (mach)
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{
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case 0 :
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case bfd_mach_sparc :
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return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V8);
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case bfd_mach_sparc_sparclet :
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return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_SPARCLET);
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case bfd_mach_sparc_sparclite :
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case bfd_mach_sparc_sparclite_le :
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/* sparclites insns are recognized by default (because that's how
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they've always been treated, for better or worse). Kludge this by
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indicating generic v8 is also selected. */
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return (SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_SPARCLITE)
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| SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V8));
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case bfd_mach_sparc_v8plus :
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case bfd_mach_sparc_v9 :
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return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9);
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case bfd_mach_sparc_v8plusa :
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case bfd_mach_sparc_v9a :
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return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9A);
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case bfd_mach_sparc_v8plusb :
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case bfd_mach_sparc_v9b :
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return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9B);
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}
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abort ();
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}
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/* Compare opcodes A and B. */
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static int
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compare_opcodes (const void * a, const void * b)
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{
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sparc_opcode *op0 = * (sparc_opcode **) a;
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sparc_opcode *op1 = * (sparc_opcode **) b;
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unsigned long int match0 = op0->match, match1 = op1->match;
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unsigned long int lose0 = op0->lose, lose1 = op1->lose;
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register unsigned int i;
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/* If one (and only one) insn isn't supported by the current architecture,
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prefer the one that is. If neither are supported, but they're both for
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the same architecture, continue processing. Otherwise (both unsupported
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and for different architectures), prefer lower numbered arch's (fudged
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by comparing the bitmasks). */
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if (op0->architecture & current_arch_mask)
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{
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if (! (op1->architecture & current_arch_mask))
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return -1;
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}
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else
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{
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if (op1->architecture & current_arch_mask)
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return 1;
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else if (op0->architecture != op1->architecture)
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return op0->architecture - op1->architecture;
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}
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/* If a bit is set in both match and lose, there is something
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wrong with the opcode table. */
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if (match0 & lose0)
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{
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fprintf
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(stderr,
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/* xgettext:c-format */
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_("Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"),
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op0->name, match0, lose0);
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op0->lose &= ~op0->match;
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lose0 = op0->lose;
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}
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if (match1 & lose1)
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{
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fprintf
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(stderr,
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/* xgettext:c-format */
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_("Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"),
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op1->name, match1, lose1);
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op1->lose &= ~op1->match;
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lose1 = op1->lose;
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}
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/* Because the bits that are variable in one opcode are constant in
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another, it is important to order the opcodes in the right order. */
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for (i = 0; i < 32; ++i)
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{
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unsigned long int x = 1 << i;
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int x0 = (match0 & x) != 0;
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int x1 = (match1 & x) != 0;
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if (x0 != x1)
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return x1 - x0;
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}
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for (i = 0; i < 32; ++i)
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{
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unsigned long int x = 1 << i;
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int x0 = (lose0 & x) != 0;
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int x1 = (lose1 & x) != 0;
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if (x0 != x1)
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return x1 - x0;
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}
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/* They are functionally equal. So as long as the opcode table is
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valid, we can put whichever one first we want, on aesthetic grounds. */
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/* Our first aesthetic ground is that aliases defer to real insns. */
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{
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int alias_diff = (op0->flags & F_ALIAS) - (op1->flags & F_ALIAS);
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if (alias_diff != 0)
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/* Put the one that isn't an alias first. */
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return alias_diff;
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}
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/* Except for aliases, two "identical" instructions had
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better have the same opcode. This is a sanity check on the table. */
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i = strcmp (op0->name, op1->name);
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if (i)
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{
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if (op0->flags & F_ALIAS) /* If they're both aliases, be arbitrary. */
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return i;
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else
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fprintf (stderr,
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/* xgettext:c-format */
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_("Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"),
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op0->name, op1->name);
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}
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/* Fewer arguments are preferred. */
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{
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int length_diff = strlen (op0->args) - strlen (op1->args);
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if (length_diff != 0)
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/* Put the one with fewer arguments first. */
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return length_diff;
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}
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/* Put 1+i before i+1. */
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{
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char *p0 = (char *) strchr (op0->args, '+');
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char *p1 = (char *) strchr (op1->args, '+');
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if (p0 && p1)
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{
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/* There is a plus in both operands. Note that a plus
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sign cannot be the first character in args,
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so the following [-1]'s are valid. */
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if (p0[-1] == 'i' && p1[1] == 'i')
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/* op0 is i+1 and op1 is 1+i, so op1 goes first. */
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return 1;
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if (p0[1] == 'i' && p1[-1] == 'i')
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/* op0 is 1+i and op1 is i+1, so op0 goes first. */
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return -1;
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}
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}
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/* Put 1,i before i,1. */
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{
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int i0 = strncmp (op0->args, "i,1", 3) == 0;
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int i1 = strncmp (op1->args, "i,1", 3) == 0;
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if (i0 ^ i1)
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return i0 - i1;
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}
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/* They are, as far as we can tell, identical.
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Since qsort may have rearranged the table partially, there is
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no way to tell which one was first in the opcode table as
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written, so just say there are equal. */
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/* ??? This is no longer true now that we sort a vector of pointers,
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not the table itself. */
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return 0;
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}
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/* Build a hash table from the opcode table.
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OPCODE_TABLE is a sorted list of pointers into the opcode table. */
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static void
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build_hash_table (const sparc_opcode **opcode_table,
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sparc_opcode_hash **hash_table,
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int num_opcodes)
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{
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int i;
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int hash_count[HASH_SIZE];
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static sparc_opcode_hash *hash_buf = NULL;
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/* Start at the end of the table and work backwards so that each
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chain is sorted. */
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memset (hash_table, 0, HASH_SIZE * sizeof (hash_table[0]));
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memset (hash_count, 0, HASH_SIZE * sizeof (hash_count[0]));
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if (hash_buf != NULL)
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free (hash_buf);
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hash_buf = xmalloc (sizeof (* hash_buf) * num_opcodes);
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for (i = num_opcodes - 1; i >= 0; --i)
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{
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int hash = HASH_INSN (opcode_table[i]->match);
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sparc_opcode_hash *h = &hash_buf[i];
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h->next = hash_table[hash];
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h->opcode = opcode_table[i];
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hash_table[hash] = h;
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++hash_count[hash];
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}
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#if 0 /* for debugging */
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{
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int min_count = num_opcodes, max_count = 0;
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int total;
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for (i = 0; i < HASH_SIZE; ++i)
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{
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if (hash_count[i] < min_count)
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min_count = hash_count[i];
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if (hash_count[i] > max_count)
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max_count = hash_count[i];
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total += hash_count[i];
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}
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printf ("Opcode hash table stats: min %d, max %d, ave %f\n",
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min_count, max_count, (double) total / HASH_SIZE);
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}
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#endif
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}
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/* Print one instruction from MEMADDR on INFO->STREAM.
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We suffix the instruction with a comment that gives the absolute
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@ -212,14 +437,12 @@ static unsigned int current_arch_mask;
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on that register. */
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int
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print_insn_sparc (memaddr, info)
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bfd_vma memaddr;
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disassemble_info *info;
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print_insn_sparc (bfd_vma memaddr, disassemble_info *info)
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{
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FILE *stream = info->stream;
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bfd_byte buffer[4];
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unsigned long insn;
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register struct opcode_hash *op;
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sparc_opcode_hash *op;
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/* Nonzero of opcode table has been initialized. */
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static int opcodes_initialized = 0;
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/* bfd mach number of last call. */
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@ -234,8 +457,8 @@ print_insn_sparc (memaddr, info)
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current_arch_mask = compute_arch_mask (info->mach);
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if (!opcodes_initialized)
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sorted_opcodes = (const struct sparc_opcode **)
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||||
xmalloc (sparc_num_opcodes * sizeof (struct sparc_opcode *));
|
||||
sorted_opcodes =
|
||||
xmalloc (sparc_num_opcodes * sizeof (sparc_opcode *));
|
||||
/* Reset the sorted table so we can resort it. */
|
||||
for (i = 0; i < sparc_num_opcodes; ++i)
|
||||
sorted_opcodes[i] = &sparc_opcodes[i];
|
||||
|
|
@ -250,6 +473,7 @@ print_insn_sparc (memaddr, info)
|
|||
{
|
||||
int status =
|
||||
(*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info);
|
||||
|
||||
if (status != 0)
|
||||
{
|
||||
(*info->memory_error_func) (status, memaddr, info);
|
||||
|
|
@ -273,7 +497,7 @@ print_insn_sparc (memaddr, info)
|
|||
|
||||
for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next)
|
||||
{
|
||||
const struct sparc_opcode *opcode = op->opcode;
|
||||
const sparc_opcode *opcode = op->opcode;
|
||||
|
||||
/* If the insn isn't supported by the current architecture, skip it. */
|
||||
if (! (opcode->architecture & current_arch_mask))
|
||||
|
|
@ -290,7 +514,7 @@ print_insn_sparc (memaddr, info)
|
|||
/* Nonzero means that we have found a plus sign in the args
|
||||
field of the opcode table. */
|
||||
int found_plus = 0;
|
||||
|
||||
|
||||
/* Nonzero means we have an annulled branch. */
|
||||
int is_annulled = 0;
|
||||
|
||||
|
|
@ -313,7 +537,7 @@ print_insn_sparc (memaddr, info)
|
|||
(*info->fprintf_func) (stream, opcode->name);
|
||||
|
||||
{
|
||||
register const char *s;
|
||||
const char *s;
|
||||
|
||||
if (opcode->args[0] != ',')
|
||||
(*info->fprintf_func) (stream, " ");
|
||||
|
|
@ -347,13 +571,13 @@ print_insn_sparc (memaddr, info)
|
|||
}
|
||||
|
||||
(*info->fprintf_func) (stream, " ");
|
||||
|
||||
|
||||
switch (*s)
|
||||
{
|
||||
case '+':
|
||||
found_plus = 1;
|
||||
/* Fall through. */
|
||||
|
||||
/* note fall-through */
|
||||
default:
|
||||
(*info->fprintf_func) (stream, "%c", *s);
|
||||
break;
|
||||
|
|
@ -383,24 +607,24 @@ print_insn_sparc (memaddr, info)
|
|||
case 'e':
|
||||
freg (X_RS1 (insn));
|
||||
break;
|
||||
case 'v': /* double/even */
|
||||
case 'V': /* quad/multiple of 4 */
|
||||
case 'v': /* Double/even. */
|
||||
case 'V': /* Quad/multiple of 4. */
|
||||
fregx (X_RS1 (insn));
|
||||
break;
|
||||
|
||||
case 'f':
|
||||
freg (X_RS2 (insn));
|
||||
break;
|
||||
case 'B': /* double/even */
|
||||
case 'R': /* quad/multiple of 4 */
|
||||
case 'B': /* Double/even. */
|
||||
case 'R': /* Quad/multiple of 4. */
|
||||
fregx (X_RS2 (insn));
|
||||
break;
|
||||
|
||||
case 'g':
|
||||
freg (X_RD (insn));
|
||||
break;
|
||||
case 'H': /* double/even */
|
||||
case 'J': /* quad/multiple of 4 */
|
||||
case 'H': /* Double/even. */
|
||||
case 'J': /* Quad/multiple of 4. */
|
||||
fregx (X_RD (insn));
|
||||
break;
|
||||
#undef freg
|
||||
|
|
@ -426,9 +650,9 @@ print_insn_sparc (memaddr, info)
|
|||
& ((int) X_IMM22 (insn) << 10)));
|
||||
break;
|
||||
|
||||
case 'i': /* 13 bit immediate */
|
||||
case 'I': /* 11 bit immediate */
|
||||
case 'j': /* 10 bit immediate */
|
||||
case 'i': /* 13 bit immediate. */
|
||||
case 'I': /* 11 bit immediate. */
|
||||
case 'j': /* 10 bit immediate. */
|
||||
{
|
||||
int imm;
|
||||
|
||||
|
|
@ -448,7 +672,7 @@ print_insn_sparc (memaddr, info)
|
|||
not before it. */
|
||||
if (found_plus)
|
||||
imm_added_to_rs1 = 1;
|
||||
|
||||
|
||||
if (imm <= 9)
|
||||
(*info->fprintf_func) (stream, "%d", imm);
|
||||
else
|
||||
|
|
@ -456,8 +680,8 @@ print_insn_sparc (memaddr, info)
|
|||
}
|
||||
break;
|
||||
|
||||
case 'X': /* 5 bit unsigned immediate */
|
||||
case 'Y': /* 6 bit unsigned immediate */
|
||||
case 'X': /* 5 bit unsigned immediate. */
|
||||
case 'Y': /* 6 bit unsigned immediate. */
|
||||
{
|
||||
int imm = X_IMM (insn, *s == 'X' ? 5 : 6);
|
||||
|
||||
|
|
@ -532,7 +756,7 @@ print_insn_sparc (memaddr, info)
|
|||
case 'o':
|
||||
(*info->fprintf_func) (stream, "%%asi");
|
||||
break;
|
||||
|
||||
|
||||
case 'W':
|
||||
(*info->fprintf_func) (stream, "%%tick");
|
||||
break;
|
||||
|
|
@ -585,15 +809,15 @@ print_insn_sparc (memaddr, info)
|
|||
(*info->fprintf_func) (stream, "%d", X_RD (insn));
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
case 'M':
|
||||
(*info->fprintf_func) (stream, "%%asr%d", X_RS1 (insn));
|
||||
break;
|
||||
|
||||
|
||||
case 'm':
|
||||
(*info->fprintf_func) (stream, "%%asr%d", X_RD (insn));
|
||||
break;
|
||||
|
||||
|
||||
case 'L':
|
||||
info->target = memaddr + SEX (X_DISP30 (insn), 30) * 4;
|
||||
(*info->print_address_func) (info->target, info);
|
||||
|
|
@ -725,7 +949,7 @@ print_insn_sparc (memaddr, info)
|
|||
&& X_RD (prev_insn) == X_RS1 (insn))
|
||||
{
|
||||
(*info->fprintf_func) (stream, "\t! ");
|
||||
info->target =
|
||||
info->target =
|
||||
((unsigned) 0xFFFFFFFF
|
||||
& ((int) X_IMM22 (prev_insn) << 10));
|
||||
if (imm_added_to_rs1)
|
||||
|
|
@ -741,7 +965,7 @@ print_insn_sparc (memaddr, info)
|
|||
|
||||
if (opcode->flags & (F_UNBR|F_CONDBR|F_JSR))
|
||||
{
|
||||
/* FIXME -- check is_annulled flag */
|
||||
/* FIXME -- check is_annulled flag. */
|
||||
if (opcode->flags & F_UNBR)
|
||||
info->insn_type = dis_branch;
|
||||
if (opcode->flags & F_CONDBR)
|
||||
|
|
@ -760,234 +984,3 @@ print_insn_sparc (memaddr, info)
|
|||
(*info->fprintf_func) (stream, _("unknown"));
|
||||
return sizeof (buffer);
|
||||
}
|
||||
|
||||
/* Given BFD mach number, return a mask of SPARC_OPCODE_ARCH_FOO values. */
|
||||
|
||||
static int
|
||||
compute_arch_mask (mach)
|
||||
unsigned long mach;
|
||||
{
|
||||
switch (mach)
|
||||
{
|
||||
case 0 :
|
||||
case bfd_mach_sparc :
|
||||
return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V8);
|
||||
case bfd_mach_sparc_sparclet :
|
||||
return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_SPARCLET);
|
||||
case bfd_mach_sparc_sparclite :
|
||||
case bfd_mach_sparc_sparclite_le :
|
||||
/* sparclites insns are recognized by default (because that's how
|
||||
they've always been treated, for better or worse). Kludge this by
|
||||
indicating generic v8 is also selected. */
|
||||
return (SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_SPARCLITE)
|
||||
| SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V8));
|
||||
case bfd_mach_sparc_v8plus :
|
||||
case bfd_mach_sparc_v9 :
|
||||
return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9);
|
||||
case bfd_mach_sparc_v8plusa :
|
||||
case bfd_mach_sparc_v9a :
|
||||
return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9A);
|
||||
case bfd_mach_sparc_v8plusb :
|
||||
case bfd_mach_sparc_v9b :
|
||||
return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9B);
|
||||
}
|
||||
abort ();
|
||||
}
|
||||
|
||||
/* Compare opcodes A and B. */
|
||||
|
||||
static int
|
||||
compare_opcodes (a, b)
|
||||
const PTR a;
|
||||
const PTR b;
|
||||
{
|
||||
struct sparc_opcode *op0 = * (struct sparc_opcode **) a;
|
||||
struct sparc_opcode *op1 = * (struct sparc_opcode **) b;
|
||||
unsigned long int match0 = op0->match, match1 = op1->match;
|
||||
unsigned long int lose0 = op0->lose, lose1 = op1->lose;
|
||||
register unsigned int i;
|
||||
|
||||
/* If one (and only one) insn isn't supported by the current architecture,
|
||||
prefer the one that is. If neither are supported, but they're both for
|
||||
the same architecture, continue processing. Otherwise (both unsupported
|
||||
and for different architectures), prefer lower numbered arch's (fudged
|
||||
by comparing the bitmasks). */
|
||||
if (op0->architecture & current_arch_mask)
|
||||
{
|
||||
if (! (op1->architecture & current_arch_mask))
|
||||
return -1;
|
||||
}
|
||||
else
|
||||
{
|
||||
if (op1->architecture & current_arch_mask)
|
||||
return 1;
|
||||
else if (op0->architecture != op1->architecture)
|
||||
return op0->architecture - op1->architecture;
|
||||
}
|
||||
|
||||
/* If a bit is set in both match and lose, there is something
|
||||
wrong with the opcode table. */
|
||||
if (match0 & lose0)
|
||||
{
|
||||
fprintf
|
||||
(stderr,
|
||||
/* xgettext:c-format */
|
||||
_("Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"),
|
||||
op0->name, match0, lose0);
|
||||
op0->lose &= ~op0->match;
|
||||
lose0 = op0->lose;
|
||||
}
|
||||
|
||||
if (match1 & lose1)
|
||||
{
|
||||
fprintf
|
||||
(stderr,
|
||||
/* xgettext:c-format */
|
||||
_("Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"),
|
||||
op1->name, match1, lose1);
|
||||
op1->lose &= ~op1->match;
|
||||
lose1 = op1->lose;
|
||||
}
|
||||
|
||||
/* Because the bits that are variable in one opcode are constant in
|
||||
another, it is important to order the opcodes in the right order. */
|
||||
for (i = 0; i < 32; ++i)
|
||||
{
|
||||
unsigned long int x = 1 << i;
|
||||
int x0 = (match0 & x) != 0;
|
||||
int x1 = (match1 & x) != 0;
|
||||
|
||||
if (x0 != x1)
|
||||
return x1 - x0;
|
||||
}
|
||||
|
||||
for (i = 0; i < 32; ++i)
|
||||
{
|
||||
unsigned long int x = 1 << i;
|
||||
int x0 = (lose0 & x) != 0;
|
||||
int x1 = (lose1 & x) != 0;
|
||||
|
||||
if (x0 != x1)
|
||||
return x1 - x0;
|
||||
}
|
||||
|
||||
/* They are functionally equal. So as long as the opcode table is
|
||||
valid, we can put whichever one first we want, on aesthetic grounds. */
|
||||
|
||||
/* Our first aesthetic ground is that aliases defer to real insns. */
|
||||
{
|
||||
int alias_diff = (op0->flags & F_ALIAS) - (op1->flags & F_ALIAS);
|
||||
if (alias_diff != 0)
|
||||
/* Put the one that isn't an alias first. */
|
||||
return alias_diff;
|
||||
}
|
||||
|
||||
/* Except for aliases, two "identical" instructions had
|
||||
better have the same opcode. This is a sanity check on the table. */
|
||||
i = strcmp (op0->name, op1->name);
|
||||
if (i)
|
||||
{
|
||||
if (op0->flags & F_ALIAS) /* If they're both aliases, be arbitrary. */
|
||||
return i;
|
||||
else
|
||||
fprintf (stderr,
|
||||
/* xgettext:c-format */
|
||||
_("Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"),
|
||||
op0->name, op1->name);
|
||||
}
|
||||
|
||||
/* Fewer arguments are preferred. */
|
||||
{
|
||||
int length_diff = strlen (op0->args) - strlen (op1->args);
|
||||
if (length_diff != 0)
|
||||
/* Put the one with fewer arguments first. */
|
||||
return length_diff;
|
||||
}
|
||||
|
||||
/* Put 1+i before i+1. */
|
||||
{
|
||||
char *p0 = (char *) strchr (op0->args, '+');
|
||||
char *p1 = (char *) strchr (op1->args, '+');
|
||||
|
||||
if (p0 && p1)
|
||||
{
|
||||
/* There is a plus in both operands. Note that a plus
|
||||
sign cannot be the first character in args,
|
||||
so the following [-1]'s are valid. */
|
||||
if (p0[-1] == 'i' && p1[1] == 'i')
|
||||
/* op0 is i+1 and op1 is 1+i, so op1 goes first. */
|
||||
return 1;
|
||||
if (p0[1] == 'i' && p1[-1] == 'i')
|
||||
/* op0 is 1+i and op1 is i+1, so op0 goes first. */
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
/* Put 1,i before i,1. */
|
||||
{
|
||||
int i0 = strncmp (op0->args, "i,1", 3) == 0;
|
||||
int i1 = strncmp (op1->args, "i,1", 3) == 0;
|
||||
|
||||
if (i0 ^ i1)
|
||||
return i0 - i1;
|
||||
}
|
||||
|
||||
/* They are, as far as we can tell, identical.
|
||||
Since qsort may have rearranged the table partially, there is
|
||||
no way to tell which one was first in the opcode table as
|
||||
written, so just say there are equal. */
|
||||
/* ??? This is no longer true now that we sort a vector of pointers,
|
||||
not the table itself. */
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Build a hash table from the opcode table.
|
||||
OPCODE_TABLE is a sorted list of pointers into the opcode table. */
|
||||
|
||||
static void
|
||||
build_hash_table (opcode_table, hash_table, num_opcodes)
|
||||
const struct sparc_opcode **opcode_table;
|
||||
struct opcode_hash **hash_table;
|
||||
int num_opcodes;
|
||||
{
|
||||
register int i;
|
||||
int hash_count[HASH_SIZE];
|
||||
static struct opcode_hash *hash_buf = NULL;
|
||||
|
||||
/* Start at the end of the table and work backwards so that each
|
||||
chain is sorted. */
|
||||
|
||||
memset (hash_table, 0, HASH_SIZE * sizeof (hash_table[0]));
|
||||
memset (hash_count, 0, HASH_SIZE * sizeof (hash_count[0]));
|
||||
if (hash_buf != NULL)
|
||||
free (hash_buf);
|
||||
hash_buf = (struct opcode_hash *) xmalloc (sizeof (struct opcode_hash) * num_opcodes);
|
||||
for (i = num_opcodes - 1; i >= 0; --i)
|
||||
{
|
||||
register int hash = HASH_INSN (opcode_table[i]->match);
|
||||
register struct opcode_hash *h = &hash_buf[i];
|
||||
h->next = hash_table[hash];
|
||||
h->opcode = opcode_table[i];
|
||||
hash_table[hash] = h;
|
||||
++hash_count[hash];
|
||||
}
|
||||
|
||||
#if 0 /* for debugging */
|
||||
{
|
||||
int min_count = num_opcodes, max_count = 0;
|
||||
int total;
|
||||
|
||||
for (i = 0; i < HASH_SIZE; ++i)
|
||||
{
|
||||
if (hash_count[i] < min_count)
|
||||
min_count = hash_count[i];
|
||||
if (hash_count[i] > max_count)
|
||||
max_count = hash_count[i];
|
||||
total += hash_count[i];
|
||||
}
|
||||
|
||||
printf ("Opcode hash table stats: min %d, max %d, ave %f\n",
|
||||
min_count, max_count, (double) total / HASH_SIZE);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue