2005-05-23 Orjan Friberg <orjanf@axis.com>
* linux-cris-low.c: New file with support for CRIS. * linux-crisv32-low.c: Ditto for CRISv32. * Makefile.in (SFILES): Add linux-cris-low.c, linux-crisv32-low.c. (clean): Add reg-cris.c and reg-crisv32.c. Add linux-cris-low.o, linux-crisv32-low.o, reg-cris.o, reg-cris.c, reg-crisv32.o, and reg-crisv32.c to make rules. * configure.srv: Add cris-*-linux* and crisv32-*-linux* to list of recognized targets.
This commit is contained in:
Orjan Friberg
parent
64c5f205ba
commit
45b134e593
5 changed files with 536 additions and 1 deletions
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@ -1,3 +1,15 @@
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2005-05-23 Orjan Friberg <orjanf@axis.com>
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* linux-cris-low.c: New file with support for CRIS.
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* linux-crisv32-low.c: Ditto for CRISv32.
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* Makefile.in (SFILES): Add linux-cris-low.c, linux-crisv32-low.c.
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(clean): Add reg-cris.c and reg-crisv32.c.
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Add linux-cris-low.o, linux-crisv32-low.o, reg-cris.o, reg-cris.c,
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reg-crisv32.o, and reg-crisv32.c to make rules.
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* configure.srv: Add cris-*-linux* and crisv32-*-linux* to list of
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recognized targets.
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2005-05-16 Ulrich Weigand <uweigand@de.ibm.com>
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* linux-low.c (fetch_register): Ensure buffer size is a multiple
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@ -118,7 +118,8 @@ SFILES= $(srcdir)/gdbreplay.c $(srcdir)/inferiors.c \
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$(srcdir)/mem-break.c $(srcdir)/proc-service.c $(srcdir)/regcache.c \
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$(srcdir)/remote-utils.c $(srcdir)/server.c $(srcdir)/target.c \
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$(srcdir)/thread-db.c $(srcdir)/utils.c \
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$(srcdir)/linux-arm-low.c $(srcdir)/linux-i386-low.c \
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$(srcdir)/linux-arm-low.c $(srcdir)/linux-cris-low.c \
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$(srcdir)/linux-crisv32-low.c $(srcdir)/linux-i386-low.c \
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$(srcdir)/i387-fp.c \
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$(srcdir)/linux-ia64-low.c $(srcdir)/linux-low.c \
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$(srcdir)/linux-m32r-low.c \
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@ -201,6 +202,7 @@ clean:
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rm -f gdbserver gdbreplay core make.log
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rm -f reg-arm.c reg-i386.c reg-ia64.c reg-m32r.c reg-m68k.c reg-mips.c
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rm -f reg-ppc.c reg-sh.c reg-x86-64.c reg-i386-linux.c
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rm -f reg-cris.c reg-crisv32.c
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maintainer-clean realclean distclean: clean
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rm -f nm.h tm.h xm.h config.status config.h stamp-h config.log
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@ -262,6 +264,8 @@ linux-low.o: linux-low.c $(linux_low_h) $(server_h)
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$(CC) -c $(CPPFLAGS) $(INTERNAL_CFLAGS) $< @USE_THREAD_DB@
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linux-arm-low.o: linux-arm-low.c $(linux_low_h) $(server_h)
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linux-cris-low.o: linux-cris-low.c $(linux_low_h) $(server_h)
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linux-crisv32-low.o: linux-crisv32-low.c $(linux_low_h) $(server_h)
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linux-i386-low.o: linux-i386-low.c $(linux_low_h) $(server_h)
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linux-ia64-low.o: linux-ia64-low.c $(linux_low_h) $(server_h)
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linux-m32r-low.o: linux-m32r-low.c $(linux_low_h) $(server_h)
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@ -274,6 +278,12 @@ linux-x86-64-low.o: linux-x86-64-low.c $(linux_low_h) $(server_h)
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reg-arm.o : reg-arm.c $(regdef_h)
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reg-arm.c : $(srcdir)/../regformats/reg-arm.dat $(regdat_sh)
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sh $(regdat_sh) $(srcdir)/../regformats/reg-arm.dat reg-arm.c
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reg-cris.o : reg-cris.c $(regdef_h)
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reg-cris.c : $(srcdir)/../regformats/reg-cris.dat $(regdat_sh)
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sh $(regdat_sh) $(srcdir)/../regformats/reg-cris.dat reg-cris.c
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reg-crisv32.o : reg-crisv32.c $(regdef_h)
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reg-crisv32.c : $(srcdir)/../regformats/reg-crisv32.dat $(regdat_sh)
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sh $(regdat_sh) $(srcdir)/../regformats/reg-crisv32.dat reg-crisv32.c
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reg-i386.o : reg-i386.c $(regdef_h)
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reg-i386.c : $(srcdir)/../regformats/reg-i386.dat $(regdat_sh)
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sh $(regdat_sh) $(srcdir)/../regformats/reg-i386.dat reg-i386.c
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@ -23,6 +23,16 @@ case "${target}" in
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srv_linux_usrregs=yes
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srv_linux_thread_db=yes
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;;
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crisv32-*-linux*) srv_regobj=reg-crisv32.o
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srv_tgtobj="linux-low.o linux-crisv32-low.o"
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srv_linux_regsets=yes
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srv_linux_thread_db=yes
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;;
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cris-*-linux*) srv_regobj=reg-cris.o
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srv_tgtobj="linux-low.o linux-cris-low.o"
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srv_linux_usrregs=yes
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srv_linux_thread_db=yes
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;;
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i[34567]86-*-linux*) srv_regobj=reg-i386-linux.o
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srv_tgtobj="linux-low.o linux-i386-low.o i387-fp.o"
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srv_linux_usrregs=yes
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124
gdb/gdbserver/linux-cris-low.c
Normal file
124
gdb/gdbserver/linux-cris-low.c
Normal file
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@ -0,0 +1,124 @@
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/* GNU/Linux/CRIS specific low level interface, for the remote server for GDB.
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Copyright 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "server.h"
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#include "linux-low.h"
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#include <sys/ptrace.h>
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/* CRISv10 */
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#define cris_num_regs 32
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/* Locations need to match <include/asm/arch/ptrace.h>. */
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static int cris_regmap[] = {
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15*4, 14*4, 13*4, 12*4,
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11*4, 10*4, 9*4, 8*4,
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7*4, 6*4, 5*4, 4*4,
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3*4, 2*4, 23*4, 19*4,
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-1, -1, -1, -1,
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-1, 17*4, -1, 16*4,
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-1, -1, -1, 18*4,
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-1, 17*4, -1, -1
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};
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static int
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cris_cannot_store_register (int regno)
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{
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if (cris_regmap[regno] == -1)
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return 1;
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return (regno >= cris_num_regs);
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}
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static int
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cris_cannot_fetch_register (int regno)
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{
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if (cris_regmap[regno] == -1)
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return 1;
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return (regno >= cris_num_regs);
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}
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extern int debug_threads;
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static CORE_ADDR
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cris_get_pc (void)
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{
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unsigned long pc;
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collect_register_by_name ("pc", &pc);
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if (debug_threads)
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fprintf (stderr, "stop pc is %08lx\n", pc);
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return pc;
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}
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static void
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cris_set_pc (CORE_ADDR pc)
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{
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unsigned long newpc = pc;
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supply_register_by_name ("pc", &newpc);
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}
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static const unsigned short cris_breakpoint = 0xe938;
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#define cris_breakpoint_len 2
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static int
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cris_breakpoint_at (CORE_ADDR where)
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{
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unsigned short insn;
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(*the_target->read_memory) (where, (char *) &insn, cris_breakpoint_len);
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if (insn == cris_breakpoint)
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return 1;
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/* If necessary, recognize more trap instructions here. GDB only uses the
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one. */
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return 0;
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}
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/* We only place breakpoints in empty marker functions, and thread locking
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is outside of the function. So rather than importing software single-step,
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we can just run until exit. */
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static CORE_ADDR
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cris_reinsert_addr (void)
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{
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unsigned long pc;
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collect_register_by_name ("srp", &pc);
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return pc;
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}
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struct linux_target_ops the_low_target = {
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cris_num_regs,
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cris_regmap,
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cris_cannot_fetch_register,
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cris_cannot_store_register,
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cris_get_pc,
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cris_set_pc,
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(const char *) &cris_breakpoint,
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cris_breakpoint_len,
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cris_reinsert_addr,
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0,
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cris_breakpoint_at,
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0,
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0,
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0,
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0,
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};
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379
gdb/gdbserver/linux-crisv32-low.c
Normal file
379
gdb/gdbserver/linux-crisv32-low.c
Normal file
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@ -0,0 +1,379 @@
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/* GNU/Linux/CRIS specific low level interface, for the remote server for GDB.
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Copyright 1995, 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
|
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include "server.h"
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#include "linux-low.h"
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#include <sys/ptrace.h>
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/* CRISv32 */
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#define cris_num_regs 49
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/* Note: Ignoring USP (having the stack pointer in two locations causes trouble
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without any significant gain). */
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/* Locations need to match <include/asm/arch/ptrace.h>. */
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static int cris_regmap[] = {
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1*4, 2*4, 3*4, 4*4,
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5*4, 6*4, 7*4, 8*4,
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9*4, 10*4, 11*4, 12*4,
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13*4, 14*4, 24*4, 15*4,
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-1, -1, -1, 16*4,
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-1, 22*4, 23*4, 17*4,
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-1, -1, 21*4, 20*4,
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-1, 19*4, -1, 18*4,
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25*4,
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26*4, -1, -1, 29*4,
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30*4, 31*4, 32*4, 33*4,
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34*4, 35*4, 36*4, 37*4,
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38*4, 39*4, 40*4, -1
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};
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extern int debug_threads;
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static CORE_ADDR
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cris_get_pc (void)
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{
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unsigned long pc;
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collect_register_by_name ("pc", &pc);
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if (debug_threads)
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fprintf (stderr, "stop pc is %08lx\n", pc);
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return pc;
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}
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static void
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cris_set_pc (CORE_ADDR pc)
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{
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unsigned long newpc = pc;
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supply_register_by_name ("pc", &newpc);
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}
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static const unsigned short cris_breakpoint = 0xe938;
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#define cris_breakpoint_len 2
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static int
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cris_breakpoint_at (CORE_ADDR where)
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{
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unsigned short insn;
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(*the_target->read_memory) (where, (char *) &insn, cris_breakpoint_len);
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if (insn == cris_breakpoint)
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return 1;
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/* If necessary, recognize more trap instructions here. GDB only uses the
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one. */
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return 0;
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}
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/* We only place breakpoints in empty marker functions, and thread locking
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is outside of the function. So rather than importing software single-step,
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we can just run until exit. */
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/* FIXME: This function should not be needed, since we have PTRACE_SINGLESTEP
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for CRISv32. Without it, td_ta_event_getmsg in thread_db_create_event
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will fail when debugging multi-threaded applications. */
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static CORE_ADDR
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cris_reinsert_addr (void)
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{
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unsigned long pc;
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collect_register_by_name ("srp", &pc);
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return pc;
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}
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static void
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cris_write_data_breakpoint (int bp, unsigned long start, unsigned long end)
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{
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switch (bp)
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{
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case 0:
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supply_register_by_name ("s3", &start);
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supply_register_by_name ("s4", &end);
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break;
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case 1:
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supply_register_by_name ("s5", &start);
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supply_register_by_name ("s6", &end);
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break;
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case 2:
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supply_register_by_name ("s7", &start);
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supply_register_by_name ("s8", &end);
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break;
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case 3:
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supply_register_by_name ("s9", &start);
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supply_register_by_name ("s10", &end);
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break;
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case 4:
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supply_register_by_name ("s11", &start);
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supply_register_by_name ("s12", &end);
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break;
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case 5:
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supply_register_by_name ("s13", &start);
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supply_register_by_name ("s14", &end);
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break;
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}
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}
|
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static int
|
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cris_insert_watchpoint (char type, CORE_ADDR addr, int len)
|
||||
{
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int bp;
|
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unsigned long bp_ctrl;
|
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unsigned long start, end;
|
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unsigned long ccs;
|
||||
|
||||
/* Breakpoint/watchpoint types (GDB terminology):
|
||||
0 = memory breakpoint for instructions
|
||||
(not supported; done via memory write instead)
|
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1 = hardware breakpoint for instructions (not supported)
|
||||
2 = write watchpoint (supported)
|
||||
3 = read watchpoint (supported)
|
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4 = access watchpoint (supported). */
|
||||
|
||||
if (type < '2' || type > '4')
|
||||
{
|
||||
/* Unsupported. */
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Read watchpoints are set as access watchpoints, because of GDB's
|
||||
inability to deal with pure read watchpoints. */
|
||||
if (type == '3')
|
||||
type = '4';
|
||||
|
||||
/* Get the configuration register. */
|
||||
collect_register_by_name ("s0", &bp_ctrl);
|
||||
|
||||
/* The watchpoint allocation scheme is the simplest possible.
|
||||
For example, if a region is watched for read and
|
||||
a write watch is requested, a new watchpoint will
|
||||
be used. Also, if a watch for a region that is already
|
||||
covered by one or more existing watchpoints, a new
|
||||
watchpoint will be used. */
|
||||
|
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/* First, find a free data watchpoint. */
|
||||
for (bp = 0; bp < 6; bp++)
|
||||
{
|
||||
/* Each data watchpoint's control registers occupy 2 bits
|
||||
(hence the 3), starting at bit 2 for D0 (hence the 2)
|
||||
with 4 bits between for each watchpoint (yes, the 4). */
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if (!(bp_ctrl & (0x3 << (2 + (bp * 4)))))
|
||||
break;
|
||||
}
|
||||
|
||||
if (bp > 5)
|
||||
{
|
||||
/* We're out of watchpoints. */
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Configure the control register first. */
|
||||
if (type == '3' || type == '4')
|
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{
|
||||
/* Trigger on read. */
|
||||
bp_ctrl |= (1 << (2 + bp * 4));
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||||
}
|
||||
if (type == '2' || type == '4')
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||||
{
|
||||
/* Trigger on write. */
|
||||
bp_ctrl |= (2 << (2 + bp * 4));
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||||
}
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|
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/* Setup the configuration register. */
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supply_register_by_name ("s0", &bp_ctrl);
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/* Setup the range. */
|
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start = addr;
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||||
end = addr + len - 1;
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|
||||
/* Configure the watchpoint register. */
|
||||
cris_write_data_breakpoint (bp, start, end);
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||||
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||||
collect_register_by_name ("ccs", &ccs);
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/* Set the S1 flag to enable watchpoints. */
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||||
ccs |= (1 << 19);
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||||
supply_register_by_name ("ccs", &ccs);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
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cris_remove_watchpoint (char type, CORE_ADDR addr, int len)
|
||||
{
|
||||
int bp;
|
||||
unsigned long bp_ctrl;
|
||||
unsigned long start, end;
|
||||
|
||||
/* Breakpoint/watchpoint types:
|
||||
0 = memory breakpoint for instructions
|
||||
(not supported; done via memory write instead)
|
||||
1 = hardware breakpoint for instructions (not supported)
|
||||
2 = write watchpoint (supported)
|
||||
3 = read watchpoint (supported)
|
||||
4 = access watchpoint (supported). */
|
||||
if (type < '2' || type > '4')
|
||||
return -1;
|
||||
|
||||
/* Read watchpoints are set as access watchpoints, because of GDB's
|
||||
inability to deal with pure read watchpoints. */
|
||||
if (type == '3')
|
||||
type = '4';
|
||||
|
||||
/* Get the configuration register. */
|
||||
collect_register_by_name ("s0", &bp_ctrl);
|
||||
|
||||
/* Try to find a watchpoint that is configured for the
|
||||
specified range, then check that read/write also matches. */
|
||||
|
||||
/* Ugly pointer arithmetic, since I cannot rely on a
|
||||
single switch (addr) as there may be several watchpoints with
|
||||
the same start address for example. */
|
||||
|
||||
unsigned long bp_d_regs[12];
|
||||
|
||||
/* Get all range registers to simplify search. */
|
||||
collect_register_by_name ("s3", &bp_d_regs[0]);
|
||||
collect_register_by_name ("s4", &bp_d_regs[1]);
|
||||
collect_register_by_name ("s5", &bp_d_regs[2]);
|
||||
collect_register_by_name ("s6", &bp_d_regs[3]);
|
||||
collect_register_by_name ("s7", &bp_d_regs[4]);
|
||||
collect_register_by_name ("s8", &bp_d_regs[5]);
|
||||
collect_register_by_name ("s9", &bp_d_regs[6]);
|
||||
collect_register_by_name ("s10", &bp_d_regs[7]);
|
||||
collect_register_by_name ("s11", &bp_d_regs[8]);
|
||||
collect_register_by_name ("s12", &bp_d_regs[9]);
|
||||
collect_register_by_name ("s13", &bp_d_regs[10]);
|
||||
collect_register_by_name ("s14", &bp_d_regs[11]);
|
||||
|
||||
for (bp = 0; bp < 6; bp++)
|
||||
{
|
||||
if (bp_d_regs[bp * 2] == addr
|
||||
&& bp_d_regs[bp * 2 + 1] == (addr + len - 1)) {
|
||||
/* Matching range. */
|
||||
int bitpos = 2 + bp * 4;
|
||||
int rw_bits;
|
||||
|
||||
/* Read/write bits for this BP. */
|
||||
rw_bits = (bp_ctrl & (0x3 << bitpos)) >> bitpos;
|
||||
|
||||
if ((type == '3' && rw_bits == 0x1)
|
||||
|| (type == '2' && rw_bits == 0x2)
|
||||
|| (type == '4' && rw_bits == 0x3))
|
||||
{
|
||||
/* Read/write matched. */
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (bp > 5)
|
||||
{
|
||||
/* No watchpoint matched. */
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Found a matching watchpoint. Now, deconfigure it by
|
||||
both disabling read/write in bp_ctrl and zeroing its
|
||||
start/end addresses. */
|
||||
bp_ctrl &= ~(3 << (2 + (bp * 4)));
|
||||
/* Setup the configuration register. */
|
||||
supply_register_by_name ("s0", &bp_ctrl);
|
||||
|
||||
start = end = 0;
|
||||
/* Configure the watchpoint register. */
|
||||
cris_write_data_breakpoint (bp, start, end);
|
||||
|
||||
/* Note that we don't clear the S1 flag here. It's done when continuing. */
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
cris_stopped_by_watchpoint (void)
|
||||
{
|
||||
unsigned long exs;
|
||||
|
||||
collect_register_by_name ("exs", &exs);
|
||||
|
||||
return (((exs & 0xff00) >> 8) == 0xc);
|
||||
}
|
||||
|
||||
static CORE_ADDR
|
||||
cris_stopped_data_address (void)
|
||||
{
|
||||
unsigned long eda;
|
||||
|
||||
collect_register_by_name ("eda", &eda);
|
||||
|
||||
/* FIXME: Possibly adjust to match watched range. */
|
||||
return eda;
|
||||
}
|
||||
|
||||
static void
|
||||
cris_fill_gregset (void *buf)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < cris_num_regs; i++)
|
||||
{
|
||||
if (cris_regmap[i] != -1)
|
||||
collect_register (i, ((char *) buf) + cris_regmap[i]);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
cris_store_gregset (const void *buf)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < cris_num_regs; i++)
|
||||
{
|
||||
if (cris_regmap[i] != -1)
|
||||
supply_register (i, ((char *) buf) + cris_regmap[i]);
|
||||
}
|
||||
}
|
||||
|
||||
typedef unsigned long elf_gregset_t[cris_num_regs];
|
||||
|
||||
struct regset_info target_regsets[] = {
|
||||
{ PTRACE_GETREGS, PTRACE_SETREGS, sizeof (elf_gregset_t),
|
||||
GENERAL_REGS, cris_fill_gregset, cris_store_gregset },
|
||||
{ 0, 0, -1, -1, NULL, NULL }
|
||||
};
|
||||
|
||||
struct linux_target_ops the_low_target = {
|
||||
-1,
|
||||
NULL,
|
||||
NULL,
|
||||
NULL,
|
||||
cris_get_pc,
|
||||
cris_set_pc,
|
||||
(const char *) &cris_breakpoint,
|
||||
cris_breakpoint_len,
|
||||
cris_reinsert_addr,
|
||||
0,
|
||||
cris_breakpoint_at,
|
||||
cris_insert_watchpoint,
|
||||
cris_remove_watchpoint,
|
||||
cris_stopped_by_watchpoint,
|
||||
cris_stopped_data_address,
|
||||
};
|
||||
Loading…
Add table
Reference in a new issue