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ubsan: m32c: left shift of negative value

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cpu/
	* m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
opcodes/
	* m32c-ibld.c: Regenerate.
This commit is contained in:
Alan Modra 2020-02-03 11:26:30 +10:30
parent ef4627faba
commit 44e4546fa2
4 changed files with 14 additions and 6 deletions
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4
cpu/ChangeLog
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@ -1,3 +1,7 @@
2020-02-03 Alan Modra <amodra@gmail.com>
* m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
2020-02-01 Alan Modra <amodra@gmail.com> 2020-02-01 Alan Modra <amodra@gmail.com>
* frv.cpu (f-u12): Multiply rather than left shift signed values. * frv.cpu (f-u12): Multiply rather than left shift signed values.

8
cpu/m32c.cpu
View file

@ -781,12 +781,12 @@
(df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT (df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT
((value pc) (ext INT ((value pc) (ext INT
(trunc HI (trunc HI
(or (and (srl value 8) #x00ff) (or (and (srl value 8) #xff)
(and (sll value 8) #xff00))))) ; insert (sll (and value #xff) 8))))) ; insert
((value pc) (ext INT ((value pc) (ext INT
(trunc HI (trunc HI
(or (and (srl value 8) #x00ff) (or (and (srl value 8) #xff)
(and (sll value 8) #xff00))))) ; extract (sll (and value #xff) 8))))) ; extract
) )
;------------------------------------------------------------- ;-------------------------------------------------------------

4
opcodes/ChangeLog
View file

@ -1,3 +1,7 @@
2020-02-03 Alan Modra <amodra@gmail.com>
* m32c-ibld.c: Regenerate.
2020-02-01 Alan Modra <amodra@gmail.com> 2020-02-01 Alan Modra <amodra@gmail.com>
* frv-ibld.c: Regenerate. * frv-ibld.c: Regenerate.

4
opcodes/m32c-ibld.c
View file

@ -1401,7 +1401,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
case M32C_OPERAND_IMM_64_HI : case M32C_OPERAND_IMM_64_HI :
{ {
long value = fields->f_dsp_64_s16; long value = fields->f_dsp_64_s16;
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer); errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
} }
break; break;
@ -2561,7 +2561,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
{ {
long value; long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value); length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))))))); value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) & (255))) << (8)))))));
fields->f_dsp_64_s16 = value; fields->f_dsp_64_s16 = value;
} }
break; break;