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2004-03-18 Andrew Cagney <cagney@redhat.com>

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* rs6000-tdep.c (skip_prologue): Record only the first LR save.
This commit is contained in:
Andrew Cagney 2004-03-18 20:30:08 +00:00
parent fc989b7a7c
commit 43b1ab882f
2 changed files with 23 additions and 2 deletions
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4
gdb/ChangeLog
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@ -1,3 +1,7 @@
2004-03-18 Andrew Cagney <cagney@redhat.com>
* rs6000-tdep.c (skip_prologue): Record only the first LR save.
2004-03-18 Andrew Cagney <cagney@redhat.com> 2004-03-18 Andrew Cagney <cagney@redhat.com>
* config/mips/tm-nbsd.h: Replace IN_SIGTRAMP with * config/mips/tm-nbsd.h: Replace IN_SIGTRAMP with

21
gdb/rs6000-tdep.c
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@ -551,9 +551,26 @@ skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
if ((op & 0xfc1fffff) == 0x7c0802a6) if ((op & 0xfc1fffff) == 0x7c0802a6)
{ /* mflr Rx */ { /* mflr Rx */
lr_reg = (op & 0x03e00000); /* Since shared library / PIC code, which needs to get its
continue; address at runtime, can appear to save more than one link
register vis:
*INDENT-OFF*
stwu r1,-304(r1)
mflr r3
bl 0xff570d0 (blrl)
stw r30,296(r1)
mflr r30
stw r31,300(r1)
stw r3,308(r1);
...
*INDENT-ON*
remember just the first one, but skip over additional
ones. */
if (lr_reg < 0)
lr_reg = (op & 0x03e00000);
continue;
} }
else if ((op & 0xfc1fffff) == 0x7c000026) else if ((op & 0xfc1fffff) == 0x7c000026)
{ /* mfcr Rx */ { /* mfcr Rx */