x86: replace EXxmm_mdq by EXVexWdqScalar
There's no need to have two operand specifiers / enumerators for the same purpose. This then renders xmm_mdq_mode unused.
This commit is contained in:
Jan Beulich
parent
825bd36cea
commit
4102be5cf9
3 changed files with 29 additions and 27 deletions
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@ -1,3 +1,11 @@
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2020-01-31 Jan Beulich <jbeulich@suse.com>
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* i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
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(intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
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(OP_E_memory): Replace xmm_mdq_mode case label by
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vex_scalar_w_dq_mode one.
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* i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
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2020-01-31 Jan Beulich <jbeulich@suse.com>
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* i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
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@ -907,7 +907,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vscalefs%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vscalefs%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F3830 */
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{
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@ -1021,7 +1021,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vgetexps%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS }, 0 },
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{ "vgetexps%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, 0 },
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},
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/* PREFIX_EVEX_0F3844 */
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{
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@ -1057,7 +1057,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vrcp14s%XW", { XMScalar, VexScalar, EXxmm_mdq }, 0 },
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{ "vrcp14s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, 0 },
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},
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/* PREFIX_EVEX_0F384E */
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{
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@ -1069,7 +1069,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vrsqrt14s%XW", { XMScalar, VexScalar, EXxmm_mdq }, 0 },
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{ "vrsqrt14s%XW", { XMScalar, VexScalar, EXVexWdqScalar }, 0 },
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},
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/* PREFIX_EVEX_0F3850 */
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{
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@ -1349,7 +1349,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfmadd132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F389A */
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{
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@ -1362,7 +1362,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfmsub132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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{ "v4fmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
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},
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/* PREFIX_EVEX_0F389C */
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@ -1375,7 +1375,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfnmadd132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfnmadd132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F389E */
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{
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@ -1387,7 +1387,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfnmsub132s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfnmsub132s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F38A0 */
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{
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@ -1435,7 +1435,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfmadd213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F38AA */
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{
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@ -1448,7 +1448,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfmsub213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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{ "v4fnmaddss", { XMScalar, VexScalar, Mxmm }, 0 },
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},
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/* PREFIX_EVEX_0F38AC */
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@ -1461,7 +1461,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfnmadd213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfnmadd213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F38AE */
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{
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@ -1473,7 +1473,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfnmsub213s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfnmsub213s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F38B4 */
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{
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@ -1509,7 +1509,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfmadd231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F38BA */
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{
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@ -1521,7 +1521,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfmsub231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F38BC */
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{
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@ -1533,7 +1533,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfnmadd231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfnmadd231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F38BE */
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{
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@ -1545,7 +1545,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfnmsub231s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexR }, 0 },
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{ "vfnmsub231s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexR }, 0 },
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},
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/* PREFIX_EVEX_0F38C4 */
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{
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@ -1617,7 +1617,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vrcp28s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS }, 0 },
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{ "vrcp28s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, 0 },
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},
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/* PREFIX_EVEX_0F38CC */
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{
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@ -1629,7 +1629,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vrsqrt28s%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS }, 0 },
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{ "vrsqrt28s%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS }, 0 },
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},
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/* PREFIX_EVEX_0F38CF */
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{
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@ -1827,7 +1827,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vgetmants%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS, Ib }, 0 },
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{ "vgetmants%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, 0 },
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},
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/* PREFIX_EVEX_0F3A38 */
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{
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@ -1905,7 +1905,7 @@
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vfixupimms%XW", { XMScalar, VexScalar, EXxmm_mdq, EXxEVexS, Ib }, 0 },
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{ "vfixupimms%XW", { XMScalar, VexScalar, EXVexWdqScalar, EXxEVexS, Ib }, 0 },
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},
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/* PREFIX_EVEX_0F3A56 */
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{
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@ -401,7 +401,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define EXxmm_mw { OP_EX, xmm_mw_mode }
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#define EXxmm_md { OP_EX, xmm_md_mode }
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#define EXxmm_mq { OP_EX, xmm_mq_mode }
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#define EXxmm_mdq { OP_EX, xmm_mdq_mode }
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#define EXxmmdw { OP_EX, xmmdw_mode }
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#define EXxmmqd { OP_EX, xmmqd_mode }
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#define EXymmq { OP_EX, ymmq_mode }
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@ -537,9 +536,6 @@ enum
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xmm_md_mode,
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/* XMM register or quad word memory operand */
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xmm_mq_mode,
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/* XMM register or double/quad word memory operand, depending on
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VEX.W. */
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xmm_mdq_mode,
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/* 16-byte XMM, word, double word or quad word operand. */
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xmmdw_mode,
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/* 16-byte XMM, double word, quad word operand or xmm word operand. */
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@ -13771,7 +13767,6 @@ intel_operand_size (int bytemode, int sizeflag)
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case o_mode:
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oappend ("OWORD PTR ");
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break;
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case xmm_mdq_mode:
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case vex_scalar_w_dq_mode:
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if (!need_vex)
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abort ();
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@ -14016,12 +14011,12 @@ OP_E_memory (int bytemode, int sizeflag)
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break;
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}
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/* fall through */
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case vex_scalar_w_dq_mode:
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case vex_vsib_d_w_dq_mode:
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case vex_vsib_d_w_d_mode:
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case vex_vsib_q_w_dq_mode:
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case vex_vsib_q_w_d_mode:
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case evex_x_gscat_mode:
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case xmm_mdq_mode:
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shift = vex.w ? 3 : 2;
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break;
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case x_mode:
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@ -15367,7 +15362,6 @@ OP_EX (int bytemode, int sizeflag)
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&& bytemode != xmm_mw_mode
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&& bytemode != xmm_md_mode
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&& bytemode != xmm_mq_mode
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&& bytemode != xmm_mdq_mode
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&& bytemode != xmmq_mode
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&& bytemode != evex_half_bcst_xmmq_mode
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&& bytemode != ymm_mode
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