2007-03-30 Paul Brook <paul@codesourcery.com>
gas/ * config/tc-arm.c (encode_thumb2_ldmstm): New function. (do_t_ldmstm): Generate 16-bit push/pop. Use encode_thumb2_ldmstm. (do_t_push_pop): Use encode_thumb2_ldmstm. gas/testsuite/ * gas/arm/thumb2_ldmstm.d: New test. * gas/arm/thumb2_ldmstm.s: New test.
This commit is contained in:
Paul Brook
parent
203890574d
commit
3c707909b2
5 changed files with 160 additions and 64 deletions
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@ -1,3 +1,9 @@
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2007-03-30 Paul Brook <paul@codesourcery.com>
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* config/tc-arm.c (encode_thumb2_ldmstm): New function.
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(do_t_ldmstm): Generate 16-bit push/pop. Use encode_thumb2_ldmstm.
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(do_t_push_pop): Use encode_thumb2_ldmstm.
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2007-03-29 DJ Delorie <dj@redhat.com>
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* config/tc-m32c.c (rl_for, relaxable): Protect argument.
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@ -9086,6 +9086,68 @@ do_t_it (void)
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inst.instruction |= cond << 4;
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}
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/* Helper function used for both push/pop and ldm/stm. */
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static void
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encode_thumb2_ldmstm (int base, unsigned mask, bfd_boolean writeback)
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{
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bfd_boolean load;
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load = (inst.instruction & (1 << 20)) != 0;
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if (mask & (1 << 13))
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inst.error = _("SP not allowed in register list");
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if (load)
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{
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if (mask & (1 << 14)
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&& mask & (1 << 15))
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inst.error = _("LR and PC should not both be in register list");
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if ((mask & (1 << base)) != 0
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&& writeback)
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as_warn (_("base register should not be in register list "
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"when written back"));
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}
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else
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{
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if (mask & (1 << 15))
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inst.error = _("PC not allowed in register list");
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if (mask & (1 << base))
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as_warn (_("value stored for r%d is UNPREDICTABLE"), base);
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}
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if ((mask & (mask - 1)) == 0)
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{
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/* Single register transfers implemented as str/ldr. */
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if (writeback)
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{
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if (inst.instruction & (1 << 23))
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inst.instruction = 0x00000b04; /* ia! -> [base], #4 */
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else
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inst.instruction = 0x00000d04; /* db! -> [base, #-4]! */
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}
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else
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{
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if (inst.instruction & (1 << 23))
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inst.instruction = 0x00800000; /* ia -> [base] */
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else
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inst.instruction = 0x00000c04; /* db -> [base, #-4] */
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}
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inst.instruction |= 0xf8400000;
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if (load)
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inst.instruction |= 0x00100000;
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mask = ffs(mask) - 1;
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mask <<= 12;
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}
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else if (writeback)
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inst.instruction |= WRITE_BACK;
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inst.instruction |= mask;
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inst.instruction |= base << 16;
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}
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static void
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do_t_ldmstm (void)
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{
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@ -9097,54 +9159,51 @@ do_t_ldmstm (void)
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if (unified_syntax)
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{
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bfd_boolean narrow;
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unsigned mask;
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narrow = FALSE;
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/* See if we can use a 16-bit instruction. */
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if (inst.instruction < 0xffff /* not ldmdb/stmdb */
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&& inst.size_req != 4
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&& inst.operands[0].reg <= 7
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&& !(inst.operands[1].imm & ~0xff)
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&& (inst.instruction == T_MNEM_stmia
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? inst.operands[0].writeback
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: (inst.operands[0].writeback
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== !(inst.operands[1].imm & (1 << inst.operands[0].reg)))))
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&& !(inst.operands[1].imm & ~0xff))
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{
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if (inst.instruction == T_MNEM_stmia
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&& (inst.operands[1].imm & (1 << inst.operands[0].reg))
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&& (inst.operands[1].imm & ((1 << inst.operands[0].reg) - 1)))
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as_warn (_("value stored for r%d is UNPREDICTABLE"),
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inst.operands[0].reg);
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mask = 1 << inst.operands[0].reg;
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inst.instruction = THUMB_OP16 (inst.instruction);
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inst.instruction |= inst.operands[0].reg << 8;
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inst.instruction |= inst.operands[1].imm;
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}
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else
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{
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if (inst.operands[1].imm & (1 << 13))
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as_warn (_("SP should not be in register list"));
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if (inst.instruction == T_MNEM_stmia)
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if (inst.operands[0].reg <= 7
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&& (inst.instruction == T_MNEM_stmia
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? inst.operands[0].writeback
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: (inst.operands[0].writeback
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== !(inst.operands[1].imm & mask))))
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{
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if (inst.operands[1].imm & (1 << 15))
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as_warn (_("PC should not be in register list"));
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if (inst.operands[1].imm & (1 << inst.operands[0].reg))
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if (inst.instruction == T_MNEM_stmia
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&& (inst.operands[1].imm & mask)
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&& (inst.operands[1].imm & (mask - 1)))
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as_warn (_("value stored for r%d is UNPREDICTABLE"),
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inst.operands[0].reg);
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inst.instruction = THUMB_OP16 (inst.instruction);
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inst.instruction |= inst.operands[0].reg << 8;
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inst.instruction |= inst.operands[1].imm;
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narrow = TRUE;
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}
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else
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else if (inst.operands[0] .reg == REG_SP
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&& inst.operands[0].writeback)
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{
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if (inst.operands[1].imm & (1 << 14)
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&& inst.operands[1].imm & (1 << 15))
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as_warn (_("LR and PC should not both be in register list"));
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if ((inst.operands[1].imm & (1 << inst.operands[0].reg))
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&& inst.operands[0].writeback)
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as_warn (_("base register should not be in register list "
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"when written back"));
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inst.instruction = THUMB_OP16 (inst.instruction == T_MNEM_stmia
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? T_MNEM_push : T_MNEM_pop);
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inst.instruction |= inst.operands[1].imm;
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narrow = TRUE;
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}
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}
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if (!narrow)
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{
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if (inst.instruction < 0xffff)
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inst.instruction = THUMB_OP32 (inst.instruction);
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inst.instruction |= inst.operands[0].reg << 16;
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inst.instruction |= inst.operands[1].imm;
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if (inst.operands[0].writeback)
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inst.instruction |= WRITE_BACK;
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encode_thumb2_ldmstm(inst.operands[0].reg, inst.operands[1].imm,
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inst.operands[0].writeback);
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}
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}
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else
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@ -9833,7 +9892,7 @@ do_t_push_pop (void)
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mask = inst.operands[0].imm;
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if ((mask & ~0xff) == 0)
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inst.instruction = THUMB_OP16 (inst.instruction);
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inst.instruction = THUMB_OP16 (inst.instruction) | mask;
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else if ((inst.instruction == T_MNEM_push
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&& (mask & ~0xff) == 1 << REG_LR)
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|| (inst.instruction == T_MNEM_pop
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@ -9841,43 +9900,18 @@ do_t_push_pop (void)
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{
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inst.instruction = THUMB_OP16 (inst.instruction);
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inst.instruction |= THUMB_PP_PC_LR;
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mask &= 0xff;
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inst.instruction |= mask & 0xff;
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}
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else if (unified_syntax)
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{
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if (mask & (1 << 13))
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inst.error = _("SP not allowed in register list");
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if (inst.instruction == T_MNEM_push)
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{
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if (mask & (1 << 15))
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inst.error = _("PC not allowed in register list");
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}
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else
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{
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if (mask & (1 << 14)
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&& mask & (1 << 15))
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inst.error = _("LR and PC should not both be in register list");
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}
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if ((mask & (mask - 1)) == 0)
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{
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/* Single register push/pop implemented as str/ldr. */
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if (inst.instruction == T_MNEM_push)
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inst.instruction = 0xf84d0d04; /* str reg, [sp, #-4]! */
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else
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inst.instruction = 0xf85d0b04; /* ldr reg, [sp], #4 */
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mask = ffs(mask) - 1;
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mask <<= 12;
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}
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else
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inst.instruction = THUMB_OP32 (inst.instruction);
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inst.instruction = THUMB_OP32 (inst.instruction);
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encode_thumb2_ldmstm(13, mask, TRUE);
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}
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else
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{
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inst.error = _("invalid register list to push/pop instruction");
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return;
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}
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inst.instruction |= mask;
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}
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static void
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@ -1,3 +1,8 @@
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2007-03-30 Paul Brook <paul@codesourcery.com>
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* gas/arm/thumb2_ldmstm.d: New test.
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* gas/arm/thumb2_ldmstm.s: New test.
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2007-03-27 Alan Modra <amodra@bigpond.net.au>
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* gas/ppc/reloc.s: New.
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27
gas/testsuite/gas/arm/thumb2_ldmstm.d
Normal file
27
gas/testsuite/gas/arm/thumb2_ldmstm.d
Normal file
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@ -0,0 +1,27 @@
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# name: Thumb-2 LDM/STM single reg
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# as: -march=armv6t2
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# objdump: -dr --prefix-addresses --show-raw-insn
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.*: +file format .*arm.*
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Disassembly of section .text:
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0[0-9a-f]+ <[^>]+> bc01 pop {r0}
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0[0-9a-f]+ <[^>]+> f85d 8b04 ldr.w r8, \[sp\], #4
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0[0-9a-f]+ <[^>]+> f8d1 9000 ldr.w r9, \[r1\]
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0[0-9a-f]+ <[^>]+> f852 cb04 ldr.w ip, \[r2\], #4
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0[0-9a-f]+ <[^>]+> f85d 2d04 ldr.w r2, \[sp, #-4\]!
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0[0-9a-f]+ <[^>]+> f85d 8d04 ldr.w r8, \[sp, #-4\]!
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0[0-9a-f]+ <[^>]+> f856 4c04 ldr.w r4, \[r6, #-4\]
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0[0-9a-f]+ <[^>]+> f856 8c04 ldr.w r8, \[r6, #-4\]
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0[0-9a-f]+ <[^>]+> f852 4d04 ldr.w r4, \[r2, #-4\]!
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0[0-9a-f]+ <[^>]+> f852 cd04 ldr.w ip, \[r2, #-4\]!
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0[0-9a-f]+ <[^>]+> b408 push {r3}
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0[0-9a-f]+ <[^>]+> f84d 9b04 str.w r9, \[sp\], #4
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0[0-9a-f]+ <[^>]+> f8c3 c000 str.w ip, \[r3\]
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0[0-9a-f]+ <[^>]+> f844 cb04 str.w ip, \[r4\], #4
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0[0-9a-f]+ <[^>]+> f84d 3d04 str.w r3, \[sp, #-4\]!
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0[0-9a-f]+ <[^>]+> f84d 9d04 str.w r9, \[sp, #-4\]!
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0[0-9a-f]+ <[^>]+> f847 5c04 str.w r5, \[r7, #-4\]
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0[0-9a-f]+ <[^>]+> f846 cc04 str.w ip, \[r6, #-4\]
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0[0-9a-f]+ <[^>]+> f846 bd04 str.w fp, \[r6, #-4\]!
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0[0-9a-f]+ <[^>]+> f845 8d04 str.w r8, \[r5, #-4\]!
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24
gas/testsuite/gas/arm/thumb2_ldmstm.s
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24
gas/testsuite/gas/arm/thumb2_ldmstm.s
Normal file
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@ -0,0 +1,24 @@
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.syntax unified
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.thumb
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ldmstm:
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ldmia sp!, {r0}
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ldmia sp!, {r8}
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ldmia r1, {r9}
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ldmia r2!, {ip}
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ldmdb sp!, {r2}
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ldmdb sp!, {r8}
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ldmdb r6, {r4}
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ldmdb r6, {r8}
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ldmdb r2!, {r4}
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ldmdb r2!, {ip}
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stmia sp!, {r3}
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stmia sp!, {r9}
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stmia r3, {ip}
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stmia r4!, {ip}
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stmdb sp!, {r3}
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stmdb sp!, {r9}
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stmdb r7, {r5}
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stmdb r6, {ip}
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stmdb r6!, {fp}
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stmdb r5!, {r8}
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