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Revert "MIPS: fix -gnuabi64 testsuite"

Browse source 
This reverts commit cb81e84c72.  It was
applied unapproved.
This commit is contained in:
Maciej W. Rozycki 2023-06-15 04:45:03 +01:00
parent 0b46c1ec2d
commit 3c0afdb789
58 changed files with 524 additions and 797 deletions
Download patch file Download diff file Expand all files Collapse all files

19
binutils/testsuite/binutils-all/mips/mips.exp
View file

@ -152,25 +152,6 @@ set abi_ldflags(eabi) ""
# Override as needed. # Override as needed.
if {[istarget *-*-openbsd*] } { if {[istarget *-*-openbsd*] } {
set irixemul 0 set irixemul 0
} elseif { [istarget mips*64*-*-linux*-gnuabi64] } {
set abi_asflags(o32) -32
set abi_asflags(o32l) "-32 -march=from-abi"
set abi_asflags(n32) "-n32"
set abi_asflags(n32l) "-n32 -march=from-abi"
set abi_asflags(n64) ""
set abi_asflags(n64l) "-march=from-abi -64"
if [istarget *el-*-*] {
set abi_ldflags(o32) -melf32ltsmip
set abi_ldflags(o32l) -melf32ltsmip
set abi_ldflags(n32) -melf32ltsmipn32
set abi_ldflags(n32l) -melf32ltsmipn32
} else {
set abi_ldflags(o32) -melf32btsmip
set abi_ldflags(o32l) -melf32btsmip
set abi_ldflags(n32) -melf32btsmipn32
set abi_ldflags(n32l) -melf32btsmipn32
}
set irixemul 0
} elseif { [istarget mips*64*-*-linux*] } { } elseif { [istarget mips*64*-*-linux*] } {
set abi_asflags(o32) -32 set abi_asflags(o32) -32
set abi_asflags(o32l) "-32 -march=from-abi" set abi_asflags(o32l) "-32 -march=from-abi"

2
binutils/testsuite/binutils-all/objcopy.exp
View file

@ -1269,7 +1269,7 @@ if [is_elf_format] {
run_dump_test "strip-9" run_dump_test "strip-9"
run_dump_test "strip-12" run_dump_test "strip-12"
if { [istarget "mips64*-*-openbsd*"] || [istarget "mips*64*-linux-gnuabi64"] } { if { [istarget "mips64*-*-openbsd*"] } {
set reloc_format mips64 set reloc_format mips64
} }
# A relocation type not supported by any target # A relocation type not supported by any target

2
binutils/testsuite/binutils-all/readelf.r-64
View file

@ -2,5 +2,3 @@
Relocation section '.rel.*text' at offset 0x.* contains 1 entry: Relocation section '.rel.*text' at offset 0x.* contains 1 entry:
Offset Info Type Sym. Value Sym. Name.* Offset Info Type Sym. Value Sym. Name.*
0+04 [0-9A-Fa-f]+ *R_.*0+00 external_symbol.* 0+04 [0-9A-Fa-f]+ *R_.*0+00 external_symbol.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*

10
binutils/testsuite/binutils-all/readelf.s-64
View file

@ -10,8 +10,8 @@ Section Headers:
+\[ 2\] .rel.+text +REL. +0+ +0+.* +\[ 2\] .rel.+text +REL. +0+ +0+.*
+000000000000001. +000000000000001. +I +. +1 +8 +000000000000001. +000000000000001. +I +. +1 +8
+\[ 3\] .data +PROGBITS +0000000000000000 +000000(48|50) +\[ 3\] .data +PROGBITS +0000000000000000 +000000(48|50)
+00000000000000(04|08|10) +0000000000000000 +WA +0 +0 +.* +000000000000000[48] +0000000000000000 +WA +0 +0 +.*
+\[ 4\] .bss +NOBITS +0000000000000000 +000000(4c|50|54|58|60|68) +\[ 4\] .bss +NOBITS +0000000000000000 +000000(4c|50|54|58|68)
+0000000000000000 +0000000000000000 +WA +0 +0 +.* +0000000000000000 +0000000000000000 +WA +0 +0 +.*
# x86 targets may put .note.gnu.property here. # x86 targets may put .note.gnu.property here.
# riscv targets put .riscv.attributes here. # riscv targets put .riscv.attributes here.
@ -20,10 +20,10 @@ Section Headers:
# aarch64-elf targets have one more data symbol. # aarch64-elf targets have one more data symbol.
# x86 targets may have .note.gnu.property. # x86 targets may have .note.gnu.property.
# riscv targets have two more symbols, data symbol and .riscv.attributes. # riscv targets have two more symbols, data symbol and .riscv.attributes.
+0+.* +0000000000000(018|180) +(6|7|10) +(3|4|5|10) +8 +0+.* +0000000000000018 +(6|7) +(3|4|5) +8
+\[..\] .strtab +STRTAB +0000000000000000 +0+.* +\[ .\] .strtab +STRTAB +0000000000000000 +0+.*
+0+.* +0000000000000000 .* +0 +0 +1 +0+.* +0000000000000000 .* +0 +0 +1
+\[..\] .shstrtab +STRTAB +0000000000000000 +[0-9a-f]+ +\[ .\] .shstrtab +STRTAB +0000000000000000 +[0-9a-f]+
+00000000000000.. +0000000000000000 .* +0 +0 +.* +00000000000000.. +0000000000000000 .* +0 +0 +.*
Key to Flags: Key to Flags:
#... #...

2
binutils/testsuite/binutils-all/remove-relocs-01.d
View file

@ -2,7 +2,7 @@
#source: remove-relocs-01.s #source: remove-relocs-01.s
#objcopy: --remove-relocations=.data.relocs.01 #objcopy: --remove-relocations=.data.relocs.01
#readelf: -r #readelf: -r
#notarget: "mips64*-*-openbsd*" "mips*64*-*-linux-gnuabi64" #notarget: "mips64*-*-openbsd*"
Relocation section '\.rela?\.data\.relocs\.02' at offset 0x[0-9a-f]+ contains 3 entries: Relocation section '\.rela?\.data\.relocs\.02' at offset 0x[0-9a-f]+ contains 3 entries:
.* .*

2
binutils/testsuite/binutils-all/remove-relocs-04.d
View file

@ -2,7 +2,7 @@
#source: remove-relocs-01.s #source: remove-relocs-01.s
#objcopy: --remove-relocations=.data.relocs.0\[12\] #objcopy: --remove-relocations=.data.relocs.0\[12\]
#readelf: -r #readelf: -r
#notarget: "mips64*-*-openbsd*" "mips*64*-linux-gnuabi64" #notarget: "mips64*-*-openbsd*"
Relocation section '\.rela?\.data\.relocs\.03' at offset 0x[0-9a-f]+ contains 3 entries: Relocation section '\.rela?\.data\.relocs\.03' at offset 0x[0-9a-f]+ contains 3 entries:
.* .*

2
binutils/testsuite/binutils-all/remove-relocs-05.d
View file

@ -2,7 +2,7 @@
#source: remove-relocs-01.s #source: remove-relocs-01.s
#objcopy: --remove-section=.rela.data.relocs.01 --remove-section=.rel.data.relocs.01 #objcopy: --remove-section=.rela.data.relocs.01 --remove-section=.rel.data.relocs.01
#readelf: -r #readelf: -r
#notarget: "mips64*-*-openbsd*" "mips*64*-linux-gnuabi64" #notarget: "mips64*-*-openbsd*"
Relocation section '\.rela?\.data\.relocs\.02' at offset 0x[0-9a-f]+ contains 3 entries: Relocation section '\.rela?\.data\.relocs\.02' at offset 0x[0-9a-f]+ contains 3 entries:
.* .*

2
binutils/testsuite/binutils-all/remove-relocs-06.d
View file

@ -2,7 +2,7 @@
#source: remove-relocs-01.s #source: remove-relocs-01.s
#objcopy: --remove-relocations=.data.relocs.* --remove-relocations=!.data.relocs.02 #objcopy: --remove-relocations=.data.relocs.* --remove-relocations=!.data.relocs.02
#readelf: -r #readelf: -r
#notarget: "mips64*-*-openbsd*" "mips*64*-linux-gnuabi64" #notarget: "mips64*-*-openbsd*"
Relocation section '\.rela?\.data\.relocs\.02' at offset 0x[0-9a-f]+ contains 3 entries: Relocation section '\.rela?\.data\.relocs\.02' at offset 0x[0-9a-f]+ contains 3 entries:
.* .*

2
binutils/testsuite/binutils-all/strip-3.d
View file

@ -1,6 +1,6 @@
#PROG: strip #PROG: strip
#source: empty.s #source: empty.s
#strip: -R .text -R .data -R .bss -R .ARM.attributes -R .reginfo -R .gnu.attributes -R .MIPS.abiflags -R .MIPS.options -R .pdr -R .xtensa.info -R .ARC.attributes -R .note.gnu.property -R .riscv.attributes -R .csky.attributes #strip: -R .text -R .data -R .bss -R .ARM.attributes -R .reginfo -R .gnu.attributes -R .MIPS.abiflags -R .pdr -R .xtensa.info -R .ARC.attributes -R .note.gnu.property -R .riscv.attributes -R .csky.attributes
#readelf: -S --wide #readelf: -S --wide
#name: strip empty file #name: strip empty file
#target: *-*-linux* *-*-gnu* arm*-*-uclinuxfdpiceabi #target: *-*-linux* *-*-gnu* arm*-*-uclinuxfdpiceabi

4
gas/testsuite/gas/all/assign.d
View file

@ -3,9 +3,5 @@
#... #...
.*zzz.* .*zzz.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
.*zzz.* .*zzz.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
#pass #pass

2
gas/testsuite/gas/all/fwdexp.d
View file

@ -6,8 +6,6 @@
RELOCATION RECORDS FOR .* RELOCATION RECORDS FOR .*
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+ .*(\.data|label_i)(|\+0xf+e|\+0xf+c|\+0xf+8|-0x0*2|-0x0*4|-0x0*8) 0+ .*(\.data|label_i)(|\+0xf+e|\+0xf+c|\+0xf+8|-0x0*2|-0x0*4|-0x0*8)
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .* Contents of section .*
0+ (0+|feff|fffe|fcffffff|fffffffc|f8ffffff|f8ffffff ffffffff|ffffffff fffffff8|0+4) .* 0+ (0+|feff|fffe|fcffffff|fffffffc|f8ffffff|f8ffffff ffffffff|ffffffff fffffff8|0+4) .*

2
gas/testsuite/gas/all/none.d
View file

@ -5,5 +5,3 @@
#... #...
0+ .*(NONE|NULL|UNUSED0) +\*ABS\* 0+ .*(NONE|NULL|UNUSED0) +\*ABS\*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*

8
gas/testsuite/gas/elf/missing-build-notes.d
View file

@ -8,15 +8,7 @@
RELOCATION RECORDS FOR \[.gnu.build.attributes\]: RELOCATION RECORDS FOR \[.gnu.build.attributes\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+014 .*[ ]+.* 0+014 .*[ ]+.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+0(18|1c) .*[ ]+.* 0+0(18|1c) .*[ ]+.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+0(30|38) .*[ ]+.* 0+0(30|38) .*[ ]+.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+0(34|40) .*[ ]+.* 0+0(34|40) .*[ ]+.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
#pass #pass

12
gas/testsuite/gas/macros/irp.d
View file

@ -8,21 +8,9 @@
RELOCATION RECORDS FOR .* RELOCATION RECORDS FOR .*
OFFSET[ ]+TYPE[ ]+VALUE.* OFFSET[ ]+TYPE[ ]+VALUE.*
0+00[ ]+[a-zA-Z0-9_]+[ ]+foo1 0+00[ ]+[a-zA-Z0-9_]+[ ]+foo1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+04[ ]+[a-zA-Z0-9_]+[ ]+foo2 0+04[ ]+[a-zA-Z0-9_]+[ ]+foo2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+08[ ]+[a-zA-Z0-9_]+[ ]+foo3 0+08[ ]+[a-zA-Z0-9_]+[ ]+foo3
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+0c[ ]+[a-zA-Z0-9_]+[ ]+bar1 0+0c[ ]+[a-zA-Z0-9_]+[ ]+bar1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+10[ ]+[a-zA-Z0-9_]+[ ]+bar2 0+10[ ]+[a-zA-Z0-9_]+[ ]+bar2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+14[ ]+[a-zA-Z0-9_]+[ ]+bar3 0+14[ ]+[a-zA-Z0-9_]+[ ]+bar3
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
#pass #pass

72
gas/testsuite/gas/macros/repeat.d
View file

@ -8,111 +8,39 @@
RELOCATION RECORDS FOR .* RELOCATION RECORDS FOR .*
OFFSET[ ]+TYPE[ ]+VALUE.* OFFSET[ ]+TYPE[ ]+VALUE.*
0+00[ ]+[a-zA-Z0-9_]+[ ]+irp_irp_19 0+00[ ]+[a-zA-Z0-9_]+[ ]+irp_irp_19
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+04[ ]+[a-zA-Z0-9_]+[ ]+irp_irp_18 0+04[ ]+[a-zA-Z0-9_]+[ ]+irp_irp_18
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+08[ ]+[a-zA-Z0-9_]+[ ]+irp_irp_29 0+08[ ]+[a-zA-Z0-9_]+[ ]+irp_irp_29
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+0c[ ]+[a-zA-Z0-9_]+[ ]+irp_irp_28 0+0c[ ]+[a-zA-Z0-9_]+[ ]+irp_irp_28
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+10[ ]+[a-zA-Z0-9_]+[ ]+irp_irpc_19 0+10[ ]+[a-zA-Z0-9_]+[ ]+irp_irpc_19
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+14[ ]+[a-zA-Z0-9_]+[ ]+irp_irpc_18 0+14[ ]+[a-zA-Z0-9_]+[ ]+irp_irpc_18
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+18[ ]+[a-zA-Z0-9_]+[ ]+irp_irpc_29 0+18[ ]+[a-zA-Z0-9_]+[ ]+irp_irpc_29
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+1c[ ]+[a-zA-Z0-9_]+[ ]+irp_irpc_28 0+1c[ ]+[a-zA-Z0-9_]+[ ]+irp_irpc_28
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+20[ ]+[a-zA-Z0-9_]+[ ]+irp_rept_1 0+20[ ]+[a-zA-Z0-9_]+[ ]+irp_rept_1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+24[ ]+[a-zA-Z0-9_]+[ ]+irp_rept_1 0+24[ ]+[a-zA-Z0-9_]+[ ]+irp_rept_1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+28[ ]+[a-zA-Z0-9_]+[ ]+irp_rept_2 0+28[ ]+[a-zA-Z0-9_]+[ ]+irp_rept_2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+2c[ ]+[a-zA-Z0-9_]+[ ]+irp_rept_2 0+2c[ ]+[a-zA-Z0-9_]+[ ]+irp_rept_2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+30[ ]+[a-zA-Z0-9_]+[ ]+irpc_irp_19 0+30[ ]+[a-zA-Z0-9_]+[ ]+irpc_irp_19
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+34[ ]+[a-zA-Z0-9_]+[ ]+irpc_irp_18 0+34[ ]+[a-zA-Z0-9_]+[ ]+irpc_irp_18
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+38[ ]+[a-zA-Z0-9_]+[ ]+irpc_irp_29 0+38[ ]+[a-zA-Z0-9_]+[ ]+irpc_irp_29
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+3c[ ]+[a-zA-Z0-9_]+[ ]+irpc_irp_28 0+3c[ ]+[a-zA-Z0-9_]+[ ]+irpc_irp_28
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+40[ ]+[a-zA-Z0-9_]+[ ]+irpc_irpc_19 0+40[ ]+[a-zA-Z0-9_]+[ ]+irpc_irpc_19
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+44[ ]+[a-zA-Z0-9_]+[ ]+irpc_irpc_18 0+44[ ]+[a-zA-Z0-9_]+[ ]+irpc_irpc_18
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+48[ ]+[a-zA-Z0-9_]+[ ]+irpc_irpc_29 0+48[ ]+[a-zA-Z0-9_]+[ ]+irpc_irpc_29
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+4c[ ]+[a-zA-Z0-9_]+[ ]+irpc_irpc_28 0+4c[ ]+[a-zA-Z0-9_]+[ ]+irpc_irpc_28
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+50[ ]+[a-zA-Z0-9_]+[ ]+irpc_rept_1 0+50[ ]+[a-zA-Z0-9_]+[ ]+irpc_rept_1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+54[ ]+[a-zA-Z0-9_]+[ ]+irpc_rept_1 0+54[ ]+[a-zA-Z0-9_]+[ ]+irpc_rept_1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+58[ ]+[a-zA-Z0-9_]+[ ]+irpc_rept_2 0+58[ ]+[a-zA-Z0-9_]+[ ]+irpc_rept_2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+5c[ ]+[a-zA-Z0-9_]+[ ]+irpc_rept_2 0+5c[ ]+[a-zA-Z0-9_]+[ ]+irpc_rept_2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+60[ ]+[a-zA-Z0-9_]+[ ]+rept_irp_9 0+60[ ]+[a-zA-Z0-9_]+[ ]+rept_irp_9
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+64[ ]+[a-zA-Z0-9_]+[ ]+rept_irp_8 0+64[ ]+[a-zA-Z0-9_]+[ ]+rept_irp_8
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+68[ ]+[a-zA-Z0-9_]+[ ]+rept_irp_9 0+68[ ]+[a-zA-Z0-9_]+[ ]+rept_irp_9
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+6c[ ]+[a-zA-Z0-9_]+[ ]+rept_irp_8 0+6c[ ]+[a-zA-Z0-9_]+[ ]+rept_irp_8
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+70[ ]+[a-zA-Z0-9_]+[ ]+rept_irpc_9 0+70[ ]+[a-zA-Z0-9_]+[ ]+rept_irpc_9
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+74[ ]+[a-zA-Z0-9_]+[ ]+rept_irpc_8 0+74[ ]+[a-zA-Z0-9_]+[ ]+rept_irpc_8
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+78[ ]+[a-zA-Z0-9_]+[ ]+rept_irpc_9 0+78[ ]+[a-zA-Z0-9_]+[ ]+rept_irpc_9
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+7c[ ]+[a-zA-Z0-9_]+[ ]+rept_irpc_8 0+7c[ ]+[a-zA-Z0-9_]+[ ]+rept_irpc_8
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+80[ ]+[a-zA-Z0-9_]+[ ]+rept_rept 0+80[ ]+[a-zA-Z0-9_]+[ ]+rept_rept
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+84[ ]+[a-zA-Z0-9_]+[ ]+rept_rept 0+84[ ]+[a-zA-Z0-9_]+[ ]+rept_rept
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+88[ ]+[a-zA-Z0-9_]+[ ]+rept_rept 0+88[ ]+[a-zA-Z0-9_]+[ ]+rept_rept
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+8c[ ]+[a-zA-Z0-9_]+[ ]+rept_rept 0+8c[ ]+[a-zA-Z0-9_]+[ ]+rept_rept
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
#pass #pass

6
gas/testsuite/gas/macros/rept.d
View file

@ -8,12 +8,6 @@
RELOCATION RECORDS FOR .* RELOCATION RECORDS FOR .*
OFFSET[ ]+TYPE[ ]+VALUE.* OFFSET[ ]+TYPE[ ]+VALUE.*
0+00[ ]+[a-zA-Z0-9_]+[ ]+foo1 0+00[ ]+[a-zA-Z0-9_]+[ ]+foo1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+04[ ]+[a-zA-Z0-9_]+[ ]+foo1 0+04[ ]+[a-zA-Z0-9_]+[ ]+foo1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+08[ ]+[a-zA-Z0-9_]+[ ]+foo1 0+08[ ]+[a-zA-Z0-9_]+[ ]+foo1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
#pass #pass

6
gas/testsuite/gas/macros/test2.d
View file

@ -8,12 +8,6 @@
RELOCATION RECORDS FOR .* RELOCATION RECORDS FOR .*
OFFSET[ ]+TYPE[ ]+VALUE.* OFFSET[ ]+TYPE[ ]+VALUE.*
0+00[ ]+[a-zA-Z0-9_]+[ ]+foo1 0+00[ ]+[a-zA-Z0-9_]+[ ]+foo1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+04[ ]+[a-zA-Z0-9_]+[ ]+foo2 0+04[ ]+[a-zA-Z0-9_]+[ ]+foo2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+08[ ]+[a-zA-Z0-9_]+[ ]+foo3 0+08[ ]+[a-zA-Z0-9_]+[ ]+foo3
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
#pass #pass

12
gas/testsuite/gas/macros/vararg.d
View file

@ -8,21 +8,9 @@
RELOCATION RECORDS FOR .* RELOCATION RECORDS FOR .*
OFFSET[ ]+TYPE[ ]+VALUE.* OFFSET[ ]+TYPE[ ]+VALUE.*
0+00[ ]+[a-zA-Z0-9_]+[ ]+foo1 0+00[ ]+[a-zA-Z0-9_]+[ ]+foo1
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+04[ ]+[a-zA-Z0-9_]+[ ]+foo2 0+04[ ]+[a-zA-Z0-9_]+[ ]+foo2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+08[ ]+[a-zA-Z0-9_]+[ ]+foo3 0+08[ ]+[a-zA-Z0-9_]+[ ]+foo3
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+0c[ ]+[a-zA-Z0-9_]+[ ]+foo4 0+0c[ ]+[a-zA-Z0-9_]+[ ]+foo4
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+10[ ]+[a-zA-Z0-9_]+[ ]+foo5 0+10[ ]+[a-zA-Z0-9_]+[ ]+foo5
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
0+14[ ]+[a-zA-Z0-9_]+[ ]+foo6 0+14[ ]+[a-zA-Z0-9_]+[ ]+foo6
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
#pass #pass

8
gas/testsuite/gas/mips/align2-el.d
View file

@ -6,7 +6,7 @@
Disassembly of section \.text: Disassembly of section \.text:
0+000000 <f1>: 00000000 <f1>:
0: 4a01 addiu v0,1 0: 4a01 addiu v0,1
2: 6500 nop 2: 6500 nop
4: 6500 nop 4: 6500 nop
@ -14,14 +14,14 @@ Disassembly of section \.text:
8: 4b01 addiu v1,1 8: 4b01 addiu v1,1
a: 6500 nop a: 6500 nop
0+00000c <f2>: 0000000c <f2>:
c: 24420001 addiu v0,v0,1 c: 24420001 addiu v0,v0,1
10: 24630001 addiu v1,v1,1 10: 24630001 addiu v1,v1,1
\.\.\. \.\.\.
20: 24840001 addiu a0,a0,1 20: 24840001 addiu a0,a0,1
24: 00000000 nop 24: 00000000 nop
0+000028 <f3>: 00000028 <f3>:
28: 4001 addiu s0,s0,1 28: 4001 addiu s0,s0,1
2a: 6500 nop 2a: 6500 nop
2c: 6500 nop 2c: 6500 nop
@ -37,6 +37,6 @@ Disassembly of section \.text:
Disassembly of section \.text\.a: Disassembly of section \.text\.a:
0+000000 <f4>: 00000000 <f4>:
0: 24a50001 addiu a1,a1,1 0: 24a50001 addiu a1,a1,1
\.\.\. \.\.\.

8
gas/testsuite/gas/mips/align2.d
View file

@ -5,7 +5,7 @@
Disassembly of section \.text: Disassembly of section \.text:
0+000000 <f1>: 00000000 <f1>:
0: 4a01 addiu v0,1 0: 4a01 addiu v0,1
2: 6500 nop 2: 6500 nop
4: 6500 nop 4: 6500 nop
@ -13,14 +13,14 @@ Disassembly of section \.text:
8: 4b01 addiu v1,1 8: 4b01 addiu v1,1
a: 6500 nop a: 6500 nop
0+00000c <f2>: 0000000c <f2>:
c: 24420001 addiu v0,v0,1 c: 24420001 addiu v0,v0,1
10: 24630001 addiu v1,v1,1 10: 24630001 addiu v1,v1,1
\.\.\. \.\.\.
20: 24840001 addiu a0,a0,1 20: 24840001 addiu a0,a0,1
24: 00000000 nop 24: 00000000 nop
0+000028 <f3>: 00000028 <f3>:
28: 4001 addiu s0,s0,1 28: 4001 addiu s0,s0,1
2a: 6500 nop 2a: 6500 nop
2c: 6500 nop 2c: 6500 nop
@ -36,6 +36,6 @@ Disassembly of section \.text:
Disassembly of section \.text\.a: Disassembly of section \.text\.a:
0+000000 <f4>: 00000000 <f4>:
0: 24a50001 addiu a1,a1,1 0: 24a50001 addiu a1,a1,1
\.\.\. \.\.\.

11
gas/testsuite/gas/mips/compact-eh-eb-1.d
View file

@ -8,17 +8,14 @@
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .text: Contents of section .text:
0000 00000000.* 0000 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

23
gas/testsuite/gas/mips/compact-eh-eb-2.d
View file

@ -8,36 +8,27 @@
RELOCATION RECORDS FOR \[.data.DW.ref.__gnu_compact_pr2\]: RELOCATION RECORDS FOR \[.data.DW.ref.__gnu_compact_pr2\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_32 __gnu_compact_pr2 00000000 R_MIPS_32 __gnu_compact_pr2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
RELOCATION RECORDS FOR \[.gnu_extab\]: RELOCATION RECORDS FOR \[.gnu_extab\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000001 R_MIPS_PC32 DW.ref.__gnu_compact_pr2 00000001 R_MIPS_PC32 DW.ref.__gnu_compact_pr2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .group: Contents of section .group:
0000 00000001 00000007 00000008 .* 0000 00000001 00000007 00000008 .*
Contents of section .text: Contents of section .text:
0000 00000000.* 0000 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

15
gas/testsuite/gas/mips/compact-eh-eb-3.d
View file

@ -8,20 +8,15 @@
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .text: Contents of section .text:
0000 00000000.* 0000 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

15
gas/testsuite/gas/mips/compact-eh-eb-4.d
View file

@ -8,21 +8,16 @@
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .text: Contents of section .text:
0000 00000000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
0010 00000000.* 0010 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

23
gas/testsuite/gas/mips/compact-eh-eb-5.d
View file

@ -8,26 +8,18 @@
RELOCATION RECORDS FOR \[.data.DW.ref.__gnu_compact_pr2\]: RELOCATION RECORDS FOR \[.data.DW.ref.__gnu_compact_pr2\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_32 __gnu_compact_pr2 00000000 R_MIPS_32 __gnu_compact_pr2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
RELOCATION RECORDS FOR \[.gnu_extab\]: RELOCATION RECORDS FOR \[.gnu_extab\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000001 R_MIPS_PC32 DW.ref.__gnu_compact_pr2 00000001 R_MIPS_PC32 DW.ref.__gnu_compact_pr2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .group: Contents of section .group:
@ -35,10 +27,9 @@ Contents of section .group:
Contents of section .text: Contents of section .text:
0000 00000000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
0010 00000000.* 0010 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

15
gas/testsuite/gas/mips/compact-eh-eb-6.d
View file

@ -8,21 +8,16 @@
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .text: Contents of section .text:
0000 00000000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
0010 00000000.* 0010 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

23
gas/testsuite/gas/mips/compact-eh-eb-7.d
View file

@ -8,34 +8,27 @@
RELOCATION RECORDS FOR \[.eh_frame\]: RELOCATION RECORDS FOR \[.eh_frame\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+00001c R_MIPS_PC32 .text.* 0000001c R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .eh_frame.*
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .eh_frame.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .text: Contents of section .text:
0000 00000000 00000000.* 0000 00000000 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*
Contents of section .eh_frame: Contents of section .eh_frame:
0000 00000010 00000000 017a5200 017c1f01 .* 0000 00000010 00000000 017a5200 017c1f01 .*
0010 1b0d1d00 0000001[48] 00000018 00000000 .* 0010 1b0d1d00 00000014 00000018 00000000 .*
0020 00000008 00441308 440e0000 (00000000| ) .* 0020 00000008 00441308 440e0000 .*
Contents of section .eh_frame_entry: Contents of section .eh_frame_entry:
0000 00000001 00000015 .* 0000 00000001 00000015 .*
Contents of section .gnu.attributes: Contents of section .gnu.attributes:

11
gas/testsuite/gas/mips/compact-eh-el-1.d
View file

@ -8,17 +8,14 @@
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .text: Contents of section .text:
0000 00000000.* 0000 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

23
gas/testsuite/gas/mips/compact-eh-el-2.d
View file

@ -8,36 +8,27 @@
RELOCATION RECORDS FOR \[.data.DW.ref.__gnu_compact_pr2\]: RELOCATION RECORDS FOR \[.data.DW.ref.__gnu_compact_pr2\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_32 __gnu_compact_pr2 00000000 R_MIPS_32 __gnu_compact_pr2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
RELOCATION RECORDS FOR \[.gnu_extab\]: RELOCATION RECORDS FOR \[.gnu_extab\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000001 R_MIPS_PC32 DW.ref.__gnu_compact_pr2 00000001 R_MIPS_PC32 DW.ref.__gnu_compact_pr2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .group: Contents of section .group:
0000 01000000 07000000 08000000 .* 0000 01000000 07000000 08000000 .*
Contents of section .text: Contents of section .text:
0000 00000000.* 0000 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

15
gas/testsuite/gas/mips/compact-eh-el-3.d
View file

@ -8,20 +8,15 @@
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .text: Contents of section .text:
0000 00000000.* 0000 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

15
gas/testsuite/gas/mips/compact-eh-el-4.d
View file

@ -8,21 +8,16 @@
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .text: Contents of section .text:
0000 00000000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
0010 00000000.* 0010 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

23
gas/testsuite/gas/mips/compact-eh-el-5.d
View file

@ -7,26 +7,18 @@
RELOCATION RECORDS FOR \[.data.DW.ref.__gnu_compact_pr2\]: RELOCATION RECORDS FOR \[.data.DW.ref.__gnu_compact_pr2\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_32 __gnu_compact_pr2 00000000 R_MIPS_32 __gnu_compact_pr2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
RELOCATION RECORDS FOR \[.gnu_extab\]: RELOCATION RECORDS FOR \[.gnu_extab\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000001 R_MIPS_PC32 DW.ref.__gnu_compact_pr2 00000001 R_MIPS_PC32 DW.ref.__gnu_compact_pr2
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .group: Contents of section .group:
@ -34,10 +26,9 @@ Contents of section .group:
Contents of section .text: Contents of section .text:
0000 00000000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
0010 00000000.* 0010 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

15
gas/testsuite/gas/mips/compact-eh-el-6.d
View file

@ -8,21 +8,16 @@
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .gnu_extab
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .text: Contents of section .text:
0000 00000000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
0010 00000000.* 0010 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*

23
gas/testsuite/gas/mips/compact-eh-el-7.d
View file

@ -8,34 +8,27 @@
RELOCATION RECORDS FOR \[.eh_frame\]: RELOCATION RECORDS FOR \[.eh_frame\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+00001c R_MIPS_PC32 .text.* 0000001c R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
RELOCATION RECORDS FOR \[.eh_frame_entry\]: RELOCATION RECORDS FOR \[.eh_frame_entry\]:
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_PC32 .text.* 00000000 R_MIPS_PC32 .text.*
#?.*R_MIPS_NONE.* 00000004 R_MIPS_PC32 .eh_frame.*
#?.*R_MIPS_NONE.*
0+000004 R_MIPS_PC32 .eh_frame.*
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
Contents of section .text: Contents of section .text:
0000 00000000 00000000.* 0000 00000000 00000000.*
Contents of section (.reginfo|.MIPS.options): Contents of section .reginfo:
0000 0(000|128)0000 00000000 00000000 00000000 .* 0000 00000000 00000000 00000000 00000000 .*
(0010 00000000 00000000 |0010 00000000 00000000 00000000 00000000) .* 0010 00000000 00000000 .*
#? 0020 00000000 00000000 .*
Contents of section .MIPS.abiflags: Contents of section .MIPS.abiflags:
.* .*
.* .*
Contents of section .eh_frame: Contents of section .eh_frame:
0000 10000000 00000000 017a5200 017c1f01 .* 0000 10000000 00000000 017a5200 017c1f01 .*
0010 1b0d1d00 1[48]000000 18000000 00000000 .* 0010 1b0d1d00 14000000 18000000 00000000 .*
0020 08000000 00441308 440e0000 (00000000| ) .* 0020 08000000 00441308 440e0000 .*
Contents of section .eh_frame_entry: Contents of section .eh_frame_entry:
0000 01000000 15000000 .* 0000 01000000 15000000 .*
Contents of section .gnu.attributes: Contents of section .gnu.attributes:

2
gas/testsuite/gas/mips/fix-rm7000-2.d
View file

@ -1,4 +1,4 @@
#as: -mfix-rm7000 -mabi=n32 #as: -mfix-rm7000
#objdump: -dz --prefix-addresses #objdump: -dz --prefix-addresses
#name: MIPS RM7000 workarounds test 2 #name: MIPS RM7000 workarounds test 2
#source: fix-rm7000-2.s #source: fix-rm7000-2.s

1
gas/testsuite/gas/mips/llpscp-64.d
View file

@ -1,5 +1,4 @@
#objdump: -dr #objdump: -dr
#as: -n32
#name: Paired LL/SC for mips64r6 #name: Paired LL/SC for mips64r6
.*: +file format .* .*: +file format .*

2
gas/testsuite/gas/mips/loongson-2f-2.d
View file

@ -6,7 +6,7 @@
Disassembly of section .text: Disassembly of section .text:
0+000000 <loongson2f_nop_insn>: 00000000 <loongson2f_nop_insn>:
0: 00200825 move \$1,\$1 0: 00200825 move \$1,\$1
4: 00200825 move \$1,\$1 4: 00200825 move \$1,\$1
8: 00200825 move \$1,\$1 8: 00200825 move \$1,\$1

4
gas/testsuite/gas/mips/loongson-2f-3.d
View file

@ -6,7 +6,7 @@
Disassembly of section .text: Disassembly of section .text:
0+000000 <.text>: 00000000 <.text>:
0: 3c01cfff lui \$1,0xcfff 0: 3c01cfff lui \$1,0xcfff
4: 3421ffff ori \$1,\$1,0xffff 4: 3421ffff ori \$1,\$1,0xffff
8: 03c1f024 and \$30,\$30,\$1 8: 03c1f024 and \$30,\$30,\$1
@ -30,7 +30,5 @@ Disassembly of section .text:
44: 08000000 j 0x0 44: 08000000 j 0x0
44: R_MIPS_26 external_label 44: R_MIPS_26 external_label
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
48: 00000000 nop 48: 00000000 nop
4c: 00000000 nop 4c: 00000000 nop

2
gas/testsuite/gas/mips/micromips@fix-rm7000-2.d
View file

@ -1,4 +1,4 @@
#as: -mfix-rm7000 -mabi=n32 #as: -mfix-rm7000
#objdump: -dz --prefix-addresses #objdump: -dz --prefix-addresses
#name: MIPS RM7000 workarounds test 2 #name: MIPS RM7000 workarounds test 2
#source: fix-rm7000-2.s #source: fix-rm7000-2.s

4
gas/testsuite/gas/mips/mips-jalx.d
View file

@ -3,11 +3,9 @@
#name: mips jalx #name: mips jalx
.*: file format .* .*: file format .*
Disassembly of section .text: Disassembly of section .text:
0+000000 <.text>: 00000000 <.text>:
0: 74000000 jalx 0x0 0: 74000000 jalx 0x0
0: R_MIPS_26 external_label 0: R_MIPS_26 external_label
#?.*R_MIPS_NONE.*
#?.*R_MIPS_NONE.*
4: 00000000 nop 4: 00000000 nop
8: 00000000 nop 8: 00000000 nop
c: 00000000 nop c: 00000000 nop

10
gas/testsuite/gas/mips/mips.exp
View file

@ -569,8 +569,6 @@ if { [istarget mips*-*-vxworks*] } {
set has_newabi [expr [istarget *-*-irix6*] || [istarget mips*-*-linux*] \ set has_newabi [expr [istarget *-*-irix6*] || [istarget mips*-*-linux*] \
|| [istarget mips*-sde-elf*] || [istarget mips*-mti-elf*] \ || [istarget mips*-sde-elf*] || [istarget mips*-mti-elf*] \
|| [istarget mips*-img-elf*]] || [istarget mips*-img-elf*]]
set default_n64 [expr [istarget mips*64*-linux-gnuabi64] ]
if { [istarget "mips*-*-*linux*"] if { [istarget "mips*-*-*linux*"]
|| [istarget "mips*-sde-elf*"] || [istarget "mips*-sde-elf*"]
@ -1464,9 +1462,7 @@ if { [istarget mips*-*-vxworks*] } {
if { $has_newabi } { if { $has_newabi } {
run_dump_test_arches "octeon" [mips_arch_list_matching octeon] run_dump_test_arches "octeon" [mips_arch_list_matching octeon]
} }
if !$default_n64 {
run_dump_test_arches "octeon-saa-saad" [mips_arch_list_matching octeonp] run_dump_test_arches "octeon-saa-saad" [mips_arch_list_matching octeonp]
}
run_list_test_arches "octeon-ill" [mips_arch_list_matching octeon] run_list_test_arches "octeon-ill" [mips_arch_list_matching octeon]
if { $has_newabi } { if { $has_newabi } {
run_dump_test_arches "octeon-pref" \ run_dump_test_arches "octeon-pref" \
@ -1631,12 +1627,10 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "r5900" run_dump_test "r5900"
run_dump_test "r5900-fix" run_dump_test "r5900-fix"
run_dump_test "r5900-no-fix" run_dump_test "r5900-no-fix"
if !$default_n64 {
run_dump_test "r5900-full" run_dump_test "r5900-full"
run_dump_test "r5900-vu0"
}
run_dump_test "r5900-full-vu0"
run_list_test "r5900-nollsc" "-mabi=o64 -march=r5900" run_list_test "r5900-nollsc" "-mabi=o64 -march=r5900"
run_dump_test "r5900-vu0"
run_dump_test "r5900-full-vu0"
run_dump_test "r5900-all-vu0" run_dump_test "r5900-all-vu0"
run_list_test "r5900-error-vu0" "-march=r5900" run_list_test "r5900-error-vu0" "-march=r5900"

2
gas/testsuite/gas/mips/mips64-dsp.d
View file

@ -15,7 +15,7 @@ Disassembly of section .text:
0+0014 <[^>]*> 7c851b94 addq_s\.qh v1,a0,a1 0+0014 <[^>]*> 7c851b94 addq_s\.qh v1,a0,a1
0+0018 <[^>]*> 7d4b4814 addu\.ob t1,t2,t3 0+0018 <[^>]*> 7d4b4814 addu\.ob t1,t2,t3
0+001c <[^>]*> 7d6c5114 addu_s\.ob t2,t3,t4 0+001c <[^>]*> 7d6c5114 addu_s\.ob t2,t3,t4
0+0020 <[^>]*> 041dfff7 bposge64 0+000000 <text_label> 0+0020 <[^>]*> 041dfff7 bposge64 00000000 <text_label>
0+0024 <[^>]*> 00000000 nop 0+0024 <[^>]*> 00000000 nop
0+0028 <[^>]*> 7e950415 cmp\.eq\.pw s4,s5 0+0028 <[^>]*> 7e950415 cmp\.eq\.pw s4,s5
0+002c <[^>]*> 7eb60455 cmp\.lt\.pw s5,s6 0+002c <[^>]*> 7eb60455 cmp\.lt\.pw s5,s6

4
gas/testsuite/gas/mips/pcrel-1.d
View file

@ -5,10 +5,10 @@
Disassembly of section .text: Disassembly of section .text:
0+000000 <func>: 00000000 <func>:
0: 3c040001 lui a0,0x1 0: 3c040001 lui a0,0x1
4: 2484800c addiu a0,a0,-32756 4: 2484800c addiu a0,a0,-32756
... ...
0+008010 <foo>: 00008010 <foo>:
#pass #pass

718
gas/testsuite/gas/mips/set-arch.d
View file

@ -9,363 +9,363 @@
.*: file format .* .*: file format .*
Disassembly of section \.text: Disassembly of section \.text:
0+000000 <[^>]*> bc010000 cache 0x1,0\(zero\) 00000000 <[^>]*> bc010000 cache 0x1,0\(zero\)
0+000004 <[^>]*> bc020000 cache 0x2,0\(zero\) 00000004 <[^>]*> bc020000 cache 0x2,0\(zero\)
0+000008 <[^>]*> bc030000 cache 0x3,0\(zero\) 00000008 <[^>]*> bc030000 cache 0x3,0\(zero\)
0+00000c <[^>]*> 0085001c dmult a0,a1 0000000c <[^>]*> 0085001c dmult a0,a1
0+000010 <[^>]*> 00a6001d dmultu a1,a2 00000010 <[^>]*> 00a6001d dmultu a1,a2
0+000014 <[^>]*> 00e0300b movn a2,a3,zero 00000014 <[^>]*> 00e0300b movn a2,a3,zero
0+000018 <[^>]*> 0100380a movz a3,t0,zero 00000018 <[^>]*> 0100380a movz a3,t0,zero
0+00001c <[^>]*> 0109001e ddiv zero,t0,t1 0000001c <[^>]*> 0109001e ddiv zero,t0,t1
0+000020 <[^>]*> 012a001f ddivu zero,t1,t2 00000020 <[^>]*> 012a001f ddivu zero,t1,t2
0+000024 <[^>]*> 016c5005 .word 0x16c5005 00000024 <[^>]*> 016c5005 .word 0x16c5005
0+000028 <[^>]*> 018d5801 movt t3,t4,\$fcc3 00000028 <[^>]*> 018d5801 movt t3,t4,\$fcc3
0+00002c <[^>]*> 42000020 wait 0000002c <[^>]*> 42000020 wait
0+000030 <[^>]*> bdc40010 cache 0x4,16\(t6\) 00000030 <[^>]*> bdc40010 cache 0x4,16\(t6\)
0+000034 <[^>]*> 71ee0010 .word 0x71ee0010 00000034 <[^>]*> 71ee0010 .word 0x71ee0010
0+000038 <[^>]*> 42000023 c0 0x23 00000038 <[^>]*> 42000023 c0 0x23
0+00003c <[^>]*> 42000021 c0 0x21 0000003c <[^>]*> 42000021 c0 0x21
0+000040 <[^>]*> 42000022 c0 0x22 00000040 <[^>]*> 42000022 c0 0x22
0+000044 <[^>]*> 70850000 madd a0,a1 00000044 <[^>]*> 70850000 madd a0,a1
0+000048 <[^>]*> 70a60001 maddu a1,a2 00000048 <[^>]*> 70a60001 maddu a1,a2
0+00004c <[^>]*> 70e83002 mul a2,a3,t0 0000004c <[^>]*> 70e83002 mul a2,a3,t0
0+000050 <[^>]*> 4500ffff bc1f 0+000050 <[^>]*> 00000050 <[^>]*> 4500ffff bc1f 00000050 <[^>]*>
0+000054 <[^>]*> 4504fffe bc1f \$fcc1,0+000050 <[^>]*> 00000054 <[^>]*> 4504fffe bc1f \$fcc1,00000050 <[^>]*>
0+000058 <[^>]*> 4506fffd bc1fl \$fcc1,0+000050 <[^>]*> 00000058 <[^>]*> 4506fffd bc1fl \$fcc1,00000050 <[^>]*>
0+00005c <[^>]*> 4505fffc bc1t \$fcc1,0+000050 <[^>]*> 0000005c <[^>]*> 4505fffc bc1t \$fcc1,00000050 <[^>]*>
0+000060 <[^>]*> 450bfffb bc1tl \$fcc2,0+000050 <[^>]*> 00000060 <[^>]*> 450bfffb bc1tl \$fcc2,00000050 <[^>]*>
0+000064 <[^>]*> 46262030 c\.f\.d \$f4,\$f6 00000064 <[^>]*> 46262030 c\.f\.d \$f4,\$f6
0+000068 <[^>]*> 46262130 c\.f\.d \$fcc1,\$f4,\$f6 00000068 <[^>]*> 46262130 c\.f\.d \$fcc1,\$f4,\$f6
0+00006c <[^>]*> 4ca40081 ldxc1 \$f2,a0\(a1\) 0000006c <[^>]*> 4ca40081 ldxc1 \$f2,a0\(a1\)
0+000070 <[^>]*> 4ca40080 lwxc1 \$f2,a0\(a1\) 00000070 <[^>]*> 4ca40080 lwxc1 \$f2,a0\(a1\)
0+000074 <[^>]*> 4c462021 madd\.d \$f0,\$f2,\$f4,\$f6 00000074 <[^>]*> 4c462021 madd\.d \$f0,\$f2,\$f4,\$f6
0+000078 <[^>]*> 4c462020 madd\.s \$f0,\$f2,\$f4,\$f6 00000078 <[^>]*> 4c462020 madd\.s \$f0,\$f2,\$f4,\$f6
0+00007c <[^>]*> 00b02001 movf a0,a1,\$fcc4 0000007c <[^>]*> 00b02001 movf a0,a1,\$fcc4
0+000080 <[^>]*> 46203111 movf\.d \$f4,\$f6,\$fcc0 00000080 <[^>]*> 46203111 movf\.d \$f4,\$f6,\$fcc0
0+000084 <[^>]*> 46003111 movf\.s \$f4,\$f6,\$fcc0 00000084 <[^>]*> 46003111 movf\.s \$f4,\$f6,\$fcc0
0+000088 <[^>]*> 00c6200b movn a0,a2,a2 00000088 <[^>]*> 00c6200b movn a0,a2,a2
0+00008c <[^>]*> 46263113 movn\.d \$f4,\$f6,a2 0000008c <[^>]*> 46263113 movn\.d \$f4,\$f6,a2
0+000090 <[^>]*> 46063113 movn\.s \$f4,\$f6,a2 00000090 <[^>]*> 46063113 movn\.s \$f4,\$f6,a2
0+000094 <[^>]*> 00b12001 movt a0,a1,\$fcc4 00000094 <[^>]*> 00b12001 movt a0,a1,\$fcc4
0+000098 <[^>]*> 46213111 movt\.d \$f4,\$f6,\$fcc0 00000098 <[^>]*> 46213111 movt\.d \$f4,\$f6,\$fcc0
0+00009c <[^>]*> 46013111 movt\.s \$f4,\$f6,\$fcc0 0000009c <[^>]*> 46013111 movt\.s \$f4,\$f6,\$fcc0
0+0000a0 <[^>]*> 00c6200a movz a0,a2,a2 000000a0 <[^>]*> 00c6200a movz a0,a2,a2
0+0000a4 <[^>]*> 46263112 movz\.d \$f4,\$f6,a2 000000a4 <[^>]*> 46263112 movz\.d \$f4,\$f6,a2
0+0000a8 <[^>]*> 46063112 movz\.s \$f4,\$f6,a2 000000a8 <[^>]*> 46063112 movz\.s \$f4,\$f6,a2
0+0000ac <[^>]*> 4c462029 msub\.d \$f0,\$f2,\$f4,\$f6 000000ac <[^>]*> 4c462029 msub\.d \$f0,\$f2,\$f4,\$f6
0+0000b0 <[^>]*> 4c462028 msub\.s \$f0,\$f2,\$f4,\$f6 000000b0 <[^>]*> 4c462028 msub\.s \$f0,\$f2,\$f4,\$f6
0+0000b4 <[^>]*> 4c462031 nmadd\.d \$f0,\$f2,\$f4,\$f6 000000b4 <[^>]*> 4c462031 nmadd\.d \$f0,\$f2,\$f4,\$f6
0+0000b8 <[^>]*> 4c462030 nmadd\.s \$f0,\$f2,\$f4,\$f6 000000b8 <[^>]*> 4c462030 nmadd\.s \$f0,\$f2,\$f4,\$f6
0+0000bc <[^>]*> 4c462039 nmsub\.d \$f0,\$f2,\$f4,\$f6 000000bc <[^>]*> 4c462039 nmsub\.d \$f0,\$f2,\$f4,\$f6
0+0000c0 <[^>]*> 4c462038 nmsub\.s \$f0,\$f2,\$f4,\$f6 000000c0 <[^>]*> 4c462038 nmsub\.s \$f0,\$f2,\$f4,\$f6
0+0000c4 <[^>]*> 4ca4200f prefx 0x4,a0\(a1\) 000000c4 <[^>]*> 4ca4200f prefx 0x4,a0\(a1\)
0+0000c8 <[^>]*> 46203115 recip\.d \$f4,\$f6 000000c8 <[^>]*> 46203115 recip\.d \$f4,\$f6
0+0000cc <[^>]*> 46003115 recip\.s \$f4,\$f6 000000cc <[^>]*> 46003115 recip\.s \$f4,\$f6
0+0000d0 <[^>]*> 46203116 rsqrt\.d \$f4,\$f6 000000d0 <[^>]*> 46203116 rsqrt\.d \$f4,\$f6
0+0000d4 <[^>]*> 46003116 rsqrt\.s \$f4,\$f6 000000d4 <[^>]*> 46003116 rsqrt\.s \$f4,\$f6
0+0000d8 <[^>]*> 4ca42009 sdxc1 \$f4,a0\(a1\) 000000d8 <[^>]*> 4ca42009 sdxc1 \$f4,a0\(a1\)
0+0000dc <[^>]*> 4ca42008 swxc1 \$f4,a0\(a1\) 000000dc <[^>]*> 4ca42008 swxc1 \$f4,a0\(a1\)
0+0000e0 <[^>]*> 46c01005 abs\.ps \$f0,\$f2 000000e0 <[^>]*> 46c01005 abs\.ps \$f0,\$f2
0+0000e4 <[^>]*> 46c62080 add\.ps \$f2,\$f4,\$f6 000000e4 <[^>]*> 46c62080 add\.ps \$f2,\$f4,\$f6
0+0000e8 <[^>]*> 4c6a419e alnv\.ps \$f6,\$f8,\$f10,v1 000000e8 <[^>]*> 4c6a419e alnv\.ps \$f6,\$f8,\$f10,v1
0+0000ec <[^>]*> 46ca4032 c\.eq\.ps \$f8,\$f10 000000ec <[^>]*> 46ca4032 c\.eq\.ps \$f8,\$f10
0+0000f0 <[^>]*> 46cc5232 c\.eq\.ps \$fcc2,\$f10,\$f12 000000f0 <[^>]*> 46cc5232 c\.eq\.ps \$fcc2,\$f10,\$f12
0+0000f4 <[^>]*> 46ca4030 c\.f\.ps \$f8,\$f10 000000f4 <[^>]*> 46ca4030 c\.f\.ps \$f8,\$f10
0+0000f8 <[^>]*> 46cc5230 c\.f\.ps \$fcc2,\$f10,\$f12 000000f8 <[^>]*> 46cc5230 c\.f\.ps \$fcc2,\$f10,\$f12
0+0000fc <[^>]*> 46ca403e c\.le\.ps \$f8,\$f10 000000fc <[^>]*> 46ca403e c\.le\.ps \$f8,\$f10
0+000100 <[^>]*> 46cc523e c\.le\.ps \$fcc2,\$f10,\$f12 00000100 <[^>]*> 46cc523e c\.le\.ps \$fcc2,\$f10,\$f12
0+000104 <[^>]*> 46ca403c c\.lt\.ps \$f8,\$f10 00000104 <[^>]*> 46ca403c c\.lt\.ps \$f8,\$f10
0+000108 <[^>]*> 46cc523c c\.lt\.ps \$fcc2,\$f10,\$f12 00000108 <[^>]*> 46cc523c c\.lt\.ps \$fcc2,\$f10,\$f12
0+00010c <[^>]*> 46ca403d c\.nge\.ps \$f8,\$f10 0000010c <[^>]*> 46ca403d c\.nge\.ps \$f8,\$f10
0+000110 <[^>]*> 46cc523d c\.nge\.ps \$fcc2,\$f10,\$f12 00000110 <[^>]*> 46cc523d c\.nge\.ps \$fcc2,\$f10,\$f12
0+000114 <[^>]*> 46ca403b c\.ngl\.ps \$f8,\$f10 00000114 <[^>]*> 46ca403b c\.ngl\.ps \$f8,\$f10
0+000118 <[^>]*> 46cc523b c\.ngl\.ps \$fcc2,\$f10,\$f12 00000118 <[^>]*> 46cc523b c\.ngl\.ps \$fcc2,\$f10,\$f12
0+00011c <[^>]*> 46ca4039 c\.ngle\.ps \$f8,\$f10 0000011c <[^>]*> 46ca4039 c\.ngle\.ps \$f8,\$f10
0+000120 <[^>]*> 46cc5239 c\.ngle\.ps \$fcc2,\$f10,\$f12 00000120 <[^>]*> 46cc5239 c\.ngle\.ps \$fcc2,\$f10,\$f12
0+000124 <[^>]*> 46ca403f c\.ngt\.ps \$f8,\$f10 00000124 <[^>]*> 46ca403f c\.ngt\.ps \$f8,\$f10
0+000128 <[^>]*> 46cc523f c\.ngt\.ps \$fcc2,\$f10,\$f12 00000128 <[^>]*> 46cc523f c\.ngt\.ps \$fcc2,\$f10,\$f12
0+00012c <[^>]*> 46ca4036 c\.ole\.ps \$f8,\$f10 0000012c <[^>]*> 46ca4036 c\.ole\.ps \$f8,\$f10
0+000130 <[^>]*> 46cc5236 c\.ole\.ps \$fcc2,\$f10,\$f12 00000130 <[^>]*> 46cc5236 c\.ole\.ps \$fcc2,\$f10,\$f12
0+000134 <[^>]*> 46ca4034 c\.olt\.ps \$f8,\$f10 00000134 <[^>]*> 46ca4034 c\.olt\.ps \$f8,\$f10
0+000138 <[^>]*> 46cc5234 c\.olt\.ps \$fcc2,\$f10,\$f12 00000138 <[^>]*> 46cc5234 c\.olt\.ps \$fcc2,\$f10,\$f12
0+00013c <[^>]*> 46ca403a c\.seq\.ps \$f8,\$f10 0000013c <[^>]*> 46ca403a c\.seq\.ps \$f8,\$f10
0+000140 <[^>]*> 46cc523a c\.seq\.ps \$fcc2,\$f10,\$f12 00000140 <[^>]*> 46cc523a c\.seq\.ps \$fcc2,\$f10,\$f12
0+000144 <[^>]*> 46ca4038 c\.sf\.ps \$f8,\$f10 00000144 <[^>]*> 46ca4038 c\.sf\.ps \$f8,\$f10
0+000148 <[^>]*> 46cc5238 c\.sf\.ps \$fcc2,\$f10,\$f12 00000148 <[^>]*> 46cc5238 c\.sf\.ps \$fcc2,\$f10,\$f12
0+00014c <[^>]*> 46ca4033 c\.ueq\.ps \$f8,\$f10 0000014c <[^>]*> 46ca4033 c\.ueq\.ps \$f8,\$f10
0+000150 <[^>]*> 46cc5233 c\.ueq\.ps \$fcc2,\$f10,\$f12 00000150 <[^>]*> 46cc5233 c\.ueq\.ps \$fcc2,\$f10,\$f12
0+000154 <[^>]*> 46ca4037 c\.ule\.ps \$f8,\$f10 00000154 <[^>]*> 46ca4037 c\.ule\.ps \$f8,\$f10
0+000158 <[^>]*> 46cc5237 c\.ule\.ps \$fcc2,\$f10,\$f12 00000158 <[^>]*> 46cc5237 c\.ule\.ps \$fcc2,\$f10,\$f12
0+00015c <[^>]*> 46ca4035 c\.ult\.ps \$f8,\$f10 0000015c <[^>]*> 46ca4035 c\.ult\.ps \$f8,\$f10
0+000160 <[^>]*> 46cc5235 c\.ult\.ps \$fcc2,\$f10,\$f12 00000160 <[^>]*> 46cc5235 c\.ult\.ps \$fcc2,\$f10,\$f12
0+000164 <[^>]*> 46ca4031 c\.un\.ps \$f8,\$f10 00000164 <[^>]*> 46ca4031 c\.un\.ps \$f8,\$f10
0+000168 <[^>]*> 46cc5231 c\.un\.ps \$fcc2,\$f10,\$f12 00000168 <[^>]*> 46cc5231 c\.un\.ps \$fcc2,\$f10,\$f12
0+00016c <[^>]*> 46107326 cvt\.ps\.s \$f12,\$f14,\$f16 0000016c <[^>]*> 46107326 cvt\.ps\.s \$f12,\$f14,\$f16
0+000170 <[^>]*> 46c09428 cvt\.s\.pl \$f16,\$f18 00000170 <[^>]*> 46c09428 cvt\.s\.pl \$f16,\$f18
0+000174 <[^>]*> 46c0a4a0 cvt\.s\.pu \$f18,\$f20 00000174 <[^>]*> 46c0a4a0 cvt\.s\.pu \$f18,\$f20
0+000178 <[^>]*> 4ca40505 luxc1 \$f20,a0\(a1\) 00000178 <[^>]*> 4ca40505 luxc1 \$f20,a0\(a1\)
0+00017c <[^>]*> 4edac526 madd\.ps \$f20,\$f22,\$f24,\$f26 0000017c <[^>]*> 4edac526 madd\.ps \$f20,\$f22,\$f24,\$f26
0+000180 <[^>]*> 46c0d606 mov\.ps \$f24,\$f26 00000180 <[^>]*> 46c0d606 mov\.ps \$f24,\$f26
0+000184 <[^>]*> 46c8e691 movf\.ps \$f26,\$f28,\$fcc2 00000184 <[^>]*> 46c8e691 movf\.ps \$f26,\$f28,\$fcc2
0+000188 <[^>]*> 46c3e693 movn\.ps \$f26,\$f28,v1 00000188 <[^>]*> 46c3e693 movn\.ps \$f26,\$f28,v1
0+00018c <[^>]*> 46d1f711 movt\.ps \$f28,\$f30,\$fcc4 0000018c <[^>]*> 46d1f711 movt\.ps \$f28,\$f30,\$fcc4
0+000190 <[^>]*> 46c5f712 movz\.ps \$f28,\$f30,a1 00000190 <[^>]*> 46c5f712 movz\.ps \$f28,\$f30,a1
0+000194 <[^>]*> 4c0417ae msub\.ps \$f30,\$f0,\$f2,\$f4 00000194 <[^>]*> 4c0417ae msub\.ps \$f30,\$f0,\$f2,\$f4
0+000198 <[^>]*> 46c62082 mul\.ps \$f2,\$f4,\$f6 00000198 <[^>]*> 46c62082 mul\.ps \$f2,\$f4,\$f6
0+00019c <[^>]*> 46c04187 neg\.ps \$f6,\$f8 0000019c <[^>]*> 46c04187 neg\.ps \$f6,\$f8
0+0001a0 <[^>]*> 4d0c51b6 nmadd\.ps \$f6,\$f8,\$f10,\$f12 000001a0 <[^>]*> 4d0c51b6 nmadd\.ps \$f6,\$f8,\$f10,\$f12
0+0001a4 <[^>]*> 4d0c51be nmsub\.ps \$f6,\$f8,\$f10,\$f12 000001a4 <[^>]*> 4d0c51be nmsub\.ps \$f6,\$f8,\$f10,\$f12
0+0001a8 <[^>]*> 46ce62ac pll\.ps \$f10,\$f12,\$f14 000001a8 <[^>]*> 46ce62ac pll\.ps \$f10,\$f12,\$f14
0+0001ac <[^>]*> 46d283ad plu\.ps \$f14,\$f16,\$f18 000001ac <[^>]*> 46d283ad plu\.ps \$f14,\$f16,\$f18
0+0001b0 <[^>]*> 46d4942e pul\.ps \$f16,\$f18,\$f20 000001b0 <[^>]*> 46d4942e pul\.ps \$f16,\$f18,\$f20
0+0001b4 <[^>]*> 46d8b52f puu\.ps \$f20,\$f22,\$f24 000001b4 <[^>]*> 46d8b52f puu\.ps \$f20,\$f22,\$f24
0+0001b8 <[^>]*> 46dac581 sub\.ps \$f22,\$f24,\$f26 000001b8 <[^>]*> 46dac581 sub\.ps \$f22,\$f24,\$f26
0+0001bc <[^>]*> 4ce6d00d suxc1 \$f26,a2\(a3\) 000001bc <[^>]*> 4ce6d00d suxc1 \$f26,a2\(a3\)
0+0001c0 <[^>]*> 46cc5332 c\.eq\.ps \$fcc3,\$f10,\$f12 000001c0 <[^>]*> 46cc5332 c\.eq\.ps \$fcc3,\$f10,\$f12
0+0001c4 <[^>]*> 46cce691 movf\.ps \$f26,\$f28,\$fcc3 000001c4 <[^>]*> 46cce691 movf\.ps \$f26,\$f28,\$fcc3
0+0001c8 <[^>]*> 70410821 clo at,v0 000001c8 <[^>]*> 70410821 clo at,v0
0+0001cc <[^>]*> 70831820 clz v1,a0 000001cc <[^>]*> 70831820 clz v1,a0
0+0001d0 <[^>]*> 70a60000 madd a1,a2 000001d0 <[^>]*> 70a60000 madd a1,a2
0+0001d4 <[^>]*> 70e80001 maddu a3,t0 000001d4 <[^>]*> 70e80001 maddu a3,t0
0+0001d8 <[^>]*> 712a0004 msub t1,t2 000001d8 <[^>]*> 712a0004 msub t1,t2
0+0001dc <[^>]*> 716c0005 msubu t3,t4 000001dc <[^>]*> 716c0005 msubu t3,t4
0+0001e0 <[^>]*> 71cf6802 mul t5,t6,t7 000001e0 <[^>]*> 71cf6802 mul t5,t6,t7
0+0001e4 <[^>]*> ce040000 pref 0x4,0\(s0\) 000001e4 <[^>]*> ce040000 pref 0x4,0\(s0\)
0+0001e8 <[^>]*> ce247fff pref 0x4,32767\(s1\) 000001e8 <[^>]*> ce247fff pref 0x4,32767\(s1\)
0+0001ec <[^>]*> ce448000 pref 0x4,-32768\(s2\) 000001ec <[^>]*> ce448000 pref 0x4,-32768\(s2\)
0+0001f0 <[^>]*> 00000040 ssnop 000001f0 <[^>]*> 00000040 ssnop
0+0001f4 <[^>]*> 4900ff96 bc2f 0+000050 <[^>]*> 000001f4 <[^>]*> 4900ff96 bc2f 00000050 <[^>]*>
0+0001f8 <[^>]*> 00000000 nop 000001f8 <[^>]*> 00000000 nop
0+0001fc <[^>]*> 4902ff94 bc2fl 0+000050 <[^>]*> 000001fc <[^>]*> 4902ff94 bc2fl 00000050 <[^>]*>
0+000200 <[^>]*> 00000000 nop 00000200 <[^>]*> 00000000 nop
0+000204 <[^>]*> 4901ff92 bc2t 0+000050 <[^>]*> 00000204 <[^>]*> 4901ff92 bc2t 00000050 <[^>]*>
0+000208 <[^>]*> 00000000 nop 00000208 <[^>]*> 00000000 nop
0+00020c <[^>]*> 4903ff90 bc2tl 0+000050 <[^>]*> 0000020c <[^>]*> 4903ff90 bc2tl 00000050 <[^>]*>
0+000210 <[^>]*> 00000000 nop 00000210 <[^>]*> 00000000 nop
0+000214 <[^>]*> 48411000 cfc2 at,\$2 00000214 <[^>]*> 48411000 cfc2 at,\$2
0+000218 <[^>]*> 4b234567 c2 0x1234567 00000218 <[^>]*> 4b234567 c2 0x1234567
0+00021c <[^>]*> 48c21800 ctc2 v0,\$3 0000021c <[^>]*> 48c21800 ctc2 v0,\$3
0+000220 <[^>]*> 48032000 mfc2 v1,\$4 00000220 <[^>]*> 48032000 mfc2 v1,\$4
0+000224 <[^>]*> 48042800 mfc2 a0,\$5 00000224 <[^>]*> 48042800 mfc2 a0,\$5
0+000228 <[^>]*> 48053007 mfc2 a1,\$6,7 00000228 <[^>]*> 48053007 mfc2 a1,\$6,7
0+00022c <[^>]*> 48863800 mtc2 a2,\$7 0000022c <[^>]*> 48863800 mtc2 a2,\$7
0+000230 <[^>]*> 48874000 mtc2 a3,\$8 00000230 <[^>]*> 48874000 mtc2 a3,\$8
0+000234 <[^>]*> 48884807 mtc2 t0,\$9,7 00000234 <[^>]*> 48884807 mtc2 t0,\$9,7
0+000238 <[^>]*> bc250000 cache 0x5,0\(at\) 00000238 <[^>]*> bc250000 cache 0x5,0\(at\)
0+00023c <[^>]*> bc457fff cache 0x5,32767\(v0\) 0000023c <[^>]*> bc457fff cache 0x5,32767\(v0\)
0+000240 <[^>]*> bc658000 cache 0x5,-32768\(v1\) 00000240 <[^>]*> bc658000 cache 0x5,-32768\(v1\)
0+000244 <[^>]*> 42000018 eret 00000244 <[^>]*> 42000018 eret
0+000248 <[^>]*> 42000008 tlbp 00000248 <[^>]*> 42000008 tlbp
0+00024c <[^>]*> 42000001 tlbr 0000024c <[^>]*> 42000001 tlbr
0+000250 <[^>]*> 42000002 tlbwi 00000250 <[^>]*> 42000002 tlbwi
0+000254 <[^>]*> 42000006 tlbwr 00000254 <[^>]*> 42000006 tlbwr
0+000258 <[^>]*> 42000020 wait 00000258 <[^>]*> 42000020 wait
0+00025c <[^>]*> 42000020 wait 0000025c <[^>]*> 42000020 wait
0+000260 <[^>]*> 4359e260 wait 0x56789 00000260 <[^>]*> 4359e260 wait 0x56789
0+000264 <[^>]*> 0000000d break 00000264 <[^>]*> 0000000d break
0+000268 <[^>]*> 0000000d break 00000268 <[^>]*> 0000000d break
0+00026c <[^>]*> 0345000d break 0x345 0000026c <[^>]*> 0345000d break 0x345
0+000270 <[^>]*> 0048d14d break 0x48,0x345 00000270 <[^>]*> 0048d14d break 0x48,0x345
0+000274 <[^>]*> 7000003f sdbbp 00000274 <[^>]*> 7000003f sdbbp
0+000278 <[^>]*> 7000003f sdbbp 00000278 <[^>]*> 7000003f sdbbp
0+00027c <[^>]*> 7159e27f sdbbp 0x56789 0000027c <[^>]*> 7159e27f sdbbp 0x56789
0+000280 <[^>]*> 000000c0 ehb 00000280 <[^>]*> 000000c0 ehb
0+000284 <[^>]*> 7ca43980 .word 0x7ca43980 00000284 <[^>]*> 7ca43980 .word 0x7ca43980
0+000288 <[^>]*> 7ca46984 .word 0x7ca46984 00000288 <[^>]*> 7ca46984 .word 0x7ca46984
0+00028c <[^>]*> 0100fc09 jalr.hb t0 0000028c <[^>]*> 0100fc09 jalr.hb t0
0+000290 <[^>]*> 0120a409 jalr.hb s4,t1 00000290 <[^>]*> 0120a409 jalr.hb s4,t1
0+000294 <[^>]*> 01000408 jr.hb t0 00000294 <[^>]*> 01000408 jr.hb t0
0+000298 <[^>]*> 7c0a003b .word 0x7c0a003b 00000298 <[^>]*> 7c0a003b .word 0x7c0a003b
0+00029c <[^>]*> 7c0b083b .word 0x7c0b083b 0000029c <[^>]*> 7c0b083b .word 0x7c0b083b
0+0002a0 <[^>]*> 7c0c103b .word 0x7c0c103b 000002a0 <[^>]*> 7c0c103b .word 0x7c0c103b
0+0002a4 <[^>]*> 7c0d183b .word 0x7c0d183b 000002a4 <[^>]*> 7c0d183b .word 0x7c0d183b
0+0002a8 <[^>]*> 7c0e203b .word 0x7c0e203b 000002a8 <[^>]*> 7c0e203b .word 0x7c0e203b
0+0002ac <[^>]*> 7c0f283b .word 0x7c0f283b 000002ac <[^>]*> 7c0f283b .word 0x7c0f283b
0+0002b0 <[^>]*> 002acf02 .word 0x2acf02 000002b0 <[^>]*> 002acf02 .word 0x2acf02
0+0002b4 <[^>]*> 002ac902 .word 0x2ac902 000002b4 <[^>]*> 002ac902 .word 0x2ac902
0+0002b8 <[^>]*> 0004c823 negu t9,a0 000002b8 <[^>]*> 0004c823 negu t9,a0
0+0002bc <[^>]*> 032ac846 .word 0x32ac846 000002bc <[^>]*> 032ac846 .word 0x32ac846
0+0002c0 <[^>]*> 008ac846 .word 0x8ac846 000002c0 <[^>]*> 008ac846 .word 0x8ac846
0+0002c4 <[^>]*> 008ac846 .word 0x8ac846 000002c4 <[^>]*> 008ac846 .word 0x8ac846
0+0002c8 <[^>]*> 7c073c20 .word 0x7c073c20 000002c8 <[^>]*> 7c073c20 .word 0x7c073c20
0+0002cc <[^>]*> 7c0a4420 .word 0x7c0a4420 000002cc <[^>]*> 7c0a4420 .word 0x7c0a4420
0+0002d0 <[^>]*> 7c073e20 .word 0x7c073e20 000002d0 <[^>]*> 7c073e20 .word 0x7c073e20
0+0002d4 <[^>]*> 7c0a4620 .word 0x7c0a4620 000002d4 <[^>]*> 7c0a4620 .word 0x7c0a4620
0+0002d8 <[^>]*> 055f5555 .word 0x55f5555 000002d8 <[^>]*> 055f5555 .word 0x55f5555
0+0002dc <[^>]*> 7c0738a0 .word 0x7c0738a0 000002dc <[^>]*> 7c0738a0 .word 0x7c0738a0
0+0002e0 <[^>]*> 7c0a40a0 .word 0x7c0a40a0 000002e0 <[^>]*> 7c0a40a0 .word 0x7c0a40a0
0+0002e4 <[^>]*> 41606000 .word 0x41606000 000002e4 <[^>]*> 41606000 .word 0x41606000
0+0002e8 <[^>]*> 41606000 .word 0x41606000 000002e8 <[^>]*> 41606000 .word 0x41606000
0+0002ec <[^>]*> 416a6000 .word 0x416a6000 000002ec <[^>]*> 416a6000 .word 0x416a6000
0+0002f0 <[^>]*> 41606020 .word 0x41606020 000002f0 <[^>]*> 41606020 .word 0x41606020
0+0002f4 <[^>]*> 41606020 .word 0x41606020 000002f4 <[^>]*> 41606020 .word 0x41606020
0+0002f8 <[^>]*> 416a6020 .word 0x416a6020 000002f8 <[^>]*> 416a6020 .word 0x416a6020
0+0002fc <[^>]*> 41595000 .word 0x41595000 000002fc <[^>]*> 41595000 .word 0x41595000
0+000300 <[^>]*> 41d95000 .word 0x41d95000 00000300 <[^>]*> 41d95000 .word 0x41d95000
0+000304 <[^>]*> 44710000 .word 0x44710000 00000304 <[^>]*> 44710000 .word 0x44710000
0+000308 <[^>]*> 44f10000 .word 0x44f10000 00000308 <[^>]*> 44f10000 .word 0x44f10000
0+00030c <[^>]*> 48715555 .word 0x48715555 0000030c <[^>]*> 48715555 .word 0x48715555
0+000310 <[^>]*> 48f15555 .word 0x48f15555 00000310 <[^>]*> 48f15555 .word 0x48f15555
0+000314 <[^>]*> 70410825 dclo at,v0 00000314 <[^>]*> 70410825 dclo at,v0
0+000318 <[^>]*> 70831824 dclz v1,a0 00000318 <[^>]*> 70831824 dclz v1,a0
0+00031c <[^>]*> 48232000 dmfc2 v1,\$4 0000031c <[^>]*> 48232000 dmfc2 v1,\$4
0+000320 <[^>]*> 48242800 dmfc2 a0,\$5 00000320 <[^>]*> 48242800 dmfc2 a0,\$5
0+000324 <[^>]*> 48253007 dmfc2 a1,\$6,7 00000324 <[^>]*> 48253007 dmfc2 a1,\$6,7
0+000328 <[^>]*> 48a63800 dmtc2 a2,\$7 00000328 <[^>]*> 48a63800 dmtc2 a2,\$7
0+00032c <[^>]*> 48a74000 dmtc2 a3,\$8 0000032c <[^>]*> 48a74000 dmtc2 a3,\$8
0+000330 <[^>]*> 48a84807 dmtc2 t0,\$9,7 00000330 <[^>]*> 48a84807 dmtc2 t0,\$9,7
0+000334 <[^>]*> 00850029 .word 0x850029 00000334 <[^>]*> 00850029 .word 0x850029
0+000338 <[^>]*> 00a60028 .word 0xa60028 00000338 <[^>]*> 00a60028 .word 0xa60028
0+00033c <[^>]*> 00002012 mflo a0 0000033c <[^>]*> 00002012 mflo a0
0+000340 <[^>]*> 00a62029 .word 0xa62029 00000340 <[^>]*> 00a62029 .word 0xa62029
0+000344 <[^>]*> 00a62229 .word 0xa62229 00000344 <[^>]*> 00a62229 .word 0xa62229
0+000348 <[^>]*> 00a62629 .word 0xa62629 00000348 <[^>]*> 00a62629 .word 0xa62629
0+00034c <[^>]*> 00a62269 .word 0xa62269 0000034c <[^>]*> 00a62269 .word 0xa62269
0+000350 <[^>]*> 00a62669 .word 0xa62669 00000350 <[^>]*> 00a62669 .word 0xa62669
0+000354 <[^>]*> 00a62429 .word 0xa62429 00000354 <[^>]*> 00a62429 .word 0xa62429
0+000358 <[^>]*> 00a62069 .word 0xa62069 00000358 <[^>]*> 00a62069 .word 0xa62069
0+00035c <[^>]*> 00a62469 .word 0xa62469 0000035c <[^>]*> 00a62469 .word 0xa62469
0+000360 <[^>]*> 00002012 mflo a0 00000360 <[^>]*> 00002012 mflo a0
0+000364 <[^>]*> 00a62028 .word 0xa62028 00000364 <[^>]*> 00a62028 .word 0xa62028
0+000368 <[^>]*> 00a62228 .word 0xa62228 00000368 <[^>]*> 00a62228 .word 0xa62228
0+00036c <[^>]*> 00a62628 .word 0xa62628 0000036c <[^>]*> 00a62628 .word 0xa62628
0+000370 <[^>]*> 00a62268 .word 0xa62268 00000370 <[^>]*> 00a62268 .word 0xa62268
0+000374 <[^>]*> 00a62668 .word 0xa62668 00000374 <[^>]*> 00a62668 .word 0xa62668
0+000378 <[^>]*> 00a62428 .word 0xa62428 00000378 <[^>]*> 00a62428 .word 0xa62428
0+00037c <[^>]*> 00a62068 .word 0xa62068 0000037c <[^>]*> 00a62068 .word 0xa62068
0+000380 <[^>]*> 00a62468 .word 0xa62468 00000380 <[^>]*> 00a62468 .word 0xa62468
0+000384 <[^>]*> 00a62059 .word 0xa62059 00000384 <[^>]*> 00a62059 .word 0xa62059
0+000388 <[^>]*> 00a62258 .word 0xa62258 00000388 <[^>]*> 00a62258 .word 0xa62258
0+00038c <[^>]*> 00a62259 .word 0xa62259 0000038c <[^>]*> 00a62259 .word 0xa62259
0+000390 <[^>]*> 00a620d8 .word 0xa620d8 00000390 <[^>]*> 00a620d8 .word 0xa620d8
0+000394 <[^>]*> 00a620d9 .word 0xa620d9 00000394 <[^>]*> 00a620d9 .word 0xa620d9
0+000398 <[^>]*> 00a622d8 .word 0xa622d8 00000398 <[^>]*> 00a622d8 .word 0xa622d8
0+00039c <[^>]*> 00a622d9 .word 0xa622d9 0000039c <[^>]*> 00a622d9 .word 0xa622d9
0+0003a0 <[^>]*> 00a62158 .word 0xa62158 000003a0 <[^>]*> 00a62158 .word 0xa62158
0+0003a4 <[^>]*> 00a62159 .word 0xa62159 000003a4 <[^>]*> 00a62159 .word 0xa62159
0+0003a8 <[^>]*> 00a62358 .word 0xa62358 000003a8 <[^>]*> 00a62358 .word 0xa62358
0+0003ac <[^>]*> 00a62359 .word 0xa62359 000003ac <[^>]*> 00a62359 .word 0xa62359
0+0003b0 <[^>]*> 00a621d8 .word 0xa621d8 000003b0 <[^>]*> 00a621d8 .word 0xa621d8
0+0003b4 <[^>]*> 00a621d9 .word 0xa621d9 000003b4 <[^>]*> 00a621d9 .word 0xa621d9
0+0003b8 <[^>]*> 00a623d8 .word 0xa623d8 000003b8 <[^>]*> 00a623d8 .word 0xa623d8
0+0003bc <[^>]*> 00a623d9 .word 0xa623d9 000003bc <[^>]*> 00a623d9 .word 0xa623d9
0+0003c0 <[^>]*> 00252642 .word 0x252642 000003c0 <[^>]*> 00252642 .word 0x252642
0+0003c4 <[^>]*> 00c52046 .word 0xc52046 000003c4 <[^>]*> 00c52046 .word 0xc52046
0+0003c8 <[^>]*> 0025267a .word 0x25267a 000003c8 <[^>]*> 0025267a .word 0x25267a
0+0003cc <[^>]*> 0025267e .word 0x25267e 000003cc <[^>]*> 0025267e .word 0x25267e
0+0003d0 <[^>]*> 0025267e .word 0x25267e 000003d0 <[^>]*> 0025267e .word 0x25267e
0+0003d4 <[^>]*> 00c52056 .word 0xc52056 000003d4 <[^>]*> 00c52056 .word 0xc52056
0+0003d8 <[^>]*> 7000003f sdbbp 000003d8 <[^>]*> 7000003f sdbbp
0+0003dc <[^>]*> 7000003e .word 0x7000003e 000003dc <[^>]*> 7000003e .word 0x7000003e
0+0003e0 <[^>]*> 7003183d .word 0x7003183d 000003e0 <[^>]*> 7003183d .word 0x7003183d
0+0003e4 <[^>]*> 7083183d .word 0x7083183d 000003e4 <[^>]*> 7083183d .word 0x7083183d
0+0003e8 <[^>]*> 4004c803 mfc0 a0,c0_perfcnt,3 000003e8 <[^>]*> 4004c803 mfc0 a0,c0_perfcnt,3
0+0003ec <[^>]*> 4004c802 mfc0 a0,c0_perfcnt,2 000003ec <[^>]*> 4004c802 mfc0 a0,c0_perfcnt,2
0+0003f0 <[^>]*> 4084c803 mtc0 a0,c0_perfcnt,3 000003f0 <[^>]*> 4084c803 mtc0 a0,c0_perfcnt,3
0+0003f4 <[^>]*> 4084c802 mtc0 a0,c0_perfcnt,2 000003f4 <[^>]*> 4084c802 mtc0 a0,c0_perfcnt,2
0+0003f8 <[^>]*> 4ac4100b c2 0xc4100b 000003f8 <[^>]*> 4ac4100b c2 0xc4100b
0+0003fc <[^>]*> 4886208b .word 0x4886208b 000003fc <[^>]*> 4886208b .word 0x4886208b
0+000400 <[^>]*> 4bcf218b c2 0x1cf218b 00000400 <[^>]*> 4bcf218b c2 0x1cf218b
0+000404 <[^>]*> 4bdf310b c2 0x1df310b 00000404 <[^>]*> 4bdf310b c2 0x1df310b
0+000408 <[^>]*> 4ac4100c c2 0xc4100c 00000408 <[^>]*> 4ac4100c c2 0xc4100c
0+00040c <[^>]*> 4886208c .word 0x4886208c 0000040c <[^>]*> 4886208c .word 0x4886208c
0+000410 <[^>]*> 4bcf218c c2 0x1cf218c 00000410 <[^>]*> 4bcf218c c2 0x1cf218c
0+000414 <[^>]*> 4bdf310c c2 0x1df310c 00000414 <[^>]*> 4bdf310c c2 0x1df310c
0+000418 <[^>]*> 4ac20001 c2 0xc20001 00000418 <[^>]*> 4ac20001 c2 0xc20001
0+00041c <[^>]*> 48862001 mtc2 a2,\$4,1 0000041c <[^>]*> 48862001 mtc2 a2,\$4,1
0+000420 <[^>]*> 4bcf3001 c2 0x1cf3001 00000420 <[^>]*> 4bcf3001 c2 0x1cf3001
0+000424 <[^>]*> 4bdf2001 c2 0x1df2001 00000424 <[^>]*> 4bdf2001 c2 0x1df2001
0+000428 <[^>]*> 4ac20005 c2 0xc20005 00000428 <[^>]*> 4ac20005 c2 0xc20005
0+00042c <[^>]*> 48862005 mtc2 a2,\$4,5 0000042c <[^>]*> 48862005 mtc2 a2,\$4,5
0+000430 <[^>]*> 4bcf3005 c2 0x1cf3005 00000430 <[^>]*> 4bcf3005 c2 0x1cf3005
0+000434 <[^>]*> 4bdf2005 c2 0x1df2005 00000434 <[^>]*> 4bdf2005 c2 0x1df2005
0+000438 <[^>]*> 4ac20004 c2 0xc20004 00000438 <[^>]*> 4ac20004 c2 0xc20004
0+00043c <[^>]*> 48862004 mtc2 a2,\$4,4 0000043c <[^>]*> 48862004 mtc2 a2,\$4,4
0+000440 <[^>]*> 4bcf3004 c2 0x1cf3004 00000440 <[^>]*> 4bcf3004 c2 0x1cf3004
0+000444 <[^>]*> 4bdf2004 c2 0x1df2004 00000444 <[^>]*> 4bdf2004 c2 0x1df2004
0+000448 <[^>]*> 4ac41007 c2 0xc41007 00000448 <[^>]*> 4ac41007 c2 0xc41007
0+00044c <[^>]*> 48862087 .word 0x48862087 0000044c <[^>]*> 48862087 .word 0x48862087
0+000450 <[^>]*> 4bcf2187 c2 0x1cf2187 00000450 <[^>]*> 4bcf2187 c2 0x1cf2187
0+000454 <[^>]*> 4bdf3107 c2 0x1df3107 00000454 <[^>]*> 4bdf3107 c2 0x1df3107
0+000458 <[^>]*> 4ac41006 c2 0xc41006 00000458 <[^>]*> 4ac41006 c2 0xc41006
0+00045c <[^>]*> 48862086 .word 0x48862086 0000045c <[^>]*> 48862086 .word 0x48862086
0+000460 <[^>]*> 4bcf2186 c2 0x1cf2186 00000460 <[^>]*> 4bcf2186 c2 0x1cf2186
0+000464 <[^>]*> 4bdf3106 c2 0x1df3106 00000464 <[^>]*> 4bdf3106 c2 0x1df3106
0+000468 <[^>]*> 4ac41030 c2 0xc41030 00000468 <[^>]*> 4ac41030 c2 0xc41030
0+00046c <[^>]*> 488620b0 .word 0x488620b0 0000046c <[^>]*> 488620b0 .word 0x488620b0
0+000470 <[^>]*> 4bcf21b0 c2 0x1cf21b0 00000470 <[^>]*> 4bcf21b0 c2 0x1cf21b0
0+000474 <[^>]*> 4bdf3130 c2 0x1df3130 00000474 <[^>]*> 4bdf3130 c2 0x1df3130
0+000478 <[^>]*> 4ac20033 c2 0xc20033 00000478 <[^>]*> 4ac20033 c2 0xc20033
0+00047c <[^>]*> 48862033 .word 0x48862033 0000047c <[^>]*> 48862033 .word 0x48862033
0+000480 <[^>]*> 4bcf3033 c2 0x1cf3033 00000480 <[^>]*> 4bcf3033 c2 0x1cf3033
0+000484 <[^>]*> 4bdf2033 c2 0x1df2033 00000484 <[^>]*> 4bdf2033 c2 0x1df2033
0+000488 <[^>]*> 4ac20433 c2 0xc20433 00000488 <[^>]*> 4ac20433 c2 0xc20433
0+00048c <[^>]*> 48862433 .word 0x48862433 0000048c <[^>]*> 48862433 .word 0x48862433
0+000490 <[^>]*> 4bcf3433 c2 0x1cf3433 00000490 <[^>]*> 4bcf3433 c2 0x1cf3433
0+000494 <[^>]*> 4bdf2433 c2 0x1df2433 00000494 <[^>]*> 4bdf2433 c2 0x1df2433
0+000498 <[^>]*> 4ac20032 c2 0xc20032 00000498 <[^>]*> 4ac20032 c2 0xc20032
0+00049c <[^>]*> 48862032 .word 0x48862032 0000049c <[^>]*> 48862032 .word 0x48862032
0+0004a0 <[^>]*> 4bcf3032 c2 0x1cf3032 000004a0 <[^>]*> 4bcf3032 c2 0x1cf3032
0+0004a4 <[^>]*> 4bdf2032 c2 0x1df2032 000004a4 <[^>]*> 4bdf2032 c2 0x1df2032
0+0004a8 <[^>]*> 4ac20432 c2 0xc20432 000004a8 <[^>]*> 4ac20432 c2 0xc20432
0+0004ac <[^>]*> 48862432 .word 0x48862432 000004ac <[^>]*> 48862432 .word 0x48862432
0+0004b0 <[^>]*> 4bcf3432 c2 0x1cf3432 000004b0 <[^>]*> 4bcf3432 c2 0x1cf3432
0+0004b4 <[^>]*> 4bdf2432 c2 0x1df2432 000004b4 <[^>]*> 4bdf2432 c2 0x1df2432
0+0004b8 <[^>]*> 4ac4100f c2 0xc4100f 000004b8 <[^>]*> 4ac4100f c2 0xc4100f
0+0004bc <[^>]*> 4886208f .word 0x4886208f 000004bc <[^>]*> 4886208f .word 0x4886208f
0+0004c0 <[^>]*> 4bcf218f c2 0x1cf218f 000004c0 <[^>]*> 4bcf218f c2 0x1cf218f
0+0004c4 <[^>]*> 4bdf310f c2 0x1df310f 000004c4 <[^>]*> 4bdf310f c2 0x1df310f
0+0004c8 <[^>]*> 4ac4100e c2 0xc4100e 000004c8 <[^>]*> 4ac4100e c2 0xc4100e
0+0004cc <[^>]*> 4886208e .word 0x4886208e 000004cc <[^>]*> 4886208e .word 0x4886208e
0+0004d0 <[^>]*> 4bcf218e c2 0x1cf218e 000004d0 <[^>]*> 4bcf218e c2 0x1cf218e
0+0004d4 <[^>]*> 4bdf310e c2 0x1df310e 000004d4 <[^>]*> 4bdf310e c2 0x1df310e
0+0004d8 <[^>]*> 4ac41002 c2 0xc41002 000004d8 <[^>]*> 4ac41002 c2 0xc41002
0+0004dc <[^>]*> 48862082 .word 0x48862082 000004dc <[^>]*> 48862082 .word 0x48862082
0+0004e0 <[^>]*> 4bcf2182 c2 0x1cf2182 000004e0 <[^>]*> 4bcf2182 c2 0x1cf2182
0+0004e4 <[^>]*> 4bdf3102 c2 0x1df3102 000004e4 <[^>]*> 4bdf3102 c2 0x1df3102
0+0004e8 <[^>]*> 4ac41003 c2 0xc41003 000004e8 <[^>]*> 4ac41003 c2 0xc41003
0+0004ec <[^>]*> 48862083 .word 0x48862083 000004ec <[^>]*> 48862083 .word 0x48862083
0+0004f0 <[^>]*> 4bcf2183 c2 0x1cf2183 000004f0 <[^>]*> 4bcf2183 c2 0x1cf2183
0+0004f4 <[^>]*> 4bdf3103 c2 0x1df3103 000004f4 <[^>]*> 4bdf3103 c2 0x1df3103
0+0004f8 <[^>]*> 4ac4100a c2 0xc4100a 000004f8 <[^>]*> 4ac4100a c2 0xc4100a
0+0004fc <[^>]*> 4886208a .word 0x4886208a 000004fc <[^>]*> 4886208a .word 0x4886208a
0+000500 <[^>]*> 4bcf218a c2 0x1cf218a 00000500 <[^>]*> 4bcf218a c2 0x1cf218a
0+000504 <[^>]*> 4bdf310a c2 0x1df310a 00000504 <[^>]*> 4bdf310a c2 0x1df310a
0+000508 <[^>]*> 4ac4100d c2 0xc4100d 00000508 <[^>]*> 4ac4100d c2 0xc4100d
0+00050c <[^>]*> 4886208d .word 0x4886208d 0000050c <[^>]*> 4886208d .word 0x4886208d
0+000510 <[^>]*> 4bcf218d c2 0x1cf218d 00000510 <[^>]*> 4bcf218d c2 0x1cf218d
0+000514 <[^>]*> 4bdf310d c2 0x1df310d 00000514 <[^>]*> 4bdf310d c2 0x1df310d
0+000518 <[^>]*> 48a41018 .word 0x48a41018 00000518 <[^>]*> 48a41018 .word 0x48a41018
0+00051c <[^>]*> 4984101f .word 0x4984101f 0000051c <[^>]*> 4984101f .word 0x4984101f
0+000520 <[^>]*> 49c4101f .word 0x49c4101f 00000520 <[^>]*> 49c4101f .word 0x49c4101f
0+000524 <[^>]*> 4904101f bc2f \$cc1,0+0045a4 <[^>]*> 00000524 <[^>]*> 4904101f bc2f \$cc1,000045a4 <[^>]*>
0+000528 <[^>]*> 4944101f .word 0x4944101f 00000528 <[^>]*> 4944101f .word 0x4944101f
0+00052c <[^>]*> 48c62090 .word 0x48c62090 0000052c <[^>]*> 48c62090 .word 0x48c62090
0+000530 <[^>]*> 4bce3110 c2 0x1ce3110 00000530 <[^>]*> 4bce3110 c2 0x1ce3110
0+000534 <[^>]*> 48c62092 .word 0x48c62092 00000534 <[^>]*> 48c62092 .word 0x48c62092
0+000538 <[^>]*> 4bce3112 c2 0x1ce3112 00000538 <[^>]*> 4bce3112 c2 0x1ce3112
0+00053c <[^>]*> 4bcd00a0 c2 0x1cd00a0 0000053c <[^>]*> 4bcd00a0 c2 0x1cd00a0
0+000540 <[^>]*> 4a0000bf c2 0xbf 00000540 <[^>]*> 4a0000bf c2 0xbf
0+000544 <[^>]*> 480000bf .word 0x480000bf 00000544 <[^>]*> 480000bf .word 0x480000bf
0+000548 <[^>]*> 490000bf bc2f 0+000848 <[^>]*> 00000548 <[^>]*> 490000bf bc2f 00000848 <[^>]*>
0+00054c <[^>]*> 4a00103e c2 0x103e 0000054c <[^>]*> 4a00103e c2 0x103e
0+000550 <[^>]*> 4804103e .word 0x4804103e 00000550 <[^>]*> 4804103e .word 0x4804103e
0+000554 <[^>]*> 00c52046 .word 0xc52046 00000554 <[^>]*> 00c52046 .word 0xc52046
0+000558 <[^>]*> 00252442 .word 0x252442 00000558 <[^>]*> 00252442 .word 0x252442
0+00055c <[^>]*> 00c52056 .word 0xc52056 0000055c <[^>]*> 00c52056 .word 0xc52056
0+000560 <[^>]*> 0025207e .word 0x25207e 00000560 <[^>]*> 0025207e .word 0x25207e
0+000564 <[^>]*> 002520ba .word 0x2520ba 00000564 <[^>]*> 002520ba .word 0x2520ba
0+000568 <[^>]*> 4ca4200f prefx 0x4,a0\(a1\) 00000568 <[^>]*> 4ca4200f prefx 0x4,a0\(a1\)
0+00056c <[^>]*> 42000020 wait 0000056c <[^>]*> 42000020 wait
0+000570 <[^>]*> 42000020 wait 00000570 <[^>]*> 42000020 wait
0+000574 <[^>]*> 4359e260 wait 0x56789 00000574 <[^>]*> 4359e260 wait 0x56789
0+000578 <[^>]*> 00000040 ssnop 00000578 <[^>]*> 00000040 ssnop
0+00057c <[^>]*> 70831821 clo v1,a0 0000057c <[^>]*> 70831821 clo v1,a0
0+000580 <[^>]*> 70831825 dclo v1,a0 00000580 <[^>]*> 70831825 dclo v1,a0
0+000584 <[^>]*> 70831820 clz v1,a0 00000584 <[^>]*> 70831820 clz v1,a0
0+000588 <[^>]*> 70831824 dclz v1,a0 00000588 <[^>]*> 70831824 dclz v1,a0
0+00058c <[^>]*> 4c440005 luxc1 \$f0,a0\(v0\) 0000058c <[^>]*> 4c440005 luxc1 \$f0,a0\(v0\)
0+000590 <[^>]*> 4c44100d suxc1 \$f2,a0\(v0\) 00000590 <[^>]*> 4c44100d suxc1 \$f2,a0\(v0\)
0+000594 <[^>]*> 42000008 tlbp 00000594 <[^>]*> 42000008 tlbp
0+000598 <[^>]*> 42000001 tlbr 00000598 <[^>]*> 42000001 tlbr
\.\.\. \.\.\.

38
ld/testsuite/ld-elf/eh5.d
View file

@ -24,14 +24,14 @@ Contents of the .eh_frame section:
#? DW_CFA_nop #? DW_CFA_nop
#? DW_CFA_nop #? DW_CFA_nop
0+001[48] 0+001[4c] 0+001[8c] FDE cie=0+0000 pc=.* 0+001[48] 0+0014 0+001[8c] FDE cie=0+0000 pc=.*
DW_CFA_advance_loc: 4 to .* DW_CFA_advance_loc: 4 to .*
DW_CFA_def_cfa: r0(.*) ofs 16 DW_CFA_def_cfa: r0(.*) ofs 16
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
0+00(2c|30|38) 0+0014 0+0000 CIE 0+00(2c|30) 0+0014 0+0000 CIE
Version: [13] Version: [13]
Augmentation: "zPR" Augmentation: "zPR"
Code alignment factor: .* Code alignment factor: .*
@ -41,21 +41,21 @@ Contents of the .eh_frame section:
DW_CFA_nop DW_CFA_nop
0+00(44|48|50) 0+001[4c] 0+001c FDE cie=0+00(2c|30|38) pc=.* 0+004[48] 0+0014 0+001c FDE cie=0+00(2c|30) pc=.*
DW_CFA_advance_loc: 4 to .* DW_CFA_advance_loc: 4 to .*
DW_CFA_def_cfa: r0(.*) ofs 16 DW_CFA_def_cfa: r0(.*) ofs 16
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
0+00(5c|60|70) 0+001[4c] 0+00(60|64|74) FDE cie=0+0000 pc=.* 0+00(5c|60) 0+0014 0+006[04] FDE cie=0+0000 pc=.*
DW_CFA_advance_loc: 4 to .* DW_CFA_advance_loc: 4 to .*
DW_CFA_def_cfa: r0(.*) ofs 16 DW_CFA_def_cfa: r0(.*) ofs 16
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
0+00(74|78|90) 0+001[8c] 0+0000 CIE 0+007[48] 0+001[8c] 0+0000 CIE
Version: [13] Version: [13]
Augmentation: "zPLR" Augmentation: "zPLR"
Code alignment factor: .* Code alignment factor: .*
@ -71,7 +71,7 @@ Contents of the .eh_frame section:
#? DW_CFA_nop #? DW_CFA_nop
#? DW_CFA_nop #? DW_CFA_nop
0+00(90|98|b0) 0+00(1c|24) 0+002[04] FDE cie=0+00(74|78|90) pc=.* 0+009[08] 0+001c 0+002[04] FDE cie=0+007[48] pc=.*
Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef) Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef)
DW_CFA_advance_loc: 4 to .* DW_CFA_advance_loc: 4 to .*
@ -80,7 +80,7 @@ Contents of the .eh_frame section:
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
0+00(b0|b8|d8) 0+001[04] 0+0000 CIE 0+00b[08] 0+001[04] 0+0000 CIE
Version: [13] Version: [13]
Augmentation: "zR" Augmentation: "zR"
Code alignment factor: .* Code alignment factor: .*
@ -94,7 +94,7 @@ Contents of the .eh_frame section:
#? DW_CFA_nop #? DW_CFA_nop
#? DW_CFA_nop #? DW_CFA_nop
0+00(c4|d0|f0) 0+001[048] 0+001[8c] FDE cie=0+00(b0|b8|d8) pc=.* 0+00(c4|d0) 0+001[04] 0+001[8c] FDE cie=0+00b[08] pc=.*
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
@ -103,7 +103,7 @@ Contents of the .eh_frame section:
#? DW_CFA_nop #? DW_CFA_nop
#? DW_CFA_nop #? DW_CFA_nop
0+0(0d8|0e8|10c) 0+001[48] 0+0000 CIE 0+00[de]8 0+0014 0+0000 CIE
Version: [13] Version: [13]
Augmentation: "zPR" Augmentation: "zPR"
Code alignment factor: .* Code alignment factor: .*
@ -112,19 +112,15 @@ Contents of the .eh_frame section:
Augmentation data: 03 .. .. .. .. [01][bc] Augmentation data: 03 .. .. .. .. [01][bc]
DW_CFA_nop DW_CFA_nop
#? DW_CFA_nop
#? DW_CFA_nop
#? DW_CFA_nop
#? DW_CFA_nop
0+0(0f0|100|128) 0+001[4c] 0+00(1c|20) FDE cie=0+0(0d8|0e8|10c) pc=.* 0+0(0f|10)0 0+0014 0+001c FDE cie=0+00[de]8 pc=.*
DW_CFA_advance_loc: 4 to .* DW_CFA_advance_loc: 4 to .*
DW_CFA_def_cfa: r0(.*) ofs 16 DW_CFA_def_cfa: r0(.*) ofs 16
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
0+01[014]8 0+001[048] 0+00(5c|64|74) FDE cie=0+00(b0|b8|d8) pc=.* 0+01[01]8 0+001[04] 0+00(5c|64) FDE cie=0+00b[08] pc=.*
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
@ -133,7 +129,7 @@ Contents of the .eh_frame section:
#? DW_CFA_nop #? DW_CFA_nop
#? DW_CFA_nop #? DW_CFA_nop
0+0(11c|130|164) 0+001[8c] 0+0000 CIE 0+01(1c|30) 0+001[8c] 0+0000 CIE
Version: [13] Version: [13]
Augmentation: "zPLR" Augmentation: "zPLR"
Code alignment factor: .* Code alignment factor: .*
@ -149,7 +145,7 @@ Contents of the .eh_frame section:
#? DW_CFA_nop #? DW_CFA_nop
#? DW_CFA_nop #? DW_CFA_nop
0+01(38|50|80) 0+00(1c|24|2c) 0+002[04] FDE cie=0+01(1c|30|64) pc=.* 0+01(38|50) 0+001c 0+002[04] FDE cie=0+01(1c|30) pc=.*
Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef) Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef)
DW_CFA_advance_loc: 4 to .* DW_CFA_advance_loc: 4 to .*
@ -158,7 +154,7 @@ Contents of the .eh_frame section:
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
0+01(58|70|a8) 0+001[4c] 0+01(5c|74|ac) FDE cie=0+0000 pc=.* 0+01(58|70) 0+0014 0+01(5c|74) FDE cie=0+0000 pc=.*
DW_CFA_advance_loc: 4 to .* DW_CFA_advance_loc: 4 to .*
DW_CFA_def_cfa: r0(.*) ofs 16 DW_CFA_def_cfa: r0(.*) ofs 16
DW_CFA_nop DW_CFA_nop
@ -174,14 +170,14 @@ Contents of the .eh_frame section:
#? Augmentation data: 03 .. .. .. .. 1b #? Augmentation data: 03 .. .. .. .. 1b
#? DW_CFA_nop #? DW_CFA_nop
0+01(70|88|c8) 0+001[4c] 0+0(01c|148|15c|194) FDE cie=0+0(02c|030|038|170|188) pc=.* 0+01(70|88) 0+0014 0+0(01c|148|15c) FDE cie=0+0(02c|030|170) pc=.*
DW_CFA_advance_loc: 4 to .* DW_CFA_advance_loc: 4 to .*
DW_CFA_def_cfa: r0(.*) ofs 16 DW_CFA_def_cfa: r0(.*) ofs 16
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
DW_CFA_nop DW_CFA_nop
0+01(88|a0|e8) 0+001[4c] 0+01(8c|a4|ec) FDE cie=0+0000 pc=.* 0+01(88|a0) 0+0014 0+01(8c|a4) FDE cie=0+0000 pc=.*
DW_CFA_advance_loc: 4 to .* DW_CFA_advance_loc: 4 to .*
DW_CFA_def_cfa: r0(.*) ofs 16 DW_CFA_def_cfa: r0(.*) ofs 16
DW_CFA_nop DW_CFA_nop
@ -199,7 +195,7 @@ Contents of the .eh_frame section:
#? DW_CFA_nop #? DW_CFA_nop
#? DW_CFA_nop #? DW_CFA_nop
0+0(1a0|1b8|1d4|208) 0+00(1c|24) 0+0(020|130|144|17c) FDE cie=0+0(074|078|090|1b8) pc=.* 0+01(a0|b8|d4) 0+001c 0+0(020|130|144) FDE cie=0+0(074|078|1b8) pc=.*
Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef) Augmentation data: (ef be ad de 00 00 00 00|00 00 00 00 de ad be ef)
DW_CFA_advance_loc: 4 to .* DW_CFA_advance_loc: 4 to .*

2
ld/testsuite/ld-elf/group.ld
View file

@ -8,5 +8,5 @@ SECTIONS
{ {
. = 0x1000; . = 0x1000;
.text : { *(.text) *(.rodata.brlt) } :image :header .text : { *(.text) *(.rodata.brlt) } :image :header
/DISCARD/ : { *(.dropme) *(.reginfo) *(.MIPS.abiflags) *(.MIPS.options) } /DISCARD/ : { *(.dropme) *(.reginfo) *(.MIPS.abiflags) }
} }

2
ld/testsuite/ld-elf/orphan-region.ld
View file

@ -7,5 +7,5 @@ SECTIONS
{ {
.text : ALIGN (4) { *(.text) } > region .text : ALIGN (4) { *(.text) } > region
.rodata : ALIGN (4) { *(.rodata) } > region .rodata : ALIGN (4) { *(.rodata) } > region
/DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) *(.MIPS.options) *(.trampolines) *(.riscv.attributes) } /DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) *(.trampolines) *(.riscv.attributes) }
} }

2
ld/testsuite/ld-elf/orphan.ld
View file

@ -6,5 +6,5 @@ SECTIONS
.bss : { *(.bss) *(COMMON) } .bss : { *(.bss) *(COMMON) }
.sbss : { *(.sbss) } .sbss : { *(.sbss) }
.note : { *(.note) } .note : { *(.note) }
/DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) *(.MIPS.options) *(.trampolines) } /DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) *(.trampolines) }
} }

6
ld/testsuite/ld-mips-elf/compact-eh6.d
View file

@ -8,6 +8,6 @@
Hex dump of section \'\.eh_frame_hdr\': Hex dump of section \'\.eh_frame_hdr\':
0x[0-9a-f]+ 021b0000 00000005 ffffff[0-9a-f]+ 0000006[08].* 0x[0-9a-f]+ 021b0000 00000005 ffffff[0-9a-f]+ 00000060.*
0x[0-9a-f]+ ffffff[0-9a-f]+ 015d5d01 ffffff[0-9a-f]+ 0000002[9d].* 0x[0-9a-f]+ ffffff[0-9a-f]+ 015d5d01 ffffff[0-9a-f]+ 00000029.*
0x[0-9a-f]+ ffffff[0-9a-f]+ 0000003[59] ffffff[0-9a-f]+ 015d5d01.* 0x[0-9a-f]+ ffffff[0-9a-f]+ 00000035 ffffff[0-9a-f]+ 015d5d01.*

22
ld/testsuite/ld-mips-elf/got-dump-1.d
View file

@ -5,21 +5,21 @@
#readelf: -A #readelf: -A
Primary GOT: Primary GOT:
Canonical gp value: 0+068000 Canonical gp value: 00068000
Reserved entries: Reserved entries:
* Address * Access * Initial Purpose Address Access Initial Purpose
0+060010 -32752\(gp\) 0+000000 Lazy resolver 00060010 -32752\(gp\) 00000000 Lazy resolver
0+06001[48] -3274[48]\(gp\) 8000000+ Module pointer \(GNU extension\) 00060014 -32748\(gp\) 80000000 Module pointer \(GNU extension\)
Local entries: Local entries:
* Address * Access * Initial Address Access Initial
0+0600(18|20) -327(44|36)\(gp\) 0+060000 00060018 -32744\(gp\) 00060000
0+0600(1c|28) -327(40|28)\(gp\) 0+060004 0006001c -32740\(gp\) 00060004
Global entries: Global entries:
* Address * Access * Initial * Sym.Val. Type * Ndx Name Address Access Initial Sym.Val. Type Ndx Name
0+0600(2|3)0 -327(36|20)\(gp\) 0+050020 0+050020 FUNC UND extern 00060020 -32736\(gp\) 00050020 00050020 FUNC UND extern
0+0600(24|38) -327(32|12)\(gp\) 0+050000 0+050000 FUNC 7 glob 00060024 -32732\(gp\) 00050000 00050000 FUNC 7 glob
0+0600(28|40) -327(28|04)\(gp\) 0+000000 0+000000 NOTYPE UND undef 00060028 -32728\(gp\) 00000000 00000000 NOTYPE UND undef

2
ld/testsuite/ld-mips-elf/got-page-1.ld
View file

@ -22,7 +22,7 @@ SECTIONS
. = ALIGN (0x400); . = ALIGN (0x400);
.bss : { *(.bss .bss.*) } .bss : { *(.bss .bss.*) }
/DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) *(.MIPS.options) } /DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) }
} }
VERSION VERSION

11
ld/testsuite/ld-mips-elf/got-page-3.d
View file

@ -5,7 +5,6 @@
#as: -mips3 #as: -mips3
#ld: -T got-page-1.ld -shared #ld: -T got-page-1.ld -shared
#objdump: -dr #objdump: -dr
#xfail: mips*64*-linux-gnuabi64
# #
# got-page-3a.s and got-page-3b.s should get assigned the same GOT, # got-page-3a.s and got-page-3b.s should get assigned the same GOT,
# with a page estimate of 10. Thus the first page entry has offset # with a page estimate of 10. Thus the first page entry has offset
@ -16,12 +15,12 @@
# The first global symbol should therefore be at offset -32744. # The first global symbol should therefore be at offset -32744.
# #
#... #...
*.* lw a0,-32744\(gp\) .* lw a0,-32744\(gp\)
*.* addiu a0,a0,.* .* addiu a0,a0,.*
#... #...
*.* lw a1,-32704\(gp\) .* lw a1,-32704\(gp\)
#... #...
*.* <f3>: .* <f3>:
#... #...
*.* lw a1,-32744\(gp\) .* lw a1,-32744\(gp\)
#pass #pass

2
ld/testsuite/ld-mips-elf/jaloverflow-2.d
View file

@ -4,5 +4,5 @@
#ld: -Ttext=0x20000000 -e start #ld: -Ttext=0x20000000 -e start
#objdump: -dr #objdump: -dr
#... #...
*0*20000000: 0c000000.* 0*20000000: 0c000000.*
#pass #pass

10
ld/testsuite/ld-mips-elf/jalx-1.d
View file

@ -7,10 +7,10 @@
Disassembly of section \.text: Disassembly of section \.text:
0*88000000 <test>: 88000000 <test>:
*88000000: f200 0002 jalx 88000008 <test1> 88000000: f200 0002 jalx 88000008 <test1>
*88000004: 0000 0000 nop 88000004: 0000 0000 nop
0*88000008 <test1>: 88000008 <test1>:
*88000008: 00851821 addu v1,a0,a1 88000008: 00851821 addu v1,a0,a1
\.\.\. \.\.\.

28
ld/testsuite/ld-mips-elf/mips-elf.exp
View file

@ -182,25 +182,6 @@ set abi_ldflags(eabi) ""
# Override as needed. # Override as needed.
if {[istarget *-*-openbsd*] } { if {[istarget *-*-openbsd*] } {
set irixemul 0 set irixemul 0
} elseif { [istarget mips*64*-*-linux*-gnuabi64] } {
set abi_asflags(o32) -32
set abi_asflags(o32l) "-32 -march=from-abi"
set abi_asflags(n32) "-n32"
set abi_asflags(n32l) "-n32 -march=from-abi"
set abi_asflags(n64) ""
set abi_asflags(n64l) "-64 -march=from-abi"
if [istarget *el-*-*] {
set abi_ldflags(o32) -melf32ltsmip
set abi_ldflags(o32l) -melf32ltsmip
set abi_ldflags(n32) -melf32ltsmipn32
set abi_ldflags(n32l) -melf32ltsmipn32
} else {
set abi_ldflags(o32) -melf32btsmip
set abi_ldflags(o32l) -melf32btsmip
set abi_ldflags(n32) -melf32btsmipn32
set abi_ldflags(n32l) -melf32btsmipn32
}
set irixemul 0
} elseif { [istarget mips*64*-*-linux*] } { } elseif { [istarget mips*64*-*-linux*] } {
set abi_asflags(o32) -32 set abi_asflags(o32) -32
set abi_asflags(o32l) "-32 -march=from-abi" set abi_asflags(o32l) "-32 -march=from-abi"
@ -911,8 +892,7 @@ if { $linux_gnu } {
} }
run_dump_test "got-dump-1" run_dump_test "got-dump-1"
run_dump_test_n64 "got-dump-2" noarch run_dump_test_n64 "got-dump-2" noarch
run_dump_test_n32 "reloc-estimate-1" run_dump_test "reloc-estimate-1"
run_dump_test_o32 "reloc-estimate-1"
} }
run_dump_test_n32 "emit-relocs-1" {{as -EB} {ld -EB}} run_dump_test_n32 "emit-relocs-1" {{as -EB} {ld -EB}}
@ -1100,8 +1080,7 @@ if { $has_abi(o32) } {
run_ld_link_tests $mips16_intermix_test run_ld_link_tests $mips16_intermix_test
} }
run_dump_test_o32 "mips16-local-stubs-1" run_dump_test "mips16-local-stubs-1"
run_dump_test_n32 "mips16-local-stubs-1"
set mips16_fp_stub_test [list \ set mips16_fp_stub_test [list \
[list "Floating-point stub for mips16 functions" \ [list "Floating-point stub for mips16 functions" \
@ -1127,8 +1106,7 @@ foreach firstfpabi [list 4 5 6 7 ] {
} }
foreach firstfpabi [list 0 1 2 3 ] { foreach firstfpabi [list 0 1 2 3 ] {
foreach secondfpabi [list 0 1 2 3 8 9] { foreach secondfpabi [list 0 1 2 3 8 9] {
run_dump_test_o32 "attr-gnu-4-${firstfpabi}${secondfpabi}" run_dump_test "attr-gnu-4-${firstfpabi}${secondfpabi}"
run_dump_test_n32 "attr-gnu-4-${firstfpabi}${secondfpabi}"
} }
} }

4
ld/testsuite/ld-mips-elf/reloc-estimate-1.d
View file

@ -8,8 +8,8 @@
DYNAMIC RELOCATION RECORDS DYNAMIC RELOCATION RECORDS
OFFSET +TYPE +VALUE OFFSET +TYPE +VALUE
0+000000 R_MIPS_NONE \*ABS\* 00000000 R_MIPS_NONE \*ABS\*
0+010000 R_MIPS_REL32 foo@@V2 00010000 R_MIPS_REL32 foo@@V2
# The address must be 0x810. We should only ever allocate one dynamic # The address must be 0x810. We should only ever allocate one dynamic

2
ld/testsuite/ld-scripts/overlay-size.t
View file

@ -60,5 +60,5 @@ SECTIONS
end_of_data_overlays = . ; end_of_data_overlays = . ;
. = 0x8000; . = 0x8000;
/DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) *(.MIPS.options) } /DISCARD/ : { *(.reginfo) *(.MIPS.abiflags) }
} }

4
ld/testsuite/ld-undefined/undefined.exp
View file

@ -210,10 +210,6 @@ if { ![is_elf_format] || ![check_shared_lib_support]} then {
set none_count 6 set none_count 6
set reloc_count 4 set reloc_count 4
} }
"mips*64*-linux-gnuabi64" {
set none_count 6
set reloc_count 4
}
"mips*" - "mips*" -
"score*" { "score*" {
set none_count 1 set none_count 1