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* aoutx.h (NAME): Add case statements for bfd_mach_mips14000,

Browse source 
bfd_mach_mips16000.
	* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
	bfd_mach_mips16000.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c: Add enums I_mips14000, I_mips16000.
	(arch_info_struct): Add refs to R14000, R16000.
	* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
	bfd_mach_mips16000.
	(mips_mach_extensions): Map R14000, R16000 to R10000.

	* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
	(mips_cpu_info_table): Add r14000, r16000.
	* doc/c-mips.texi: Add entries for 14000, 16000.

	* mips-dis.c (mips_arch_choices): Add r14000, r16000.

	* mips.h: Define CPU_R14000, CPU_R16000.
        (OPCODE_IS_MEMBER): Include R14000, R16000 in test.
This commit is contained in:
Thiemo Seufer 2008-11-28 18:02:17 +00:00
parent 6fce36a432
commit 3aa3176b2d
13 changed files with 56 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

13
bfd/ChangeLog
View file

@ -1,3 +1,16 @@
2008-11-28 Joshua Kinard <kumba@gentoo.org>
* aoutx.h (NAME): Add case statements for bfd_mach_mips14000,
bfd_mach_mips16000.
* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
bfd_mach_mips16000.
* bfd-in2.h: Regenerate.
* cpu-mips.c: Add enums I_mips14000, I_mips16000.
(arch_info_struct): Add refs to R14000, R16000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
bfd_mach_mips16000.
(mips_mach_extensions): Map R14000, R16000 to R10000.
2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com> 2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
* Add PIC support for CR16 target. * Add PIC support for CR16 target.

2
bfd/aoutx.h
View file

@ -786,6 +786,8 @@ NAME (aout, machine_type) (enum bfd_architecture arch,
case bfd_mach_mips9000: case bfd_mach_mips9000:
case bfd_mach_mips10000: case bfd_mach_mips10000:
case bfd_mach_mips12000: case bfd_mach_mips12000:
case bfd_mach_mips14000:
case bfd_mach_mips16000:
case bfd_mach_mips16: case bfd_mach_mips16:
case bfd_mach_mipsisa32: case bfd_mach_mipsisa32:
case bfd_mach_mipsisa32r2: case bfd_mach_mipsisa32r2:

2
bfd/archures.c
View file

@ -167,6 +167,8 @@ DESCRIPTION
.#define bfd_mach_mips9000 9000 .#define bfd_mach_mips9000 9000
.#define bfd_mach_mips10000 10000 .#define bfd_mach_mips10000 10000
.#define bfd_mach_mips12000 12000 .#define bfd_mach_mips12000 12000
.#define bfd_mach_mips14000 14000
.#define bfd_mach_mips16000 16000
.#define bfd_mach_mips16 16 .#define bfd_mach_mips16 16
.#define bfd_mach_mips5 5 .#define bfd_mach_mips5 5
.#define bfd_mach_mips_loongson_2e 3001 .#define bfd_mach_mips_loongson_2e 3001

2
bfd/bfd-in2.h
View file

@ -1793,6 +1793,8 @@ enum bfd_architecture
#define bfd_mach_mips9000 9000 #define bfd_mach_mips9000 9000
#define bfd_mach_mips10000 10000 #define bfd_mach_mips10000 10000
#define bfd_mach_mips12000 12000 #define bfd_mach_mips12000 12000
#define bfd_mach_mips14000 14000
#define bfd_mach_mips16000 16000
#define bfd_mach_mips16 16 #define bfd_mach_mips16 16
#define bfd_mach_mips5 5 #define bfd_mach_mips5 5
#define bfd_mach_mips_loongson_2e 3001 #define bfd_mach_mips_loongson_2e 3001

4
bfd/cpu-mips.c
View file

@ -80,6 +80,8 @@ enum
I_mips9000, I_mips9000,
I_mips10000, I_mips10000,
I_mips12000, I_mips12000,
I_mips14000,
I_mips16000,
I_mips16, I_mips16,
I_mips5, I_mips5,
I_mipsisa32, I_mipsisa32,
@ -116,6 +118,8 @@ static const bfd_arch_info_type arch_info_struct[] =
N (64, 64, bfd_mach_mips9000, "mips:9000", FALSE, NN(I_mips9000)), N (64, 64, bfd_mach_mips9000, "mips:9000", FALSE, NN(I_mips9000)),
N (64, 64, bfd_mach_mips10000,"mips:10000", FALSE, NN(I_mips10000)), N (64, 64, bfd_mach_mips10000,"mips:10000", FALSE, NN(I_mips10000)),
N (64, 64, bfd_mach_mips12000,"mips:12000", FALSE, NN(I_mips12000)), N (64, 64, bfd_mach_mips12000,"mips:12000", FALSE, NN(I_mips12000)),
N (64, 64, bfd_mach_mips14000,"mips:14000", FALSE, NN(I_mips14000)),
N (64, 64, bfd_mach_mips16000,"mips:16000", FALSE, NN(I_mips16000)),
N (64, 64, bfd_mach_mips16, "mips:16", FALSE, NN(I_mips16)), N (64, 64, bfd_mach_mips16, "mips:16", FALSE, NN(I_mips16)),
N (64, 64, bfd_mach_mips5, "mips:mips5", FALSE, NN(I_mips5)), N (64, 64, bfd_mach_mips5, "mips:mips5", FALSE, NN(I_mips5)),
N (32, 32, bfd_mach_mipsisa32, "mips:isa32", FALSE, NN(I_mipsisa32)), N (32, 32, bfd_mach_mipsisa32, "mips:isa32", FALSE, NN(I_mipsisa32)),

4
bfd/elfxx-mips.c
View file

@ -10400,6 +10400,8 @@ mips_set_isa_flags (bfd *abfd)
case bfd_mach_mips8000: case bfd_mach_mips8000:
case bfd_mach_mips10000: case bfd_mach_mips10000:
case bfd_mach_mips12000: case bfd_mach_mips12000:
case bfd_mach_mips14000:
case bfd_mach_mips16000:
val = E_MIPS_ARCH_4; val = E_MIPS_ARCH_4;
break; break;
@ -12124,6 +12126,8 @@ static const struct mips_mach_extension mips_mach_extensions[] = {
/* R10000 extensions. */ /* R10000 extensions. */
{ bfd_mach_mips12000, bfd_mach_mips10000 }, { bfd_mach_mips12000, bfd_mach_mips10000 },
{ bfd_mach_mips14000, bfd_mach_mips10000 },
{ bfd_mach_mips16000, bfd_mach_mips10000 },
/* R5000 extensions. Note: the vr5500 ISA is an extension of the core /* R5000 extensions. Note: the vr5500 ISA is an extension of the core
vr5400 ISA, but doesn't include the multimedia stuff. It seems vr5400 ISA, but doesn't include the multimedia stuff. It seems

6
gas/ChangeLog
View file

@ -1,3 +1,9 @@
2008-11-28 Joshua Kinard <kumba@gentoo.org>
* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
(mips_cpu_info_table): Add r14000, r16000.
* doc/c-mips.texi: Add entries for 14000, 16000.
2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com> 2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
* config/tc-cr16.h (GLOBAL_OFFSET_TABLE_NAME): Defined * config/tc-cr16.h (GLOBAL_OFFSET_TABLE_NAME): Defined

4
gas/config/tc-mips.c
View file

@ -472,6 +472,8 @@ static int mips_32bitmode = 0;
|| mips_opts.arch == CPU_R4010 \ || mips_opts.arch == CPU_R4010 \
|| mips_opts.arch == CPU_R10000 \ || mips_opts.arch == CPU_R10000 \
|| mips_opts.arch == CPU_R12000 \ || mips_opts.arch == CPU_R12000 \
|| mips_opts.arch == CPU_R14000 \
|| mips_opts.arch == CPU_R16000 \
|| mips_opts.arch == CPU_RM7000 \ || mips_opts.arch == CPU_RM7000 \
|| mips_opts.arch == CPU_VR5500 \ || mips_opts.arch == CPU_VR5500 \
) )
@ -15090,6 +15092,8 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
{ "r8000", 0, ISA_MIPS4, CPU_R8000 }, { "r8000", 0, ISA_MIPS4, CPU_R8000 },
{ "r10000", 0, ISA_MIPS4, CPU_R10000 }, { "r10000", 0, ISA_MIPS4, CPU_R10000 },
{ "r12000", 0, ISA_MIPS4, CPU_R12000 }, { "r12000", 0, ISA_MIPS4, CPU_R12000 },
{ "r14000", 0, ISA_MIPS4, CPU_R14000 },
{ "r16000", 0, ISA_MIPS4, CPU_R16000 },
{ "vr5000", 0, ISA_MIPS4, CPU_R5000 }, { "vr5000", 0, ISA_MIPS4, CPU_R5000 },
{ "vr5400", 0, ISA_MIPS4, CPU_VR5400 }, { "vr5400", 0, ISA_MIPS4, CPU_VR5400 },
{ "vr5500", 0, ISA_MIPS4, CPU_VR5500 }, { "vr5500", 0, ISA_MIPS4, CPU_VR5500 },

2
gas/doc/c-mips.texi
View file

@ -239,6 +239,8 @@ rm7000,
rm9000, rm9000,
10000, 10000,
12000, 12000,
14000,
16000,
4kc, 4kc,
4km, 4km,
4kp, 4kp,

5
include/opcode/ChangeLog
View file

@ -1,3 +1,8 @@
2008-11-28 Joshua Kinard <kumba@gentoo.org>
* mips.h: Define CPU_R14000, CPU_R16000.
(OPCODE_IS_MEMBER): Include R14000, R16000 in test.
2008-11-18 Catherine Moore <clm@codesourcery.com> 2008-11-18 Catherine Moore <clm@codesourcery.com>
* arm.h (FPU_NEON_FP16): New. * arm.h (FPU_NEON_FP16): New.

5
include/opcode/mips.h
View file

@ -632,6 +632,8 @@ static const unsigned int mips_isa_table[] =
#define CPU_RM9000 9000 #define CPU_RM9000 9000
#define CPU_R10000 10000 #define CPU_R10000 10000
#define CPU_R12000 12000 #define CPU_R12000 12000
#define CPU_R14000 14000
#define CPU_R16000 16000
#define CPU_MIPS16 16 #define CPU_MIPS16 16
#define CPU_MIPS32 32 #define CPU_MIPS32 32
#define CPU_MIPS32R2 33 #define CPU_MIPS32R2 33
@ -661,7 +663,8 @@ static const unsigned int mips_isa_table[] =
|| (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \ || (cpu == CPU_R4010 && ((insn)->membership & INSN_4010) != 0) \
|| (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \ || (cpu == CPU_VR4100 && ((insn)->membership & INSN_4100) != 0) \
|| (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \ || (cpu == CPU_R3900 && ((insn)->membership & INSN_3900) != 0) \
|| ((cpu == CPU_R10000 || cpu == CPU_R12000) \ || ((cpu == CPU_R10000 || cpu == CPU_R12000 || cpu == CPU_R14000 \
|| cpu == CPU_R16000) \
&& ((insn)->membership & INSN_10000) != 0) \ && ((insn)->membership & INSN_10000) != 0) \
|| (cpu == CPU_SB1 && ((insn)->membership & INSN_SB1) != 0) \ || (cpu == CPU_SB1 && ((insn)->membership & INSN_SB1) != 0) \
|| (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \ || (cpu == CPU_R4111 && ((insn)->membership & INSN_4111) != 0) \

4
opcodes/ChangeLog
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@ -1,3 +1,7 @@
2008-11-28 Joshua Kinard <kumba@gentoo.org>
* mips-dis.c (mips_arch_choices): Add r14000, r16000.
2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com> 2008-11-27 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
* cr16-dis.c (match_opcode): Truncate mcode to 32 bit and * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and

4
opcodes/mips-dis.c
View file

@ -409,6 +409,10 @@ const struct mips_arch_choice mips_arch_choices[] =
mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
{ "r12000", 1, bfd_mach_mips12000, CPU_R12000, ISA_MIPS4, { "r12000", 1, bfd_mach_mips12000, CPU_R12000, ISA_MIPS4,
mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
{ "r14000", 1, bfd_mach_mips14000, CPU_R14000, ISA_MIPS4,
mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
{ "r16000", 1, bfd_mach_mips16000, CPU_R16000, ISA_MIPS4,
mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },
{ "mips5", 1, bfd_mach_mips5, CPU_MIPS5, ISA_MIPS5, { "mips5", 1, bfd_mach_mips5, CPU_MIPS5, ISA_MIPS5,
mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric },