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Add ms2 support.

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* ms1-tdep.c (ms1_register_type): Check for ms2.
	(ms1_breakpoint_from_pc): ms2 has a different break instruction.
	(ms1_pseudo_register_read, ms1_pseudo_register_write,
	ms1_registers_info): Add ms2.
 	* NEWS (Changes since GDB 6.4): Add ms2
This commit is contained in:
Nathan Sidwell 2005-12-08 10:35:18 +00:00
parent 6e50d963b0
commit 3950dc3f51
3 changed files with 32 additions and 13 deletions
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11
gdb/ChangeLog
View file

@ -1,3 +1,12 @@
2005-12-08 Nathan Sidwell <nathan@codesourcery.com>
Add ms2 support.
* ms1-tdep.c (ms1_register_type): Check for ms2.
(ms1_breakpoint_from_pc): ms2 has a different break instruction.
(ms1_pseudo_register_read, ms1_pseudo_register_write,
ms1_registers_info): Add ms2.
* NEWS (Changes since GDB 6.4): Add ms2
2005-12-08 Randolph Chung <tausq@debian.org>
* somread.c (som_symfile_offsets): Iterate through number of sections
@ -47,7 +56,7 @@
* value.c (init_if_undefined_command): New function.
(_initialize_values): Add command init-if-undefined.
* NEWS (Changes since GDB 6.3): Rename to 'Changes in GDB 6.4'.
* NEWS (Changes since GDB 6.3): Rename to 'Changes in GDB 6.4'.
(Changes since GDB 6.4): New section.
Mention new command init-if-undefined.

4
gdb/NEWS
View file

@ -8,6 +8,10 @@
init-if-undefined Initialize a convenience variable, but
only if it doesn't already have a value.
* New architecture
Morpho Technologies ms2 ms1-elf
*** Changes in GDB 6.4
* New native configurations

30
gdb/ms1-tdep.c
View file

@ -198,7 +198,8 @@ ms1_register_type (struct gdbarch *arch, int regnum)
case MS1_COPRO_PSEUDOREG_REGNUM:
return copro_type;
case MS1_MAC_PSEUDOREG_REGNUM:
if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2)
if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2
|| gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2)
return builtin_type_uint64;
else
return builtin_type_uint32;
@ -362,15 +363,20 @@ ms1_skip_prologue (CORE_ADDR pc)
/* The breakpoint instruction must be the same size as the smallest
instruction in the instruction set.
The BP for ms1 is defined as 0x68000000. */
The BP for ms1 is defined as 0x68000000 (BREAK).
The BP for ms2 is defined as 0x69000000 (illegal) */
static const gdb_byte *
ms1_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
{
static gdb_byte breakpoint[] = { 0x68, 0, 0, 0 };
static gdb_byte ms1_breakpoint[] = { 0x68, 0, 0, 0 };
static gdb_byte ms2_breakpoint[] = { 0x69, 0, 0, 0 };
*bp_size = 4;
return breakpoint;
if (gdbarch_bfd_arch_info (current_gdbarch)->mach == bfd_mach_ms2)
return ms2_breakpoint;
return ms1_breakpoint;
}
/* Fetch the pseudo registers:
@ -394,7 +400,8 @@ ms1_pseudo_register_read (struct gdbarch *gdbarch,
break;
case MS1_MAC_REGNUM:
case MS1_MAC_PSEUDOREG_REGNUM:
if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2)
if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
|| gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
{
ULONGEST oldmac = 0, ext_mac = 0;
ULONGEST newmac;
@ -438,7 +445,8 @@ ms1_pseudo_register_write (struct gdbarch *gdbarch,
break;
case MS1_MAC_REGNUM:
case MS1_MAC_PSEUDOREG_REGNUM:
if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2)
if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
|| gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
{
/* The 8-byte MAC pseudo-register must be broken down into two
32-byte registers. */
@ -549,16 +557,14 @@ ms1_registers_info (struct gdbarch *gdbarch,
/* Get the two "real" mac registers. */
frame_register_read (frame, MS1_MAC_REGNUM, buf);
oldmac = extract_unsigned_integer (buf,
register_size (gdbarch,
MS1_MAC_REGNUM));
oldmac = extract_unsigned_integer
(buf, register_size (gdbarch, MS1_MAC_REGNUM));
if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2
|| gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2)
{
frame_register_read (frame, MS1_EXMAC_REGNUM, buf);
ext_mac = extract_unsigned_integer (buf,
register_size (gdbarch,
MS1_EXMAC_REGNUM));
ext_mac = extract_unsigned_integer
(buf, register_size (gdbarch, MS1_EXMAC_REGNUM));
}
else
ext_mac = 0;