x86: CVTPI2PD has special behavior

CVTPI2PD with a memory operand, unlike CVTPI2PS, doesn't engage MMX
logic. Therefore it
- has a proper AVX equivalent (CVTDQ2PD) and hence can be subject to
  SSE2AVX translation and SSE checking,
- should not record MMX use in the respective ELF note.
This commit is contained in:
Jan Beulich 2021-02-16 11:34:25 +01:00
parent 3d70986f21
commit 394ae71f02
18 changed files with 203 additions and 95 deletions

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@ -1,3 +1,20 @@
2021-02-16 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/sse-check.s,
testsuite/gas/i386/sse2avx.s,
testsuite/gas/i386/x86-64-sse2avx.s: Add CVTPI2PD cases.
* testsuite/gas/i386/sse-check-error.l,
testsuite/gas/i386/sse-check-warn.e,
testsuite/gas/i386/sse-check.d,
testsuite/gas/i386/sse2avx.d,
testsuite/gas/i386/x86-64-sse-check-error.l,
testsuite/gas/i386/x86-64-sse2avx.d: Adjust expecations.
* testsuite/gas/i386/property-cvtpi2pd.s,
testsuite/gas/i386/property-cvtpi2pd.d,
testsuite/gas/i386/property-cvtpi2ps.s,
testsuite/gas/i386/property-cvtpi2ps.d: New.
* testsuite/gas/i386/i386.exp: Run new tests.
2021-02-16 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (md_assemble): Use template rather than

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@ -725,6 +725,8 @@ if {[is_elf_format] || [istarget "*-*-vxworks*"]} then {
run_dump_test "property-11"
run_dump_test "property-12"
run_dump_test "property-13"
run_dump_test "property-cvtpi2pd"
run_dump_test "property-cvtpi2ps"
run_dump_test "property-ldmxcsr"
run_dump_test "property-vldmxcsr"
run_dump_test "property-vzeroall"

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@ -0,0 +1,9 @@
#name: i386 property cvtpi2pd
#as: -mx86-used-note=yes --generate-missing-build-notes=no
#readelf: -n
Displaying notes found in: .note.gnu.property
[ ]+Owner[ ]+Data size[ ]+Description
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: x86 ISA used: x86-64-baseline
x86 feature used: x86, XMM

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@ -0,0 +1,2 @@
.text
cvtpi2pd (%eax), %xmm0

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@ -0,0 +1,9 @@
#name: i386 property cvtpi2ps
#as: -mx86-used-note=yes --generate-missing-build-notes=no
#readelf: -n
Displaying notes found in: .note.gnu.property
[ ]+Owner[ ]+Data size[ ]+Description
GNU 0x[0-9a-f]+ NT_GNU_PROPERTY_TYPE_0
Properties: x86 ISA used: x86-64-baseline
x86 feature used: x86, MMX, XMM

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@ -0,0 +1,2 @@
.text
cvtpi2ps (%eax), %xmm0

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@ -1,14 +1,15 @@
.*: Assembler messages:
.*:7: Error: .*
.*:10: Error: .*
.*:13: Error: .*
.*:16: Error: .*
.*:19: Error: .*
.*:14: Error: .*
.*:17: Error: .*
.*:20: Error: .*
.*:26: Error: .*
.*:29: Error: .*
.*:32: Error: .*
.*:35: Error: .*
.*:23: Error: .*
.*:24: Error: .*
.*:30: Error: .*
.*:33: Error: .*
.*:36: Error: .*
.*:39: Error: .*
GAS LISTING .*
@ -26,49 +27,55 @@ GAS LISTING .*
[ ]*10[ ]+\?\?\?\? 660F58CA addpd %xmm2,%xmm1
.* Error: SSE instruction `addpd' is used
[ ]*11[ ]+
[ ]*12[ ]+\# SSE3 instruction
[ ]*13[ ]+\?\?\?\? 660FD0CA addsubpd %xmm2,%xmm1
[ ]*[0-9]+[ ]+# special case SSE2 instruction
[ ]*[0-9]+[ ]+\?\?\?\? 660F2ACA cvtpi2pd %mm2,%xmm1
[ ]*[0-9]+[ ]+\?\?\?\? 660F2A0A cvtpi2pd \(%edx\),%xmm1
.* Error: SSE instruction `cvtpi2pd' is used
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# SSE3 instruction
[ ]*[0-9]+[ ]+\?\?\?\? 660FD0CA addsubpd %xmm2,%xmm1
.* Error: SSE instruction `addsubpd' is used
[ ]*14[ ]+
[ ]*15[ ]+\# SSSE3 instruction
[ ]*16[ ]+\?\?\?\? 660F3801 phaddw %xmm2,%xmm1
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# SSSE3 instruction
[ ]*[0-9]+[ ]+\?\?\?\? 660F3801 phaddw %xmm2,%xmm1
.* Error: SSE instruction `phaddw' is used
[ ]*16[ ]+CA
[ ]*17[ ]+
[ ]*18[ ]+\# SSE4 instructions
[ ]*19[ ]+\?\?\?\? 660F3815 blendvpd %xmm0,%xmm1,%xmm0
[ ]*[0-9]+[ ]+CA
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# SSE4 instructions
[ ]*[0-9]+[ ]+\?\?\?\? 660F3815 blendvpd %xmm0,%xmm1,%xmm0
.* Error: SSE instruction `blendvpd' is used
[ ]*19[ ]+C1
[ ]*20[ ]+\?\?\?\? 660F3837 pcmpgtq %xmm1,%xmm0
[ ]*[0-9]+[ ]+C1
[ ]*[0-9]+[ ]+\?\?\?\? 660F3837 pcmpgtq %xmm1,%xmm0
.* Error: SSE instruction `pcmpgtq' is used
[ ]*20[ ]+C1
[ ]*21[ ]+
[ ]*22[ ]+\# SSE4a instruction.*
[ ]*23[ ]+\?\?\?\? 660F78C0 extrq \$0, \$0, %xmm0
[ ]*23[ ]+0000
[ ]*24[ ]+
[ ]*25[ ]+\# PCMUL instruction
[ ]*26[ ]+\?\?\?\? 660F3A44 pclmulqdq \$-1,%xmm1,%xmm2
[ ]*[0-9]+[ ]+C1
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# SSE4a instruction.*
[ ]*[0-9]+[ ]+\?\?\?\? 660F78C0 extrq \$0, \$0, %xmm0
[ ]*[0-9]+[ ]+0000
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# PCMUL instruction
[ ]*[0-9]+[ ]+\?\?\?\? 660F3A44 pclmulqdq \$-1,%xmm1,%xmm2
.* Error: SSE instruction `pclmulqdq' is used
[ ]*26[ ]+D1FF
[ ]*27[ ]+
[ ]*28[ ]+\# AES instructions
[ ]*29[ ]+\?\?\?\? 660F38DE aesdec %xmm1,%xmm2
[ ]*[0-9]+[ ]+D1FF
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# AES instructions
[ ]*[0-9]+[ ]+\?\?\?\? 660F38DE aesdec %xmm1,%xmm2
.* Error: SSE instruction `aesdec' is used
[ ]*29[ ]+D1
[ ]*30[ ]+
[ ]*31[ ]+\# SHA instruction
[ ]*32[ ]+\?\?\?\? 0F38C8C0 sha1nexte %xmm0, %xmm0
[ ]*[0-9]+[ ]+D1
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# SHA instruction
[ ]*[0-9]+[ ]+\?\?\?\? 0F38C8C0 sha1nexte %xmm0, %xmm0
.* Error: SSE instruction `sha1nexte' is used
[ ]*33[ ]+
[ ]*34[ ]+\# GFNI instructions
[ ]*35[ ]+\?\?\?\? 660F38CF gf2p8mulb %xmm1,%xmm2
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# GFNI instructions
[ ]*[0-9]+[ ]+\?\?\?\? 660F38CF gf2p8mulb %xmm1,%xmm2
.* Error: SSE instruction `gf2p8mulb' is used
[ ]*35[ ]+D1
[ ]*36[ ]+\?\?\?\? 62F27D09 vgf2p8mulb %xmm0, %xmm0, %xmm0\{%k1\}
[ ]*36[ ]+CFC0
[ ]*37[ ]+\?\?\?\? 62F27D48 vgf2p8mulb %zmm0, %zmm0, %zmm0
[ ]*37[ ]+CFC0
GAS LISTING .*
[ ]*[0-9]+[ ]+D1
[ ]*[0-9]+[ ]+\?\?\?\? 62F27D09 vgf2p8mulb %xmm0, %xmm0, %xmm0\{%k1\}
[ ]*[0-9]+[ ]+CFC0
[ ]*[0-9]+[ ]+\?\?\?\? 62F27D48 vgf2p8mulb %zmm0, %zmm0, %zmm0
[ ]*[0-9]+[ ]+CFC0

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@ -1,11 +1,12 @@
.*: Assembler messages:
.*:7: Warning: SSE instruction `addps' is used
.*:10: Warning: SSE instruction `addpd' is used
.*:13: Warning: SSE instruction `addsubpd' is used
.*:16: Warning: SSE instruction `phaddw' is used
.*:19: Warning: SSE instruction `blendvpd' is used
.*:20: Warning: SSE instruction `pcmpgtq' is used
.*:26: Warning: SSE instruction `pclmulqdq' is used
.*:29: Warning: SSE instruction `aesdec' is used
.*:32: Warning: SSE instruction `sha1nexte' is used
.*:35: Warning: SSE instruction `gf2p8mulb' is used
.*:14: Warning: SSE instruction `cvtpi2pd' is used
.*:17: Warning: SSE instruction `addsubpd' is used
.*:20: Warning: SSE instruction `phaddw' is used
.*:23: Warning: SSE instruction `blendvpd' is used
.*:24: Warning: SSE instruction `pcmpgtq' is used
.*:30: Warning: SSE instruction `pclmulqdq' is used
.*:33: Warning: SSE instruction `aesdec' is used
.*:36: Warning: SSE instruction `sha1nexte' is used
.*:39: Warning: SSE instruction `gf2p8mulb' is used

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@ -9,6 +9,8 @@ Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 0f 58 ca addps %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 2a ca cvtpi2pd %mm2,%xmm1
[ ]*[a-f0-9]+: (67 )?66 0f 2a 0a( )? cvtpi2pd \(%edx\),%xmm1
[ ]*[a-f0-9]+: 66 0f d0 ca addsubpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 38 01 ca phaddw %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0

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@ -9,6 +9,10 @@ _start:
# SSE2 instruction
addpd %xmm2,%xmm1
# special case SSE2 instruction
cvtpi2pd %mm2,%xmm1
cvtpi2pd (%edx),%xmm1
# SSE3 instruction
addsubpd %xmm2,%xmm1

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@ -408,6 +408,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 f9 2f 21 vcomisd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 fa e6 f4 vcvtdq2pd %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 fa e6 21 vcvtdq2pd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 fa e6 21 vcvtdq2pd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 f8 5a f4 vcvtps2pd %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 f8 5a 21 vcvtps2pd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 fb 12 f4 vmovddup %xmm4,%xmm6
@ -986,6 +987,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 f9 2f 21 vcomisd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 fa e6 f4 vcvtdq2pd %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 fa e6 21 vcvtdq2pd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 fa e6 21 vcvtdq2pd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 f8 5a f4 vcvtps2pd %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 f8 5a 21 vcvtps2pd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 fb 12 f4 vmovddup %xmm4,%xmm6

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@ -425,6 +425,7 @@ _start:
comisd (%ecx),%xmm4
cvtdq2pd %xmm4,%xmm6
cvtdq2pd (%ecx),%xmm4
cvtpi2pd (%ecx),%xmm4
cvtps2pd %xmm4,%xmm6
cvtps2pd (%ecx),%xmm4
movddup %xmm4,%xmm6
@ -1086,6 +1087,7 @@ _start:
comisd xmm4,QWORD PTR [ecx]
cvtdq2pd xmm6,xmm4
cvtdq2pd xmm4,QWORD PTR [ecx]
cvtpi2pd xmm4,QWORD PTR [ecx]
cvtps2pd xmm6,xmm4
cvtps2pd xmm4,QWORD PTR [ecx]
movddup xmm6,xmm4

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@ -1,14 +1,15 @@
.*: Assembler messages:
.*:7: Error: .*
.*:10: Error: .*
.*:13: Error: .*
.*:16: Error: .*
.*:19: Error: .*
.*:14: Error: .*
.*:17: Error: .*
.*:20: Error: .*
.*:26: Error: .*
.*:29: Error: .*
.*:32: Error: .*
.*:35: Error: .*
.*:23: Error: .*
.*:24: Error: .*
.*:30: Error: .*
.*:33: Error: .*
.*:36: Error: .*
.*:39: Error: .*
GAS LISTING .*
@ -26,49 +27,56 @@ GAS LISTING .*
[ ]*10[ ]+\?\?\?\? 660F58CA addpd %xmm2,%xmm1
.* Error: SSE instruction `addpd' is used
[ ]*11[ ]+
[ ]*12[ ]+\# SSE3 instruction
[ ]*13[ ]+\?\?\?\? 660FD0CA addsubpd %xmm2,%xmm1
[ ]*[0-9]+[ ]+# special case SSE2 instruction
[ ]*[0-9]+[ ]+\?\?\?\? 660F2ACA cvtpi2pd %mm2,%xmm1
[ ]*[0-9]+[ ]+\?\?\?\? 67660F2A cvtpi2pd \(%edx\),%xmm1
.* Error: SSE instruction `cvtpi2pd' is used
[ ]*[0-9]+[ ]+0A
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# SSE3 instruction
[ ]*[0-9]+[ ]+\?\?\?\? 660FD0CA addsubpd %xmm2,%xmm1
.* Error: SSE instruction `addsubpd' is used
[ ]*14[ ]+
[ ]*15[ ]+\# SSSE3 instruction
[ ]*16[ ]+\?\?\?\? 660F3801 phaddw %xmm2,%xmm1
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# SSSE3 instruction
[ ]*[0-9]+[ ]+\?\?\?\? 660F3801 phaddw %xmm2,%xmm1
.* Error: SSE instruction `phaddw' is used
[ ]*16[ ]+CA
[ ]*17[ ]+
[ ]*18[ ]+\# SSE4 instructions
[ ]*19[ ]+\?\?\?\? 660F3815 blendvpd %xmm0,%xmm1,%xmm0
[ ]*[0-9]+[ ]+CA
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# SSE4 instructions
[ ]*[0-9]+[ ]+\?\?\?\? 660F3815 blendvpd %xmm0,%xmm1,%xmm0
.* Error: SSE instruction `blendvpd' is used
[ ]*19[ ]+C1
[ ]*20[ ]+\?\?\?\? 660F3837 pcmpgtq %xmm1,%xmm0
[ ]*[0-9]+[ ]+C1
[ ]*[0-9]+[ ]+\?\?\?\? 660F3837 pcmpgtq %xmm1,%xmm0
.* Error: SSE instruction `pcmpgtq' is used
[ ]*20[ ]+C1
[ ]*21[ ]+
[ ]*22[ ]+\# SSE4a instruction.*
[ ]*23[ ]+\?\?\?\? 660F78C0 extrq \$0, \$0, %xmm0
[ ]*23[ ]+0000
[ ]*24[ ]+
[ ]*25[ ]+\# PCMUL instruction
[ ]*26[ ]+\?\?\?\? 660F3A44 pclmulqdq \$-1,%xmm1,%xmm2
[ ]*[0-9]+[ ]+C1
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# SSE4a instruction.*
[ ]*[0-9]+[ ]+\?\?\?\? 660F78C0 extrq \$0, \$0, %xmm0
[ ]*[0-9]+[ ]+0000
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# PCMUL instruction
[ ]*[0-9]+[ ]+\?\?\?\? 660F3A44 pclmulqdq \$-1,%xmm1,%xmm2
.* Error: SSE instruction `pclmulqdq' is used
[ ]*26[ ]+D1FF
[ ]*27[ ]+
[ ]*28[ ]+\# AES instructions
[ ]*29[ ]+\?\?\?\? 660F38DE aesdec %xmm1,%xmm2
[ ]*[0-9]+[ ]+D1FF
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# AES instructions
[ ]*[0-9]+[ ]+\?\?\?\? 660F38DE aesdec %xmm1,%xmm2
.* Error: SSE instruction `aesdec' is used
[ ]*29[ ]+D1
[ ]*30[ ]+
[ ]*31[ ]+\# SHA instruction
[ ]*32[ ]+\?\?\?\? 0F38C8C0 sha1nexte %xmm0, %xmm0
[ ]*[0-9]+[ ]+D1
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# SHA instruction
[ ]*[0-9]+[ ]+\?\?\?\? 0F38C8C0 sha1nexte %xmm0, %xmm0
.* Error: SSE instruction `sha1nexte' is used
[ ]*33[ ]+
[ ]*34[ ]+\# GFNI instructions
[ ]*35[ ]+\?\?\?\? 660F38CF gf2p8mulb %xmm1,%xmm2
.* Error: SSE instruction `gf2p8mulb' is used
[ ]*35[ ]+D1
[ ]*36[ ]+\?\?\?\? 62F27D09 vgf2p8mulb %xmm0, %xmm0, %xmm0\{%k1\}
[ ]*36[ ]+CFC0
[ ]*37[ ]+\?\?\?\? 62F27D48 vgf2p8mulb %zmm0, %zmm0, %zmm0
[ ]*37[ ]+CFC0
[ ]*[0-9]+[ ]+
[ ]*[0-9]+[ ]+\# GFNI instructions
[ ]*[0-9]+[ ]+\?\?\?\? 660F38CF gf2p8mulb %xmm1,%xmm2
GAS LISTING .*
.* Error: SSE instruction `gf2p8mulb' is used
[ ]*[0-9]+[ ]+D1
[ ]*[0-9]+[ ]+\?\?\?\? 62F27D09 vgf2p8mulb %xmm0, %xmm0, %xmm0\{%k1\}
[ ]*[0-9]+[ ]+CFC0
[ ]*[0-9]+[ ]+\?\?\?\? 62F27D48 vgf2p8mulb %zmm0, %zmm0, %zmm0
[ ]*[0-9]+[ ]+CFC0

View file

@ -474,6 +474,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 f9 2f 21 vcomisd \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c5 fa e6 f4 vcvtdq2pd %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 fa e6 21 vcvtdq2pd \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c5 fa e6 21 vcvtdq2pd \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c5 f8 5a f4 vcvtps2pd %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 f8 5a 21 vcvtps2pd \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c5 fb 12 f4 vmovddup %xmm4,%xmm6
@ -1137,6 +1138,7 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c5 f9 2f 21 vcomisd \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c5 fa e6 f4 vcvtdq2pd %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 fa e6 21 vcvtdq2pd \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c5 fa e6 21 vcvtdq2pd \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c5 f8 5a f4 vcvtps2pd %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 f8 5a 21 vcvtps2pd \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c5 fb 12 f4 vmovddup %xmm4,%xmm6

View file

@ -489,6 +489,7 @@ _start:
comisd (%rcx),%xmm4
cvtdq2pd %xmm4,%xmm6
cvtdq2pd (%rcx),%xmm4
cvtpi2pd (%rcx),%xmm4
cvtps2pd %xmm4,%xmm6
cvtps2pd (%rcx),%xmm4
movddup %xmm4,%xmm6
@ -1260,6 +1261,7 @@ _start:
comisd xmm4,QWORD PTR [rcx]
cvtdq2pd xmm6,xmm4
cvtdq2pd xmm4,QWORD PTR [rcx]
cvtpi2pd xmm4,QWORD PTR [rcx]
cvtps2pd xmm6,xmm4
cvtps2pd xmm4,QWORD PTR [rcx]
movddup xmm6,xmm4

View file

@ -1,3 +1,8 @@
2021-02-16 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl: Split CVTPI2PD template. Add SSE2AVX variant.
* i386-tbl.h: Re-generate.
2021-02-16 Jan Beulich <jbeulich@suse.com>
* i386-gen.c (set_bitfield): Don't look for CpuFP, Mmword, nor

View file

@ -1315,7 +1315,9 @@ cmpsd, 3, 0xf2c2, None, 1, CpuAVX, Modrm|Vex=3|OpcodePrefix=0|VexVVVV|VexW0|No_b
cmpsd, 3, 0x0fc2, None, 2, CpuSSE2, Prefix_0XF2|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Imm8, Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
comisd, 2, 0x662f, None, 1, CpuAVX, Modrm|Vex=3|OpcodePrefix=0|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
comisd, 2, 0x0f2f, None, 2, CpuSSE2, Prefix_0X66|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
cvtpi2pd, 2, 0x0f2a, None, 2, CpuSSE2, Prefix_0X66|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64|NoAVX, { Qword|Unspecified|BaseIndex|RegMMX, RegXMM }
cvtpi2pd, 2, 0x0f2a, None, 2, CpuSSE2, Prefix_0X66|Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64|NoAVX, { RegMMX, RegXMM }
cvtpi2pd, 2, 0xf3e6, None, 1, CpuAVX, Modrm|Vex|OpcodePrefix=0|VexW0|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Qword|Unspecified|BaseIndex, RegXMM }
cvtpi2pd, 2, 0x0f2a, None, 2, CpuSSE2, Prefix_0X66|Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Qword|Unspecified|BaseIndex, RegXMM }
cvtsi2sd, 2, 0xf22a, None, 1, CpuAVX|CpuNo64, Modrm|Vex=3|OpcodePrefix=0|VexVVVV=1|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Reg32|Dword|Unspecified|BaseIndex, RegXMM }
cvtsi2sd, 2, 0xf22a, None, 1, CpuAVX|Cpu64, Modrm|Vex=3|OpcodePrefix=0|VexVVVV=1|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|SSE2AVX|ATTSyntax, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, RegXMM }
cvtsi2sd, 2, 0xf22a, None, 1, CpuAVX|Cpu64, Modrm|Vex=3|OpcodePrefix=0|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|SSE2AVX|IntelSyntax, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex, RegXMM }

View file

@ -15792,7 +15792,37 @@ const insn_template i386_optab[] =
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0,
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { { 6, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1,
{ { { 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 0, 0 } } } },
{ "cvtpi2pd", 0xf3e6, None, 1, 2,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0,
0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1,
0, 0, 0, 0, 0, 1, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 0, 0 } } } },
{ "cvtpi2pd", 0x0f2a, None, 2, 2,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1,
0, 0, 0, 0, 0, 1, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 0, 0 } } } },