* opcode/i386.h: Add multiple inclusion protection.
(EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM) (EDI_REG_NUM): New macros. (MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros. (SIB_SCALE_FIELD,SIB_INDEX_FIELD,SIB_BASE_FIELD): New macros. (REG_PREFIX_P): New macro. * amd64-tdep.h (amd64_displaced_step_copy_insn): Declare. (amd64_displaced_step_fixup): Declare. * amd64-tdep.c: #include opcode/i386.h, dis-asm.h. (amd64_arch_regmap): Move out of amd64_analyze_stack_align and make static global. (amd64_arch_regmap_len): New static global. (amd64_arch_reg_to_regnum): New function. (struct amd64_insn): New struct. (struct displaced_step_closure): New struct. (onebyte_has_modrm,twobyte_has_modrm): New static globals. (rex_prefix_p,skip_prefixes) (amd64_insn_length_fprintf,amd64_insn_length_init_dis) (amd64_insn_length,amd64_get_unused_input_int_reg) (amd64_get_insn_details,fixup_riprel,fixup_displaced_copy) (amd64_displaced_step_copy_insn) (amd64_absolute_jmp_p,amd64_absolute_call_p,amd64_ret_p) (amd64_call_p,amd64_breakpoint_p,amd64_syscall_p) (amd64_displaced_step_fixup): New functions. * amd64-linux-tdep.c: #include arch-utils.h. (amd64_linux_init_abi): Install displaced stepping support. * gdb.arch/amd64-disp-step.S: New file. * gdb.arch/amd64-disp-step.exp: New file. * gdb.arch/i386-disp-step.S: New file. * gdb.arch/i386-disp-step.exp: New file.
This commit is contained in:
Doug Evans
parent
2211be76e9
commit
35669430c8
11 changed files with 1340 additions and 20 deletions
729
gdb/amd64-tdep.c
729
gdb/amd64-tdep.c
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@ -21,6 +21,8 @@
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "opcode/i386.h"
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#include "dis-asm.h"
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#include "arch-utils.h"
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#include "block.h"
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#include "dummy-frame.h"
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@ -200,6 +202,42 @@ amd64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
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return regnum;
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}
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/* Map architectural register numbers to gdb register numbers. */
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static const int amd64_arch_regmap[16] =
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{
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AMD64_RAX_REGNUM, /* %rax */
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AMD64_RCX_REGNUM, /* %rcx */
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AMD64_RDX_REGNUM, /* %rdx */
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AMD64_RBX_REGNUM, /* %rbx */
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AMD64_RSP_REGNUM, /* %rsp */
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AMD64_RBP_REGNUM, /* %rbp */
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AMD64_RSI_REGNUM, /* %rsi */
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AMD64_RDI_REGNUM, /* %rdi */
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AMD64_R8_REGNUM, /* %r8 */
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AMD64_R9_REGNUM, /* %r9 */
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AMD64_R10_REGNUM, /* %r10 */
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AMD64_R11_REGNUM, /* %r11 */
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AMD64_R12_REGNUM, /* %r12 */
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AMD64_R13_REGNUM, /* %r13 */
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AMD64_R14_REGNUM, /* %r14 */
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AMD64_R15_REGNUM /* %r15 */
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};
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static const int amd64_arch_regmap_len =
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(sizeof (amd64_arch_regmap) / sizeof (amd64_arch_regmap[0]));
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/* Convert architectural register number REG to the appropriate register
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number used by GDB. */
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static int
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amd64_arch_reg_to_regnum (int reg)
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{
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gdb_assert (reg >= 0 && reg < amd64_arch_regmap_len);
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return amd64_arch_regmap[reg];
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}
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/* Register classes as defined in the psABI. */
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@ -666,7 +704,678 @@ amd64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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return sp + 16;
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}
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/* Displaced instruction handling. */
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/* A partially decoded instruction.
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This contains enough details for displaced stepping purposes. */
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struct amd64_insn
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{
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/* The number of opcode bytes. */
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int opcode_len;
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/* The offset of the rex prefix or -1 if not present. */
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int rex_offset;
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/* The offset to the first opcode byte. */
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int opcode_offset;
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/* The offset to the modrm byte or -1 if not present. */
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int modrm_offset;
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/* The raw instruction. */
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gdb_byte *raw_insn;
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};
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struct displaced_step_closure
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{
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/* For rip-relative insns, saved copy of the reg we use instead of %rip. */
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int tmp_used;
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int tmp_regno;
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ULONGEST tmp_save;
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/* Details of the instruction. */
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struct amd64_insn insn_details;
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/* Amount of space allocated to insn_buf. */
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int max_len;
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/* The possibly modified insn.
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This is a variable-length field. */
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gdb_byte insn_buf[1];
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};
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/* WARNING: Keep onebyte_has_modrm, twobyte_has_modrm in sync with
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../opcodes/i386-dis.c (until libopcodes exports them, or an alternative,
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at which point delete these in favor of libopcodes' versions). */
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static const unsigned char onebyte_has_modrm[256] = {
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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/* ------------------------------- */
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/* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
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/* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
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/* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
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/* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
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/* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
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/* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
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/* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
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/* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
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/* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
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/* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
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/* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
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/* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
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/* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
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/* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
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/* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
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/* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
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/* ------------------------------- */
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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};
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static const unsigned char twobyte_has_modrm[256] = {
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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/* ------------------------------- */
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/* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
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/* 10 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 1f */
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/* 20 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 2f */
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/* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
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/* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
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/* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
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/* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
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/* 70 */ 1,1,1,1,1,1,1,0,1,1,1,1,1,1,1,1, /* 7f */
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/* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
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/* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
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/* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
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/* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
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/* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
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/* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
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/* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
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/* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
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/* ------------------------------- */
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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};
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static int amd64_syscall_p (const struct amd64_insn *insn, int *lengthp);
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static int
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rex_prefix_p (gdb_byte pfx)
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{
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return REX_PREFIX_P (pfx);
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}
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/* Skip the legacy instruction prefixes in INSN.
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We assume INSN is properly sentineled so we don't have to worry
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about falling off the end of the buffer. */
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static gdb_byte *
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skip_prefixes (gdb_byte *insn)
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{
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while (1)
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{
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switch (*insn)
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{
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case DATA_PREFIX_OPCODE:
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case ADDR_PREFIX_OPCODE:
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case CS_PREFIX_OPCODE:
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case DS_PREFIX_OPCODE:
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case ES_PREFIX_OPCODE:
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case FS_PREFIX_OPCODE:
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case GS_PREFIX_OPCODE:
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case SS_PREFIX_OPCODE:
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case LOCK_PREFIX_OPCODE:
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case REPE_PREFIX_OPCODE:
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case REPNE_PREFIX_OPCODE:
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++insn;
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continue;
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default:
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break;
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}
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break;
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}
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return insn;
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}
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/* fprintf-function for amd64_insn_length.
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This function is a nop, we don't want to print anything, we just want to
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compute the length of the insn. */
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static int ATTR_FORMAT (printf, 2, 3)
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amd64_insn_length_fprintf (void *stream, const char *format, ...)
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{
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return 0;
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}
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/* Initialize a struct disassemble_info for amd64_insn_length. */
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static void
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amd64_insn_length_init_dis (struct gdbarch *gdbarch,
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struct disassemble_info *di,
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const gdb_byte *insn, int max_len,
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CORE_ADDR addr)
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{
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init_disassemble_info (di, NULL, amd64_insn_length_fprintf);
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/* init_disassemble_info installs buffer_read_memory, etc.
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so we don't need to do that here.
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The cast is necessary until disassemble_info is const-ified. */
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di->buffer = (gdb_byte *) insn;
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di->buffer_length = max_len;
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di->buffer_vma = addr;
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di->arch = gdbarch_bfd_arch_info (gdbarch)->arch;
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di->mach = gdbarch_bfd_arch_info (gdbarch)->mach;
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di->endian = gdbarch_byte_order (gdbarch);
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di->endian_code = gdbarch_byte_order_for_code (gdbarch);
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disassemble_init_for_target (di);
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}
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/* Return the length in bytes of INSN.
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MAX_LEN is the size of the buffer containing INSN.
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libopcodes currently doesn't export a utility to compute the
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instruction length, so use the disassembler until then. */
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static int
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amd64_insn_length (struct gdbarch *gdbarch,
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const gdb_byte *insn, int max_len, CORE_ADDR addr)
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{
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struct disassemble_info di;
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amd64_insn_length_init_dis (gdbarch, &di, insn, max_len, addr);
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return gdbarch_print_insn (gdbarch, addr, &di);
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}
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/* Return an integer register (other than RSP) that is unused as an input
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operand in INSN.
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In order to not require adding a rex prefix if the insn doesn't already
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have one, the result is restricted to RAX ... RDI, sans RSP.
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The register numbering of the result follows architecture ordering,
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e.g. RDI = 7. */
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static int
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amd64_get_unused_input_int_reg (const struct amd64_insn *details)
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{
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/* 1 bit for each reg */
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int used_regs_mask = 0;
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/* There can be at most 3 int regs used as inputs in an insn, and we have
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7 to choose from (RAX ... RDI, sans RSP).
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This allows us to take a conservative approach and keep things simple.
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E.g. By avoiding RAX, we don't have to specifically watch for opcodes
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that implicitly specify RAX. */
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/* Avoid RAX. */
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used_regs_mask |= 1 << EAX_REG_NUM;
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/* Similarily avoid RDX, implicit operand in divides. */
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used_regs_mask |= 1 << EDX_REG_NUM;
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/* Avoid RSP. */
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used_regs_mask |= 1 << ESP_REG_NUM;
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/* If the opcode is one byte long and there's no ModRM byte,
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assume the opcode specifies a register. */
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if (details->opcode_len == 1 && details->modrm_offset == -1)
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used_regs_mask |= 1 << (details->raw_insn[details->opcode_offset] & 7);
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/* Mark used regs in the modrm/sib bytes. */
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if (details->modrm_offset != -1)
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{
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int modrm = details->raw_insn[details->modrm_offset];
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int mod = MODRM_MOD_FIELD (modrm);
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int reg = MODRM_REG_FIELD (modrm);
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int rm = MODRM_RM_FIELD (modrm);
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int have_sib = mod != 3 && rm == 4;
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/* Assume the reg field of the modrm byte specifies a register. */
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used_regs_mask |= 1 << reg;
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if (have_sib)
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{
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int base = SIB_BASE_FIELD (details->raw_insn[details->modrm_offset + 1]);
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int index = SIB_INDEX_FIELD (details->raw_insn[details->modrm_offset + 1]);
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used_regs_mask |= 1 << base;
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used_regs_mask |= 1 << index;
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}
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else
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{
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used_regs_mask |= 1 << rm;
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}
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}
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gdb_assert (used_regs_mask < 256);
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gdb_assert (used_regs_mask != 255);
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/* Finally, find a free reg. */
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{
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int i;
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for (i = 0; i < 8; ++i)
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{
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if (! (used_regs_mask & (1 << i)))
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return i;
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}
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/* We shouldn't get here. */
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internal_error (__FILE__, __LINE__, _("unable to find free reg"));
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}
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}
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/* Extract the details of INSN that we need. */
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static void
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amd64_get_insn_details (gdb_byte *insn, struct amd64_insn *details)
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{
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gdb_byte *start = insn;
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int need_modrm;
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details->raw_insn = insn;
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details->opcode_len = -1;
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details->rex_offset = -1;
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details->opcode_offset = -1;
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details->modrm_offset = -1;
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/* Skip legacy instruction prefixes. */
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insn = skip_prefixes (insn);
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/* Skip REX instruction prefix. */
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if (rex_prefix_p (*insn))
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{
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details->rex_offset = insn - start;
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++insn;
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}
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details->opcode_offset = insn - start;
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if (*insn == TWO_BYTE_OPCODE_ESCAPE)
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{
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/* Two or three-byte opcode. */
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++insn;
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need_modrm = twobyte_has_modrm[*insn];
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/* Check for three-byte opcode. */
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if (*insn == 0x38 || *insn == 0x3a)
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{
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++insn;
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details->opcode_len = 3;
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}
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else
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details->opcode_len = 2;
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}
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else
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{
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/* One-byte opcode. */
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need_modrm = onebyte_has_modrm[*insn];
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details->opcode_len = 1;
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}
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if (need_modrm)
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{
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++insn;
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details->modrm_offset = insn - start;
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}
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}
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/* Update %rip-relative addressing in INSN.
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%rip-relative addressing only uses a 32-bit displacement.
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32 bits is not enough to be guaranteed to cover the distance between where
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the real instruction is and where its copy is.
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Convert the insn to use base+disp addressing.
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We set base = pc + insn_length so we can leave disp unchanged. */
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static void
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fixup_riprel (struct gdbarch *gdbarch, struct displaced_step_closure *dsc,
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CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
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{
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const struct amd64_insn *insn_details = &dsc->insn_details;
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int modrm_offset = insn_details->modrm_offset;
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gdb_byte *insn = insn_details->raw_insn + modrm_offset;
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CORE_ADDR rip_base;
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int32_t disp;
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int insn_length;
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int arch_tmp_regno, tmp_regno;
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ULONGEST orig_value;
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/* %rip+disp32 addressing mode, displacement follows ModRM byte. */
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||||
++insn;
|
||||
|
||||
/* Compute the rip-relative address. */
|
||||
disp = extract_signed_integer (insn, sizeof (int32_t));
|
||||
insn_length = amd64_insn_length (gdbarch, dsc->insn_buf, dsc->max_len, from);
|
||||
rip_base = from + insn_length;
|
||||
|
||||
/* We need a register to hold the address.
|
||||
Pick one not used in the insn.
|
||||
NOTE: arch_tmp_regno uses architecture ordering, e.g. RDI = 7. */
|
||||
arch_tmp_regno = amd64_get_unused_input_int_reg (insn_details);
|
||||
tmp_regno = amd64_arch_reg_to_regnum (arch_tmp_regno);
|
||||
|
||||
/* REX.B should be unset as we were using rip-relative addressing,
|
||||
but ensure it's unset anyway, tmp_regno is not r8-r15. */
|
||||
if (insn_details->rex_offset != -1)
|
||||
dsc->insn_buf[insn_details->rex_offset] &= ~REX_B;
|
||||
|
||||
regcache_cooked_read_unsigned (regs, tmp_regno, &orig_value);
|
||||
dsc->tmp_regno = tmp_regno;
|
||||
dsc->tmp_save = orig_value;
|
||||
dsc->tmp_used = 1;
|
||||
|
||||
/* Convert the ModRM field to be base+disp. */
|
||||
dsc->insn_buf[modrm_offset] &= ~0xc7;
|
||||
dsc->insn_buf[modrm_offset] |= 0x80 + arch_tmp_regno;
|
||||
|
||||
regcache_cooked_write_unsigned (regs, tmp_regno, rip_base);
|
||||
|
||||
if (debug_displaced)
|
||||
fprintf_unfiltered (gdb_stdlog, "displaced: %%rip-relative addressing used.\n"
|
||||
"displaced: using temp reg %d, old value 0x%s, new value 0x%s\n",
|
||||
dsc->tmp_regno, paddr_nz (dsc->tmp_save),
|
||||
paddr_nz (rip_base));
|
||||
}
|
||||
|
||||
static void
|
||||
fixup_displaced_copy (struct gdbarch *gdbarch,
|
||||
struct displaced_step_closure *dsc,
|
||||
CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
|
||||
{
|
||||
const struct amd64_insn *details = &dsc->insn_details;
|
||||
|
||||
if (details->modrm_offset != -1)
|
||||
{
|
||||
gdb_byte modrm = details->raw_insn[details->modrm_offset];
|
||||
|
||||
if ((modrm & 0xc7) == 0x05)
|
||||
{
|
||||
/* The insn uses rip-relative addressing.
|
||||
Deal with it. */
|
||||
fixup_riprel (gdbarch, dsc, from, to, regs);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
struct displaced_step_closure *
|
||||
amd64_displaced_step_copy_insn (struct gdbarch *gdbarch,
|
||||
CORE_ADDR from, CORE_ADDR to,
|
||||
struct regcache *regs)
|
||||
{
|
||||
int len = gdbarch_max_insn_length (gdbarch);
|
||||
/* Extra space for sentinels so fixup_{riprel,displaced_copy don't have to
|
||||
continually watch for running off the end of the buffer. */
|
||||
int fixup_sentinel_space = len;
|
||||
struct displaced_step_closure *dsc =
|
||||
xmalloc (sizeof (*dsc) + len + fixup_sentinel_space);
|
||||
gdb_byte *buf = &dsc->insn_buf[0];
|
||||
struct amd64_insn *details = &dsc->insn_details;
|
||||
|
||||
dsc->tmp_used = 0;
|
||||
dsc->max_len = len + fixup_sentinel_space;
|
||||
|
||||
read_memory (from, buf, len);
|
||||
|
||||
/* Set up the sentinel space so we don't have to worry about running
|
||||
off the end of the buffer. An excessive number of leading prefixes
|
||||
could otherwise cause this. */
|
||||
memset (buf + len, 0, fixup_sentinel_space);
|
||||
|
||||
amd64_get_insn_details (buf, details);
|
||||
|
||||
/* GDB may get control back after the insn after the syscall.
|
||||
Presumably this is a kernel bug.
|
||||
If this is a syscall, make sure there's a nop afterwards. */
|
||||
{
|
||||
int syscall_length;
|
||||
|
||||
if (amd64_syscall_p (details, &syscall_length))
|
||||
buf[details->opcode_offset + syscall_length] = NOP_OPCODE;
|
||||
}
|
||||
|
||||
/* Modify the insn to cope with the address where it will be executed from.
|
||||
In particular, handle any rip-relative addressing. */
|
||||
fixup_displaced_copy (gdbarch, dsc, from, to, regs);
|
||||
|
||||
write_memory (to, buf, len);
|
||||
|
||||
if (debug_displaced)
|
||||
{
|
||||
fprintf_unfiltered (gdb_stdlog, "displaced: copy 0x%s->0x%s: ",
|
||||
paddr_nz (from), paddr_nz (to));
|
||||
displaced_step_dump_bytes (gdb_stdlog, buf, len);
|
||||
}
|
||||
|
||||
return dsc;
|
||||
}
|
||||
|
||||
static int
|
||||
amd64_absolute_jmp_p (const struct amd64_insn *details)
|
||||
{
|
||||
const gdb_byte *insn = &details->raw_insn[details->opcode_offset];
|
||||
|
||||
if (insn[0] == 0xff)
|
||||
{
|
||||
/* jump near, absolute indirect (/4) */
|
||||
if ((insn[1] & 0x38) == 0x20)
|
||||
return 1;
|
||||
|
||||
/* jump far, absolute indirect (/5) */
|
||||
if ((insn[1] & 0x38) == 0x28)
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
amd64_absolute_call_p (const struct amd64_insn *details)
|
||||
{
|
||||
const gdb_byte *insn = &details->raw_insn[details->opcode_offset];
|
||||
|
||||
if (insn[0] == 0xff)
|
||||
{
|
||||
/* Call near, absolute indirect (/2) */
|
||||
if ((insn[1] & 0x38) == 0x10)
|
||||
return 1;
|
||||
|
||||
/* Call far, absolute indirect (/3) */
|
||||
if ((insn[1] & 0x38) == 0x18)
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
amd64_ret_p (const struct amd64_insn *details)
|
||||
{
|
||||
/* NOTE: gcc can emit "repz ; ret". */
|
||||
const gdb_byte *insn = &details->raw_insn[details->opcode_offset];
|
||||
|
||||
switch (insn[0])
|
||||
{
|
||||
case 0xc2: /* ret near, pop N bytes */
|
||||
case 0xc3: /* ret near */
|
||||
case 0xca: /* ret far, pop N bytes */
|
||||
case 0xcb: /* ret far */
|
||||
case 0xcf: /* iret */
|
||||
return 1;
|
||||
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
||||
amd64_call_p (const struct amd64_insn *details)
|
||||
{
|
||||
const gdb_byte *insn = &details->raw_insn[details->opcode_offset];
|
||||
|
||||
if (amd64_absolute_call_p (details))
|
||||
return 1;
|
||||
|
||||
/* call near, relative */
|
||||
if (insn[0] == 0xe8)
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
amd64_breakpoint_p (const struct amd64_insn *details)
|
||||
{
|
||||
const gdb_byte *insn = &details->raw_insn[details->opcode_offset];
|
||||
|
||||
return insn[0] == 0xcc; /* int 3 */
|
||||
}
|
||||
|
||||
/* Return non-zero if INSN is a system call, and set *LENGTHP to its
|
||||
length in bytes. Otherwise, return zero. */
|
||||
|
||||
static int
|
||||
amd64_syscall_p (const struct amd64_insn *details, int *lengthp)
|
||||
{
|
||||
const gdb_byte *insn = &details->raw_insn[details->opcode_offset];
|
||||
|
||||
if (insn[0] == 0x0f && insn[1] == 0x05)
|
||||
{
|
||||
*lengthp = 2;
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Fix up the state of registers and memory after having single-stepped
|
||||
a displaced instruction. */
|
||||
|
||||
void
|
||||
amd64_displaced_step_fixup (struct gdbarch *gdbarch,
|
||||
struct displaced_step_closure *dsc,
|
||||
CORE_ADDR from, CORE_ADDR to,
|
||||
struct regcache *regs)
|
||||
{
|
||||
/* The offset we applied to the instruction's address. */
|
||||
ULONGEST insn_offset = to - from;
|
||||
gdb_byte *insn = dsc->insn_buf;
|
||||
const struct amd64_insn *insn_details = &dsc->insn_details;
|
||||
|
||||
if (debug_displaced)
|
||||
fprintf_unfiltered (gdb_stdlog,
|
||||
"displaced: fixup (0x%s, 0x%s), "
|
||||
"insn = 0x%02x 0x%02x ...\n",
|
||||
paddr_nz (from), paddr_nz (to), insn[0], insn[1]);
|
||||
|
||||
/* If we used a tmp reg, restore it. */
|
||||
|
||||
if (dsc->tmp_used)
|
||||
{
|
||||
if (debug_displaced)
|
||||
fprintf_unfiltered (gdb_stdlog, "displaced: restoring reg %d to 0x%s\n",
|
||||
dsc->tmp_regno, paddr_nz (dsc->tmp_save));
|
||||
regcache_cooked_write_unsigned (regs, dsc->tmp_regno, dsc->tmp_save);
|
||||
}
|
||||
|
||||
/* The list of issues to contend with here is taken from
|
||||
resume_execution in arch/x86/kernel/kprobes.c, Linux 2.6.28.
|
||||
Yay for Free Software! */
|
||||
|
||||
/* Relocate the %rip back to the program's instruction stream,
|
||||
if necessary. */
|
||||
|
||||
/* Except in the case of absolute or indirect jump or call
|
||||
instructions, or a return instruction, the new rip is relative to
|
||||
the displaced instruction; make it relative to the original insn.
|
||||
Well, signal handler returns don't need relocation either, but we use the
|
||||
value of %rip to recognize those; see below. */
|
||||
if (! amd64_absolute_jmp_p (insn_details)
|
||||
&& ! amd64_absolute_call_p (insn_details)
|
||||
&& ! amd64_ret_p (insn_details))
|
||||
{
|
||||
ULONGEST orig_rip;
|
||||
int insn_len;
|
||||
|
||||
regcache_cooked_read_unsigned (regs, AMD64_RIP_REGNUM, &orig_rip);
|
||||
|
||||
/* A signal trampoline system call changes the %rip, resuming
|
||||
execution of the main program after the signal handler has
|
||||
returned. That makes them like 'return' instructions; we
|
||||
shouldn't relocate %rip.
|
||||
|
||||
But most system calls don't, and we do need to relocate %rip.
|
||||
|
||||
Our heuristic for distinguishing these cases: if stepping
|
||||
over the system call instruction left control directly after
|
||||
the instruction, the we relocate --- control almost certainly
|
||||
doesn't belong in the displaced copy. Otherwise, we assume
|
||||
the instruction has put control where it belongs, and leave
|
||||
it unrelocated. Goodness help us if there are PC-relative
|
||||
system calls. */
|
||||
if (amd64_syscall_p (insn_details, &insn_len)
|
||||
&& orig_rip != to + insn_len
|
||||
/* GDB can get control back after the insn after the syscall.
|
||||
Presumably this is a kernel bug.
|
||||
Fixup ensures its a nop, we add one to the length for it. */
|
||||
&& orig_rip != to + insn_len + 1)
|
||||
{
|
||||
if (debug_displaced)
|
||||
fprintf_unfiltered (gdb_stdlog,
|
||||
"displaced: syscall changed %%rip; "
|
||||
"not relocating\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
ULONGEST rip = orig_rip - insn_offset;
|
||||
|
||||
/* If we have stepped over a breakpoint, set %rip to
|
||||
point at the breakpoint instruction itself.
|
||||
|
||||
(gdbarch_decr_pc_after_break was never something the core
|
||||
of GDB should have been concerned with; arch-specific
|
||||
code should be making PC values consistent before
|
||||
presenting them to GDB.) */
|
||||
if (amd64_breakpoint_p (insn_details))
|
||||
{
|
||||
if (debug_displaced)
|
||||
fprintf_unfiltered (gdb_stdlog,
|
||||
"displaced: stepped breakpoint\n");
|
||||
rip--;
|
||||
}
|
||||
|
||||
regcache_cooked_write_unsigned (regs, AMD64_RIP_REGNUM, rip);
|
||||
|
||||
if (debug_displaced)
|
||||
fprintf_unfiltered (gdb_stdlog,
|
||||
"displaced: "
|
||||
"relocated %%rip from 0x%s to 0x%s\n",
|
||||
paddr_nz (orig_rip), paddr_nz (rip));
|
||||
}
|
||||
}
|
||||
|
||||
/* If the instruction was PUSHFL, then the TF bit will be set in the
|
||||
pushed value, and should be cleared. We'll leave this for later,
|
||||
since GDB already messes up the TF flag when stepping over a
|
||||
pushfl. */
|
||||
|
||||
/* If the instruction was a call, the return address now atop the
|
||||
stack is the address following the copied instruction. We need
|
||||
to make it the address following the original instruction. */
|
||||
if (amd64_call_p (insn_details))
|
||||
{
|
||||
ULONGEST rsp;
|
||||
ULONGEST retaddr;
|
||||
const ULONGEST retaddr_len = 8;
|
||||
|
||||
regcache_cooked_read_unsigned (regs, AMD64_RSP_REGNUM, &rsp);
|
||||
retaddr = read_memory_unsigned_integer (rsp, retaddr_len);
|
||||
retaddr = (retaddr - insn_offset) & 0xffffffffUL;
|
||||
write_memory_unsigned_integer (rsp, retaddr_len, retaddr);
|
||||
|
||||
if (debug_displaced)
|
||||
fprintf_unfiltered (gdb_stdlog,
|
||||
"displaced: relocated return addr at 0x%s "
|
||||
"to 0x%s\n",
|
||||
paddr_nz (rsp),
|
||||
paddr_nz (retaddr));
|
||||
}
|
||||
}
|
||||
|
||||
/* The maximum number of saved registers. This should include %rip. */
|
||||
#define AMD64_NUM_SAVED_REGS AMD64_NUM_GREGS
|
||||
|
||||
|
|
@ -756,24 +1465,6 @@ amd64_analyze_stack_align (CORE_ADDR pc, CORE_ADDR current_pc,
|
|||
gdb_byte buf[18];
|
||||
int reg, r;
|
||||
int offset, offset_and;
|
||||
static int regnums[16] = {
|
||||
AMD64_RAX_REGNUM, /* %rax */
|
||||
AMD64_RCX_REGNUM, /* %rcx */
|
||||
AMD64_RDX_REGNUM, /* %rdx */
|
||||
AMD64_RBX_REGNUM, /* %rbx */
|
||||
AMD64_RSP_REGNUM, /* %rsp */
|
||||
AMD64_RBP_REGNUM, /* %rbp */
|
||||
AMD64_RSI_REGNUM, /* %rsi */
|
||||
AMD64_RDI_REGNUM, /* %rdi */
|
||||
AMD64_R8_REGNUM, /* %r8 */
|
||||
AMD64_R9_REGNUM, /* %r9 */
|
||||
AMD64_R10_REGNUM, /* %r10 */
|
||||
AMD64_R11_REGNUM, /* %r11 */
|
||||
AMD64_R12_REGNUM, /* %r12 */
|
||||
AMD64_R13_REGNUM, /* %r13 */
|
||||
AMD64_R14_REGNUM, /* %r14 */
|
||||
AMD64_R15_REGNUM, /* %r15 */
|
||||
};
|
||||
|
||||
if (target_read_memory (pc, buf, sizeof buf))
|
||||
return pc;
|
||||
|
|
@ -889,7 +1580,7 @@ amd64_analyze_stack_align (CORE_ADDR pc, CORE_ADDR current_pc,
|
|||
return pc;
|
||||
|
||||
if (current_pc > pc + offset_and)
|
||||
cache->saved_sp_reg = regnums[reg];
|
||||
cache->saved_sp_reg = amd64_arch_reg_to_regnum (reg);
|
||||
|
||||
return min (pc + offset + 2, current_pc);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue