Fix ldah being disassembled as ldaexh

2015-12-02  Andre Vieira  <andre.simoesdiasvieira@arm.com>

opcodes/
    * arm-dis.c (arm_opcodes): <ldaexh>: Fix typo...
    <ldah>: ... to this.

gas/testsuite/
    * gas/arm/armv8-a.d: <ldaexh>: Rename mismatched mnemonics ...
    <ldah>: ... to this.
This commit is contained in:
Andre Vieira 2015-11-25 13:56:55 +00:00 committed by Thomas Preud'homme
parent 46de9bcfe4
commit 3395762edd
4 changed files with 14 additions and 4 deletions

View file

@ -1,3 +1,8 @@
2015-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
* gas/arm/armv8-a.d: <ldaexh>: Rename mismatched mnemonics ...
<ldah>: ... to this.
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/float-fp16.d: New.

View file

@ -32,9 +32,9 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> e1d00c9f ldab r0, \[r0\]
0[0-9a-f]+ <[^>]+> e1d11c9f ldab r1, \[r1\]
0[0-9a-f]+ <[^>]+> e1deec9f ldab lr, \[lr\]
0[0-9a-f]+ <[^>]+> e1f00c9f ldaexh r0, \[r0\]
0[0-9a-f]+ <[^>]+> e1f11c9f ldaexh r1, \[r1\]
0[0-9a-f]+ <[^>]+> e1feec9f ldaexh lr, \[lr\]
0[0-9a-f]+ <[^>]+> e1f00c9f ldah r0, \[r0\]
0[0-9a-f]+ <[^>]+> e1f11c9f ldah r1, \[r1\]
0[0-9a-f]+ <[^>]+> e1feec9f ldah lr, \[lr\]
0[0-9a-f]+ <[^>]+> e1900c9f lda r0, \[r0\]
0[0-9a-f]+ <[^>]+> e1911c9f lda r1, \[r1\]
0[0-9a-f]+ <[^>]+> e19eec9f lda lr, \[lr\]

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@ -1,3 +1,8 @@
2015-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
* arm-dis.c (arm_opcodes): <ldaexh>: Fix typo...
<ldah>: ... to this.
2015-11-27 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.

View file

@ -1608,7 +1608,7 @@ static const struct opcode32 arm_opcodes[] =
{ARM_FEATURE_CORE_LOW (ARM_EXT_V8),
0x01e0fc90, 0x0ff0fff0, "stlh%c\t%0-3r, [%16-19R]"},
{ARM_FEATURE_CORE_LOW (ARM_EXT_V8),
0x01f00c9f, 0x0ff00fff, "ldaexh%c\t%12-15r, [%16-19R]"},
0x01f00c9f, 0x0ff00fff, "ldah%c\t%12-15r, [%16-19R]"},
/* CRC32 instructions. */
{ARM_FEATURE_COPROC (CRC_EXT_ARMV8),
0xe1000040, 0xfff00ff0, "crc32b\t%12-15R, %16-19R, %0-3R"},