gas/epiphany: Update expected register names in tests
In commit 02a79b89fd the register aliases
sb, sl, and ip were made less preferred than r9, r10, and r12, however,
the expected test results were not updated. This commit fixes this
oversight and updates the test results.
gas/ChangeLog:
* testsuite/gas/epiphany/addr-syntax.d: Update expected register
names.
* testsuite/gas/epiphany/allinsn.d: Likewise.
* testsuite/gas/epiphany/sample.d: Likewise.
This commit is contained in:
Andrew Burgess
parent
b89807c67b
commit
2f74d480dd
4 changed files with 248 additions and 241 deletions
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@ -1,3 +1,10 @@
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2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
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* testsuite/gas/epiphany/addr-syntax.d: Update expected register
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names.
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* testsuite/gas/epiphany/allinsn.d: Likewise.
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* testsuite/gas/epiphany/sample.d: Likewise.
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2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
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* testsuite/gas/epiphany/sample.d: Update expected output.
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@ -11,5 +11,5 @@ Disassembly of section \.text:
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0: 2bcc 01ff ldr.l r1,\[r2,-0x7ff\]
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4: 4c4c 0301 ldr.l r2,\[r3\],-0x8
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8: 107c 2201 strd.l r8,\[r4\],\+0x8
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c: 506c 2400 ldrd sl,\[ip\]
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10: 587c 2400 strd sl,\[lr\]
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c: 506c 2400 ldrd r10,\[r12\]
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10: 587c 2400 strd r10,\[lr\]
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File diff suppressed because it is too large
Load diff
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@ -90,98 +90,98 @@ Disassembly of section \.text:
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00000066 \<orr\>:
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66: 29fa orr r1,r2,r3
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68: 72ff 248a orr.l fp,ip,sp
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68: 72ff 248a orr.l fp,r12,sp
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0000006c \<and\>:
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6c: 29da and r1,r2,r3
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6e: 72df 248a and.l fp,ip,sp
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6e: 72df 248a and.l fp,r12,sp
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00000072 \<eor\>:
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72: 298a eor r1,r2,r3
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74: 728f 248a eor.l fp,ip,sp
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74: 728f 248a eor.l fp,r12,sp
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78: 0584 ldrb r0,\[r1,0x3\]
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7a: 478c 201f ldrb.l sl,\[r1,\+0xff\]
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7a: 478c 201f ldrb.l r10,\[r1,\+0xff\]
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7e: 0501 ldrb r0,\[r1,r2\]
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80: 0589 0080 ldrb.l r0,\[r1,\+fp\]
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84: 0d05 ldrb r0,\[r3\],r2
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86: 528d 2480 ldrb.l sl,\[ip\],\+sp
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86: 528d 2480 ldrb.l r10,\[r12\],\+sp
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8a: 05a4 ldrh r0,\[r1,0x3\]
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8c: 47ac 201f ldrh.l sl,\[r1,\+0xff\]
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8c: 47ac 201f ldrh.l r10,\[r1,\+0xff\]
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90: 0521 ldrh r0,\[r1,r2\]
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92: 05a9 0080 ldrh.l r0,\[r1,\+fp\]
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96: 0d25 ldrh r0,\[r3\],r2
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98: 52ad 2480 ldrh.l sl,\[ip\],\+sp
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98: 52ad 2480 ldrh.l r10,\[r12\],\+sp
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9c: 05c4 ldr r0,\[r1,0x3\]
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9e: 47cc 201f ldr.l sl,\[r1,\+0xff\]
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9e: 47cc 201f ldr.l r10,\[r1,\+0xff\]
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a2: 0541 ldr r0,\[r1,r2\]
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a4: 05c9 0080 ldr.l r0,\[r1,\+fp\]
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a8: 0d45 ldr r0,\[r3\],r2
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aa: 52cd 2480 ldr.l sl,\[ip\],\+sp
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aa: 52cd 2480 ldr.l r10,\[r12\],\+sp
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ae: 05e4 ldrd r0,\[r1,0x3\]
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b0: 47ec 201f ldrd.l sl,\[r1,\+0xff\]
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b0: 47ec 201f ldrd.l r10,\[r1,\+0xff\]
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b4: 0561 ldrd r0,\[r1,r2\]
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b6: 05e9 0080 ldrd.l r0,\[r1,\+fp\]
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ba: 0d65 ldrd r0,\[r3\],r2
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bc: 52ed 2480 ldrd.l sl,\[ip\],\+sp
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bc: 52ed 2480 ldrd.l r10,\[r12\],\+sp
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c0: 0594 strb r0,\[r1,0x3\]
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c2: 479c 201f strb.l sl,\[r1,\+0xff\]
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c2: 479c 201f strb.l r10,\[r1,\+0xff\]
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c6: 0511 strb r0,\[r1,r2\]
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c8: 0599 0080 strb.l r0,\[r1,\+fp\]
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cc: 0d15 strb r0,\[r3\],r2
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ce: 529d 2480 strb.l sl,\[ip\],\+sp
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ce: 529d 2480 strb.l r10,\[r12\],\+sp
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d2: 05b4 strh r0,\[r1,0x3\]
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d4: 47bc 201f strh.l sl,\[r1,\+0xff\]
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d4: 47bc 201f strh.l r10,\[r1,\+0xff\]
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d8: 0531 strh r0,\[r1,r2\]
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da: 05b9 0080 strh.l r0,\[r1,\+fp\]
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de: 0d35 strh r0,\[r3\],r2
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e0: 52bd 2480 strh.l sl,\[ip\],\+sp
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e0: 52bd 2480 strh.l r10,\[r12\],\+sp
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e4: 05d4 str r0,\[r1,0x3\]
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e6: 47dc 201f str.l sl,\[r1,\+0xff\]
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e6: 47dc 201f str.l r10,\[r1,\+0xff\]
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ea: 0551 str r0,\[r1,r2\]
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ec: 05d9 0080 str.l r0,\[r1,\+fp\]
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f0: 0d55 str r0,\[r3\],r2
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f2: 52dd 2480 str.l sl,\[ip\],\+sp
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f2: 52dd 2480 str.l r10,\[r12\],\+sp
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f6: 05f4 strd r0,\[r1,0x3\]
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f8: 47fc 201f strd.l sl,\[r1,\+0xff\]
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f8: 47fc 201f strd.l r10,\[r1,\+0xff\]
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fc: 0571 strd r0,\[r1,r2\]
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fe: 05f9 0080 strd.l r0,\[r1,\+fp\]
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102: 0d75 strd r0,\[r3\],r2
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104: 52fd 2480 strd.l sl,\[ip\],\+sp
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104: 52fd 2480 strd.l r10,\[r12\],\+sp
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00000108 \<mov\>:
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108: dfe3 mov r6,0xff
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10a: ffeb 6ff2 mov r31,0xffff
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10e: 004b 0102 mov r0,0x1002
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112: 2802 moveq r1,r2
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114: 700f 2402 moveq.l fp,ip
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114: 700f 2402 moveq.l fp,r12
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118: 2812 movne r1,r2
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11a: 701f 2402 movne.l fp,ip
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11a: 701f 2402 movne.l fp,r12
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11e: 2822 movgtu r1,r2
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120: 702f 2402 movgtu.l fp,ip
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120: 702f 2402 movgtu.l fp,r12
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124: 2832 movgteu r1,r2
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126: 703f 2402 movgteu.l fp,ip
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126: 703f 2402 movgteu.l fp,r12
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12a: 2842 movlteu r1,r2
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12c: 704f 2402 movlteu.l fp,ip
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12c: 704f 2402 movlteu.l fp,r12
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130: 2852 movltu r1,r2
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132: 705f 2402 movltu.l fp,ip
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132: 705f 2402 movltu.l fp,r12
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136: 2862 movgt r1,r2
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138: 706f 2402 movgt.l fp,ip
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138: 706f 2402 movgt.l fp,r12
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13c: 2872 movgte r1,r2
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13e: 707f 2402 movgte.l fp,ip
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13e: 707f 2402 movgte.l fp,r12
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142: 2882 movlt r1,r2
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144: 708f 2402 movlt.l fp,ip
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144: 708f 2402 movlt.l fp,r12
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148: 2892 movlte r1,r2
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14a: 709f 2402 movlte.l fp,ip
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14a: 709f 2402 movlte.l fp,r12
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14e: 28a2 movbeq r1,r2
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150: 70af 2402 movbeq.l fp,ip
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150: 70af 2402 movbeq.l fp,r12
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154: 28b2 movbne r1,r2
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156: 70bf 2402 movbne.l fp,ip
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156: 70bf 2402 movbne.l fp,r12
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15a: 28c2 movblt r1,r2
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15c: 70cf 2402 movblt.l fp,ip
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15c: 70cf 2402 movblt.l fp,r12
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160: 28d2 movblte r1,r2
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162: 70df 2402 movblte.l fp,ip
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162: 70df 2402 movblte.l fp,r12
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166: 28e2 mov r1,r2
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168: 70ef 2402 mov.l fp,ip
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168: 70ef 2402 mov.l fp,r12
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0000016c \<nop\>:
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16c: 01a2 nop
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@ -194,23 +194,23 @@ Disassembly of section \.text:
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00000172 \<fadd\>:
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172: 2987 fadd r1,r2,r3
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174: 728f 2487 fadd.l fp,ip,sp
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174: 728f 2487 fadd.l fp,r12,sp
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00000178 \<fsub\>:
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178: 2997 fsub r1,r2,r3
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17a: 729f 2487 fsub.l fp,ip,sp
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17a: 729f 2487 fsub.l fp,r12,sp
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0000017e \<fmul\>:
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17e: 29a7 fmul r1,r2,r3
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180: 72af 2487 fmul.l fp,ip,sp
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180: 72af 2487 fmul.l fp,r12,sp
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00000184 \<fmadd\>:
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184: 29b7 fmadd r1,r2,r3
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186: 72bf 2487 fmadd.l fp,ip,sp
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186: 72bf 2487 fmadd.l fp,r12,sp
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0000018a \<fmsub\>:
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18a: 29c7 fmsub r1,r2,r3
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18c: 72cf 2487 fmsub.l fp,ip,sp
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18c: 72cf 2487 fmsub.l fp,r12,sp
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190: 2102 movts config,r1
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192: e50f 6002 movts.l status,r31
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196: 251f 0402 movfs.l r1,imask
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