Remove arm-aout and arm-coff support

This also removes arm-netbsd (not arm-netbsdelf!), arm-openbsd, and
arm-riscix.  Those targets weren't on the obsolete list but they are
all aout, and it doesn't make all that much sense to remove arm-aout
without removing them too.

bfd/
	* Makefile.am: Remove arm-aout and arm-coff support.
	* config.bfd: Likewise.
	* configure.ac: Likewise.
	* targets.c: Likewise.
	* aout-arm.c: Delete.
	* armnetbsd.c: Delete.
	* riscix.c: Delete.
	* Makefile.in: Regenerate.
	* configure: Regenerate.
	* po/SRC-POTFILES.in: Regenerate.
binutils/
	* testsuite/binutils-all/arm/objdump.exp: Remove arm-aout and
	arm-coff support.
	* testsuite/binutils-all/objcopy.exp: Likewise.
	* testsuite/lib/binutils-common.exp: Likewise.
gas/
	* Makefile.am: Remove arm-aout and arm-coff support.
	* config/tc-arm.c: Likewise.
	* config/tc-arm.h: Likewise.
	* configure.tgt: Likewise.
	* testsuite/gas/aarch64/codealign.d: Likewise.
	* testsuite/gas/aarch64/mapping.d: Likewise.
	* testsuite/gas/aarch64/mapping2.d: Likewise.
	* testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.d: Likewise.
	* testsuite/gas/arm/adds-thumb1-reloc-local.d: Likewise.
	* testsuite/gas/arm/addsw-bad.d: Likewise.
	* testsuite/gas/arm/align.d: Likewise.
	* testsuite/gas/arm/align64.d: Likewise.
	* testsuite/gas/arm/arch7.d: Likewise.
	* testsuite/gas/arm/arch7a-mp.d: Likewise.
	* testsuite/gas/arm/arch7em.d: Likewise.
	* testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise.
	* testsuite/gas/arm/arm-it-auto-2.d: Likewise.
	* testsuite/gas/arm/arm-it-auto-3.d: Likewise.
	* testsuite/gas/arm/arm-it-auto.d: Likewise.
	* testsuite/gas/arm/arm-it-bad-2.d: Likewise.
	* testsuite/gas/arm/arm-it.d: Likewise.
	* testsuite/gas/arm/armv7e-m+fpv5-d16.d: Likewise.
	* testsuite/gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise.
	* testsuite/gas/arm/armv8-2-fp16-scalar-thumb.d: Likewise.
	* testsuite/gas/arm/armv8-2-fp16-scalar.d: Likewise.
	* testsuite/gas/arm/armv8-2-fp16-simd-thumb.d: Likewise.
	* testsuite/gas/arm/armv8-2-fp16-simd.d: Likewise.
	* testsuite/gas/arm/armv8-a+crypto.d: Likewise.
	* testsuite/gas/arm/armv8-a+fp.d: Likewise.
	* testsuite/gas/arm/armv8-a+ras.d: Likewise.
	* testsuite/gas/arm/armv8-a+rdma-warning.d: Likewise.
	* testsuite/gas/arm/armv8-a+rdma.d: Likewise.
	* testsuite/gas/arm/armv8-a+simd.d: Likewise.
	* testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise.
	* testsuite/gas/arm/armv8-r+fp.d: Likewise.
	* testsuite/gas/arm/armv8-r+simd.d: Likewise.
	* testsuite/gas/arm/armv8-r-barrier-thumb.d: Likewise.
	* testsuite/gas/arm/armv8_1-a+simd.d: Likewise.
	* testsuite/gas/arm/armv8_2+rdma.d: Likewise.
	* testsuite/gas/arm/armv8_2-a.d: Likewise.
	* testsuite/gas/arm/armv8_3-a-fp.d: Likewise.
	* testsuite/gas/arm/armv8_3-a-simd.d: Likewise.
	* testsuite/gas/arm/armv8a-automatic-hlt.d: Likewise.
	* testsuite/gas/arm/armv8a-automatic-lda.d: Likewise.
	* testsuite/gas/arm/attr-syntax.d: Likewise.
	* testsuite/gas/arm/automatic-bw.d: Likewise.
	* testsuite/gas/arm/automatic-cbz.d: Likewise.
	* testsuite/gas/arm/automatic-clrex.d: Likewise.
	* testsuite/gas/arm/automatic-lda.d: Likewise.
	* testsuite/gas/arm/automatic-ldaex.d: Likewise.
	* testsuite/gas/arm/automatic-ldaexb.d: Likewise.
	* testsuite/gas/arm/automatic-ldrex.d: Likewise.
	* testsuite/gas/arm/automatic-ldrexd.d: Likewise.
	* testsuite/gas/arm/automatic-movw.d: Likewise.
	* testsuite/gas/arm/automatic-sdiv.d: Likewise.
	* testsuite/gas/arm/automatic-strexb.d: Likewise.
	* testsuite/gas/arm/barrier-bad-thumb.d: Likewise.
	* testsuite/gas/arm/barrier-bad.d: Likewise.
	* testsuite/gas/arm/barrier-thumb.d: Likewise.
	* testsuite/gas/arm/barrier.d: Likewise.
	* testsuite/gas/arm/bignum1.d: Likewise.
	* testsuite/gas/arm/blx-bad.d: Likewise.
	* testsuite/gas/arm/blx-bl-convert.d: Likewise.
	* testsuite/gas/arm/blx-local.s: Likewise.
	* testsuite/gas/arm/crc32-armv8-a-bad.d: Likewise.
	* testsuite/gas/arm/crc32-armv8-a.d: Likewise.
	* testsuite/gas/arm/crc32-armv8-r-bad.d: Likewise.
	* testsuite/gas/arm/crc32-armv8-r.d: Likewise.
	* testsuite/gas/arm/dis-data.d: Likewise.
	* testsuite/gas/arm/dis-data2.d: Likewise.
	* testsuite/gas/arm/dis-data3.d: Likewise.
	* testsuite/gas/arm/eabi_attr_1.d: Likewise.
	* testsuite/gas/arm/fp-save.d: Likewise.
	* testsuite/gas/arm/group-reloc-alu-encoding-bad.d: Likewise.
	* testsuite/gas/arm/group-reloc-alu-parsing-bad.d: Likewise.
	* testsuite/gas/arm/group-reloc-alu.d: Likewise.
	* testsuite/gas/arm/group-reloc-ldc-encoding-bad.d: Likewise.
	* testsuite/gas/arm/group-reloc-ldc-parsing-bad.d: Likewise.
	* testsuite/gas/arm/group-reloc-ldc.d: Likewise.
	* testsuite/gas/arm/group-reloc-ldr-encoding-bad.d: Likewise.
	* testsuite/gas/arm/group-reloc-ldr-parsing-bad.d: Likewise.
	* testsuite/gas/arm/group-reloc-ldr.d: Likewise.
	* testsuite/gas/arm/group-reloc-ldrs-encoding-bad.d: Likewise.
	* testsuite/gas/arm/group-reloc-ldrs-parsing-bad.d: Likewise.
	* testsuite/gas/arm/group-reloc-ldrs.d: Likewise.
	* testsuite/gas/arm/insn-error-a.d: Likewise.
	* testsuite/gas/arm/insn-error-t.d: Likewise.
	* testsuite/gas/arm/inst-po-2.d: Likewise.
	* testsuite/gas/arm/inst-po-3.d: Likewise.
	* testsuite/gas/arm/inst-po-be.d: Likewise.
	* testsuite/gas/arm/inst-po.d: Likewise.
	* testsuite/gas/arm/ldconst.d: Likewise.
	* testsuite/gas/arm/ldgesb-bad.d: Likewise.
	* testsuite/gas/arm/ldgesh-bad.d: Likewise.
	* testsuite/gas/arm/ldst-offset0.d: Likewise.
	* testsuite/gas/arm/local_function.d: Likewise.
	* testsuite/gas/arm/local_label_coff.d: Likewise.
	* testsuite/gas/arm/local_label_elf.d: Likewise.
	* testsuite/gas/arm/mapping.d: Likewise.
	* testsuite/gas/arm/mapping2.d: Likewise.
	* testsuite/gas/arm/mapping3.d: Likewise.
	* testsuite/gas/arm/mapping4.d: Likewise.
	* testsuite/gas/arm/mapshort-elf.d: Likewise.
	* testsuite/gas/arm/mask_1-armv8-a.d: Likewise.
	* testsuite/gas/arm/mask_1-armv8-r.d: Likewise.
	* testsuite/gas/arm/movs-thumb1-reloc-local-armv7-m.d: Likewise.
	* testsuite/gas/arm/movs-thumb1-reloc-local.d: Likewise.
	* testsuite/gas/arm/movw-local.d: Likewise.
	* testsuite/gas/arm/mrs-msr-thumb-v6t2.d: Likewise.
	* testsuite/gas/arm/mrs-msr-thumb-v7-m.d: Likewise.
	* testsuite/gas/arm/mrs-msr-thumb-v7e-m.d: Likewise.
	* testsuite/gas/arm/msr-imm-bad.d: Likewise.
	* testsuite/gas/arm/msr-reg-bad.d: Likewise.
	* testsuite/gas/arm/msr-reg-thumb.d: Likewise.
	* testsuite/gas/arm/nomapping.d: Likewise.
	* testsuite/gas/arm/nops.d: Likewise.
	* testsuite/gas/arm/pic.d: Likewise.
	* testsuite/gas/arm/pinsn.d: Likewise.
	* testsuite/gas/arm/plt-1.d: Likewise.
	* testsuite/gas/arm/pr21458.d: Likewise.
	* testsuite/gas/arm/pr9722.d: Likewise.
	* testsuite/gas/arm/strex-t.d: Likewise.
	* testsuite/gas/arm/t2-branch-global.d: Likewise.
	* testsuite/gas/arm/target-reloc-1.d: Likewise.
	* testsuite/gas/arm/thumb-b-bad.d: Likewise.
	* testsuite/gas/arm/thumb-w-bad.d: Likewise.
	* testsuite/gas/arm/thumb-w-good.d: Likewise.
	* testsuite/gas/arm/thumb.d: Likewise.
	* testsuite/gas/arm/thumb2_it.d: Likewise.
	* testsuite/gas/arm/thumb2_it_auto.d: Likewise.
	* testsuite/gas/arm/thumb2_it_search.d: Likewise.
	* testsuite/gas/arm/thumb2_ldmstm.d: Likewise.
	* testsuite/gas/arm/thumb2_ldr_immediate_armv6.d: Likewise.
	* testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.d: Likewise.
	* testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d: Likewise.
	* testsuite/gas/arm/thumb2_pool.d: Likewise.
	* testsuite/gas/arm/thumb2_vpool.d: Likewise.
	* testsuite/gas/arm/thumb2_vpool_be.d: Likewise.
	* testsuite/gas/arm/thumb32.d: Likewise.
	* testsuite/gas/arm/thumbver.d: Likewise.
	* testsuite/gas/arm/tls.d: Likewise.
	* testsuite/gas/arm/tls_vxworks.d: Likewise.
	* testsuite/gas/arm/undefined.d: Likewise.
	* testsuite/gas/arm/undefined_coff.d: Likewise.
	* testsuite/gas/arm/unwind.d: Likewise.
	* testsuite/gas/arm/v4bx.d: Likewise.
	* testsuite/gas/arm/vcmp-noprefix-imm.d: Likewise.
	* testsuite/gas/arm/vcvt-bad.d: Likewise.
	* testsuite/gas/arm/vfma1.d: Likewise.
	* testsuite/gas/arm/vldconst.d: Likewise.
	* testsuite/gas/arm/vldconst_be.d: Likewise.
	* testsuite/gas/arm/vldm-arm.d: Likewise.
	* testsuite/gas/arm/vldr.d: Likewise.
	* testsuite/gas/arm/weakdef-1.d: Likewise.
	* testsuite/gas/arm/weakdef-2.d: Likewise.
	* config/te-riscix.h: Delete.
	* Makefile.in: Regenerate.
	* po/POTFILES.in: Regenerate.
ld/
	* Makefile.am: Remove arm-aout and arm-coff support.
	* configure.tgt: Likewise.
	* testsuite/ld-arm/attr-merge-div-00.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-01-m3.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-01.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-02.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-10-m3.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-10.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-11.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-12.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-120.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-20.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-21.d: Likewise.
	* testsuite/ld-arm/attr-merge-div-22.d: Likewise.
	* testsuite/ld-arm/attr-merge-hardfp-use-1.d: Likewise.
	* testsuite/ld-arm/attr-merge-hardfp-use-2.d: Likewise.
	* testsuite/ld-arm/attr-merge-nosection-1.d: Likewise.
	* testsuite/ld-arm/attr-merge-unknown-2.d: Likewise.
	* testsuite/ld-arm/attr-merge-unknown-2r.d: Likewise.
	* testsuite/ld-arm/attr-merge-unknown-3.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-1.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-10.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-10r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-11.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-11r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-12.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-12r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-13.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-13r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-14.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-14r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-2.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-3.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-4.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-5.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-6.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-6r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-7.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-8.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-8r.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-9.d: Likewise.
	* testsuite/ld-arm/attr-merge-vfp-9r.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-00.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-02.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-04.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-20.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-22.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-40.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise.
	* testsuite/ld-arm/attr-merge-wchar-44.d: Likewise.
	* testsuite/ld-arm/eabi-hard-float.d: Likewise.
	* testsuite/ld-arm/eabi-soft-float-ABI4.d: Likewise.
	* testsuite/ld-arm/eabi-soft-float-r.d: Likewise.
	* testsuite/ld-arm/eabi-soft-float.d: Likewise.
	* testsuite/ld-arm/gc-hidden-1.d: Likewise.
	* emulparams/armaoutb.sh: Delete.
	* emulparams/armaoutl.sh: Delete.
	* emulparams/armcoff.sh: Delete.
	* emulparams/armnbsd.sh: Delete.
	* emulparams/riscix.sh: Delete.
	* scripttempl/armaout.sc: Delete.
	* scripttempl/armcoff.sc: Delete.
	* scripttempl/riscix.sc: Delete.
	* Makefile.in: Regenerate.
	* po/BLD-POTFILES.in: Regenerate.
This commit is contained in:
Alan Modra 2018-04-16 20:33:36 +09:30
parent 00ae6230f0
commit 2ac93be706
254 changed files with 489 additions and 1929 deletions

View file

@ -1,3 +1,16 @@
2018-04-35 Alan Modra <amodra@gmail.com>
* Makefile.am: Remove arm-aout and arm-coff support.
* config.bfd: Likewise.
* configure.ac: Likewise.
* targets.c: Likewise.
* aout-arm.c: Delete.
* armnetbsd.c: Delete.
* riscix.c: Delete.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
2018-04-24 Nick Clifton <nickc@redhat.com>
PR 23113

View file

@ -257,14 +257,11 @@ ALL_MACHINES_CFILES = \
# The .o files needed by all of the 32 bit vectors that are configured into
# target_vector in targets.c if configured with --enable-targets=all.
BFD32_BACKENDS = \
aout-arm.lo \
aout-cris.lo \
aout-ns32k.lo \
aout-tic30.lo \
aout32.lo \
armnetbsd.lo \
cf-i386lynx.lo \
coff-arm.lo \
coff-go32.lo \
coff-i386.lo \
coff-mips.lo \
@ -384,7 +381,6 @@ BFD32_BACKENDS = \
plugin.lo \
ppcboot.lo \
reloc16.lo \
riscix.lo \
som.lo \
vax1knetbsd.lo \
vaxnetbsd.lo \
@ -397,14 +393,11 @@ BFD32_BACKENDS = \
xtensa-modules.lo
BFD32_BACKENDS_CFILES = \
aout-arm.c \
aout-cris.c \
aout-ns32k.c \
aout-tic30.c \
aout32.c \
armnetbsd.c \
cf-i386lynx.c \
coff-arm.c \
coff-go32.c \
coff-i386.c \
coff-mips.c \
@ -523,7 +516,6 @@ BFD32_BACKENDS_CFILES = \
plugin.c \
ppcboot.c \
reloc16.c \
riscix.c \
som.c \
vax1knetbsd.c \
vaxnetbsd.c \

View file

@ -591,14 +591,11 @@ ALL_MACHINES_CFILES = \
# The .o files needed by all of the 32 bit vectors that are configured into
# target_vector in targets.c if configured with --enable-targets=all.
BFD32_BACKENDS = \
aout-arm.lo \
aout-cris.lo \
aout-ns32k.lo \
aout-tic30.lo \
aout32.lo \
armnetbsd.lo \
cf-i386lynx.lo \
coff-arm.lo \
coff-go32.lo \
coff-i386.lo \
coff-mips.lo \
@ -718,7 +715,6 @@ BFD32_BACKENDS = \
plugin.lo \
ppcboot.lo \
reloc16.lo \
riscix.lo \
som.lo \
vax1knetbsd.lo \
vaxnetbsd.lo \
@ -731,14 +727,11 @@ BFD32_BACKENDS = \
xtensa-modules.lo
BFD32_BACKENDS_CFILES = \
aout-arm.c \
aout-cris.c \
aout-ns32k.c \
aout-tic30.c \
aout32.c \
armnetbsd.c \
cf-i386lynx.c \
coff-arm.c \
coff-go32.c \
coff-i386.c \
coff-mips.c \
@ -857,7 +850,6 @@ BFD32_BACKENDS_CFILES = \
plugin.c \
ppcboot.c \
reloc16.c \
riscix.c \
som.c \
vax1knetbsd.c \
vaxnetbsd.c \
@ -1186,7 +1178,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/aix386-core.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/aix5ppc-core.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/aout-arm.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/aout-cris.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/aout-ns32k.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/aout-tic30.Plo@am__quote@
@ -1195,7 +1186,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/archive.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/archive64.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/archures.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/armnetbsd.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/bfd.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/bfdio.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/bfdwin.Plo@am__quote@
@ -1204,7 +1194,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cf-i386lynx.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cisco-core.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-alpha.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-arm.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-bfd.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-go32.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/coff-i386.Plo@am__quote@
@ -1458,7 +1447,6 @@ distclean-compile:
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ppcboot.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/reloc.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/reloc16.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/riscix.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/rs6000-core.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/sco5-core.Plo@am__quote@
@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/section.Plo@am__quote@

View file

@ -1,574 +0,0 @@
/* BFD back-end for raw ARM a.out binaries.
Copyright (C) 1994-2018 Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
/* Avoid multiple definitions from aoutx if supporting standard a.out
as well as our own. */
/* Do not "beautify" the CONCAT* macro args. Traditional C will not
remove whitespace added here, and thus will fail to concatenate
the tokens. */
#define NAME(x,y) CONCAT3 (aoutarm,_32_,y)
#define N_TXTADDR(x) \
((N_MAGIC (x) == NMAGIC) \
? (bfd_vma) 0x8000 \
: ((N_MAGIC (x) != ZMAGIC) \
? (bfd_vma) 0 \
: ((N_SHARED_LIB (x)) \
? ((x)->a_entry & ~(bfd_vma) (TARGET_PAGE_SIZE - 1)) \
: (bfd_vma) TEXT_START_ADDR)))
#define TEXT_START_ADDR 0x8000
#define TARGET_PAGE_SIZE 0x8000
#define SEGMENT_SIZE TARGET_PAGE_SIZE
#define DEFAULT_ARCH bfd_arch_arm
#define MY(OP) CONCAT2 (arm_aout_,OP)
#define N_BADMAG(x) ((((x)->a_info & ~007200) != ZMAGIC) && \
(((x)->a_info & ~006000) != OMAGIC) && \
((x)->a_info != NMAGIC))
#define N_MAGIC(x) ((x)->a_info & ~07200)
#define MY_bfd_reloc_type_lookup arm_aout_bfd_reloc_type_lookup
#define MY_bfd_reloc_name_lookup arm_aout_bfd_reloc_name_lookup
#include "libaout.h"
#include "aout/aout64.h"
static bfd_reloc_status_type
MY (fix_pcrel_26) (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static bfd_reloc_status_type
MY (fix_pcrel_26_done) (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
reloc_howto_type MY (howto_table)[] =
{
/* Type rs size bsz pcrel bitpos ovrf sf name part_inpl
readmask setmask pcdone. */
HOWTO (0, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, 0, "8", TRUE,
0x000000ff, 0x000000ff, FALSE),
HOWTO (1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, 0, "16", TRUE,
0x0000ffff, 0x0000ffff, FALSE),
HOWTO (2, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, 0, "32", TRUE,
0xffffffff, 0xffffffff, FALSE),
HOWTO (3, 2, 2, 26, TRUE, 0, complain_overflow_signed, MY (fix_pcrel_26),
"ARM26", TRUE, 0x00ffffff, 0x00ffffff, TRUE),
HOWTO (4, 0, 0, 8, TRUE, 0, complain_overflow_signed, 0, "DISP8", TRUE,
0x000000ff, 0x000000ff, TRUE),
HOWTO (5, 0, 1, 16, TRUE, 0, complain_overflow_signed, 0, "DISP16", TRUE,
0x0000ffff, 0x0000ffff, TRUE),
HOWTO (6, 0, 2, 32, TRUE, 0, complain_overflow_signed, 0, "DISP32", TRUE,
0xffffffff, 0xffffffff, TRUE),
HOWTO (7, 2, 2, 26, FALSE, 0, complain_overflow_signed,
MY (fix_pcrel_26_done), "ARM26D", TRUE, 0x0, 0x0,
FALSE),
EMPTY_HOWTO (-1),
HOWTO (9, 0, -1, 16, FALSE, 0, complain_overflow_bitfield, 0, "NEG16", TRUE,
0x0000ffff, 0x0000ffff, FALSE),
HOWTO (10, 0, -2, 32, FALSE, 0, complain_overflow_bitfield, 0, "NEG32", TRUE,
0xffffffff, 0xffffffff, FALSE)
};
#define RELOC_ARM_BITS_NEG_BIG ((unsigned int) 0x08)
#define RELOC_ARM_BITS_NEG_LITTLE ((unsigned int) 0x10)
static reloc_howto_type *
MY (reloc_howto) (bfd *abfd,
struct reloc_std_external *rel,
int *r_index,
int *r_extern,
int *r_pcrel)
{
unsigned int r_length;
unsigned int r_pcrel_done;
unsigned int r_neg;
int howto_index;
*r_pcrel = 0;
if (bfd_header_big_endian (abfd))
{
*r_index = ((rel->r_index[0] << 16)
| (rel->r_index[1] << 8)
| rel->r_index[2]);
*r_extern = (0 != (rel->r_type[0] & RELOC_STD_BITS_EXTERN_BIG));
r_pcrel_done = (0 != (rel->r_type[0] & RELOC_STD_BITS_PCREL_BIG));
r_neg = (0 != (rel->r_type[0] & RELOC_ARM_BITS_NEG_BIG));
r_length = ((rel->r_type[0] & RELOC_STD_BITS_LENGTH_BIG)
>> RELOC_STD_BITS_LENGTH_SH_BIG);
}
else
{
*r_index = ((rel->r_index[2] << 16)
| (rel->r_index[1] << 8)
| rel->r_index[0]);
*r_extern = (0 != (rel->r_type[0] & RELOC_STD_BITS_EXTERN_LITTLE));
r_pcrel_done = (0 != (rel->r_type[0] & RELOC_STD_BITS_PCREL_LITTLE));
r_neg = (0 != (rel->r_type[0] & RELOC_ARM_BITS_NEG_LITTLE));
r_length = ((rel->r_type[0] & RELOC_STD_BITS_LENGTH_LITTLE)
>> RELOC_STD_BITS_LENGTH_SH_LITTLE);
}
howto_index = r_length + 4 * r_pcrel_done + 8 * r_neg;
if (howto_index == 3)
*r_pcrel = 1;
return MY (howto_table) + howto_index;
}
#define MY_reloc_howto(BFD, REL, IN, EX, PC) \
MY (reloc_howto) (BFD, REL, &IN, &EX, &PC)
static void
MY (put_reloc) (bfd *abfd,
int r_extern,
int r_index,
bfd_vma value,
reloc_howto_type *howto,
struct reloc_std_external *reloc)
{
unsigned int r_length;
int r_pcrel;
int r_neg;
PUT_WORD (abfd, value, reloc->r_address);
/* Size as a power of two. */
r_length = howto->size;
/* Special case for branch relocations. */
if (howto->type == 3 || howto->type == 7)
r_length = 3;
r_pcrel = howto->type & 4; /* PC Relative done? */
r_neg = howto->type & 8; /* Negative relocation. */
if (bfd_header_big_endian (abfd))
{
reloc->r_index[0] = r_index >> 16;
reloc->r_index[1] = r_index >> 8;
reloc->r_index[2] = r_index;
reloc->r_type[0] =
((r_extern ? RELOC_STD_BITS_EXTERN_BIG : 0)
| (r_pcrel ? RELOC_STD_BITS_PCREL_BIG : 0)
| (r_neg ? RELOC_ARM_BITS_NEG_BIG : 0)
| (r_length << RELOC_STD_BITS_LENGTH_SH_BIG));
}
else
{
reloc->r_index[2] = r_index >> 16;
reloc->r_index[1] = r_index >> 8;
reloc->r_index[0] = r_index;
reloc->r_type[0] =
((r_extern ? RELOC_STD_BITS_EXTERN_LITTLE : 0)
| (r_pcrel ? RELOC_STD_BITS_PCREL_LITTLE : 0)
| (r_neg ? RELOC_ARM_BITS_NEG_LITTLE : 0)
| (r_length << RELOC_STD_BITS_LENGTH_SH_LITTLE));
}
}
#define MY_put_reloc(BFD, EXT, IDX, VAL, HOWTO, RELOC) \
MY (put_reloc) (BFD, EXT, IDX, VAL, HOWTO, RELOC)
static void
MY (relocatable_reloc) (reloc_howto_type *howto,
bfd *abfd,
struct reloc_std_external *reloc,
bfd_vma *amount,
bfd_vma r_addr)
{
if (howto->type == 3)
{
if (reloc->r_type[0]
& (bfd_header_big_endian (abfd)
? RELOC_STD_BITS_EXTERN_BIG : RELOC_STD_BITS_EXTERN_LITTLE))
/* The reloc is still external, so don't modify anything. */
*amount = 0;
else
{
*amount -= r_addr;
/* Change the r_pcrel value -- on the ARM, this bit is set once the
relocation is done. */
if (bfd_header_big_endian (abfd))
reloc->r_type[0] |= RELOC_STD_BITS_PCREL_BIG;
else
reloc->r_type[0] |= RELOC_STD_BITS_PCREL_LITTLE;
}
}
else if (howto->type == 7)
*amount = 0;
}
#define MY_relocatable_reloc(HOW, BFD, REL, AMOUNT, ADDR) \
MY (relocatable_reloc) (HOW, BFD, REL, &(AMOUNT), ADDR)
static bfd_reloc_status_type
MY (fix_pcrel_26_done) (bfd *abfd ATTRIBUTE_UNUSED,
arelent *reloc_entry ATTRIBUTE_UNUSED,
asymbol *symbol ATTRIBUTE_UNUSED,
void * data ATTRIBUTE_UNUSED,
asection *input_section ATTRIBUTE_UNUSED,
bfd *output_bfd ATTRIBUTE_UNUSED,
char **error_message ATTRIBUTE_UNUSED)
{
/* This is dead simple at present. */
return bfd_reloc_ok;
}
static bfd_reloc_status_type
MY (fix_pcrel_26) (bfd *abfd,
arelent *reloc_entry,
asymbol *symbol,
void * data,
asection *input_section,
bfd *output_bfd,
char **error_message ATTRIBUTE_UNUSED)
{
bfd_vma relocation;
bfd_size_type addr = reloc_entry->address;
bfd_vma target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
bfd_reloc_status_type flag = bfd_reloc_ok;
/* If this is an undefined symbol, return error. */
if (bfd_is_und_section (symbol->section)
&& (symbol->flags & BSF_WEAK) == 0)
return output_bfd ? bfd_reloc_ok : bfd_reloc_undefined;
/* If the sections are different, and we are doing a partial relocation,
just ignore it for now. */
if (symbol->section->name != input_section->name
&& output_bfd != NULL)
return bfd_reloc_ok;
relocation = (target & 0x00ffffff) << 2;
relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */
relocation += symbol->value;
relocation += symbol->section->output_section->vma;
relocation += symbol->section->output_offset;
relocation += reloc_entry->addend;
relocation -= input_section->output_section->vma;
relocation -= input_section->output_offset;
relocation -= addr;
if (relocation & 3)
return bfd_reloc_overflow;
/* Check for overflow. */
if (relocation & 0x02000000)
{
if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff)
flag = bfd_reloc_overflow;
}
else if (relocation & ~ (bfd_vma) 0x03ffffff)
flag = bfd_reloc_overflow;
target &= ~ (bfd_vma) 0x00ffffff;
target |= (relocation >> 2) & 0x00ffffff;
bfd_put_32 (abfd, target, (bfd_byte *) data + addr);
/* Now the ARM magic... Change the reloc type so that it is marked as done.
Strictly this is only necessary if we are doing a partial relocation. */
reloc_entry->howto = &MY (howto_table)[7];
return flag;
}
static reloc_howto_type *
MY (bfd_reloc_type_lookup) (bfd *abfd,
bfd_reloc_code_real_type code)
{
#define ASTD(i,j) case i: return & MY (howto_table)[j]
if (code == BFD_RELOC_CTOR)
switch (bfd_arch_bits_per_address (abfd))
{
case 32:
code = BFD_RELOC_32;
break;
default:
return NULL;
}
switch (code)
{
ASTD (BFD_RELOC_16, 1);
ASTD (BFD_RELOC_32, 2);
ASTD (BFD_RELOC_ARM_PCREL_BRANCH, 3);
ASTD (BFD_RELOC_8_PCREL, 4);
ASTD (BFD_RELOC_16_PCREL, 5);
ASTD (BFD_RELOC_32_PCREL, 6);
default:
return NULL;
}
}
static reloc_howto_type *
MY (bfd_reloc_name_lookup) (bfd *abfd ATTRIBUTE_UNUSED,
const char *r_name)
{
unsigned int i;
for (i = 0;
i < sizeof (MY (howto_table)) / sizeof (MY (howto_table)[0]);
i++)
if (MY (howto_table)[i].name != NULL
&& strcasecmp (MY (howto_table)[i].name, r_name) == 0)
return &MY (howto_table)[i];
return NULL;
}
#define MY_swap_std_reloc_in MY (swap_std_reloc_in)
#define MY_swap_std_reloc_out MY (swap_std_reloc_out)
#define MY_get_section_contents _bfd_generic_get_section_contents
void MY_swap_std_reloc_in (bfd *, struct reloc_std_external *, arelent *, asymbol **, bfd_size_type);
void MY_swap_std_reloc_out (bfd *, arelent *, struct reloc_std_external *);
#include "aoutx.h"
void
MY_swap_std_reloc_in (bfd *abfd,
struct reloc_std_external *bytes,
arelent *cache_ptr,
asymbol **symbols,
bfd_size_type symcount ATTRIBUTE_UNUSED)
{
int r_index;
int r_extern;
int r_pcrel;
struct aoutdata *su = &(abfd->tdata.aout_data->a);
cache_ptr->address = H_GET_32 (abfd, bytes->r_address);
cache_ptr->howto = MY_reloc_howto (abfd, bytes, r_index, r_extern, r_pcrel);
MOVE_ADDRESS (0);
}
void
MY_swap_std_reloc_out (bfd *abfd,
arelent *g,
struct reloc_std_external *natptr)
{
int r_index;
asymbol *sym = *(g->sym_ptr_ptr);
int r_extern;
int r_length;
int r_pcrel;
int r_neg = 0; /* Negative relocs use the BASEREL bit. */
asection *output_section = sym->section->output_section;
PUT_WORD (abfd, g->address, natptr->r_address);
r_length = g->howto->size ; /* Size as a power of two. */
if (r_length < 0)
{
r_length = -r_length;
r_neg = 1;
}
r_pcrel = (int) g->howto->pc_relative; /* Relative to PC? */
/* For RISC iX, in pc-relative relocs the r_pcrel bit means that the
relocation has been done already (Only for the 26-bit one I think). */
if (g->howto->type == 3)
{
r_length = 3;
r_pcrel = 0;
}
else if (g->howto->type == 7)
{
r_length = 3;
r_pcrel = 1;
}
/* Name was clobbered by aout_write_syms to be symbol index. */
/* If this relocation is relative to a symbol then set the
r_index to the symbols index, and the r_extern bit.
Absolute symbols can come in in two ways, either as an offset
from the abs section, or as a symbol which has an abs value.
check for that here. */
if (bfd_is_com_section (output_section)
|| bfd_is_abs_section (output_section)
|| bfd_is_und_section (output_section))
{
if (bfd_abs_section_ptr->symbol == sym)
{
/* Whoops, looked like an abs symbol, but is really an offset
from the abs section. */
r_index = 0;
r_extern = 0;
}
else
{
/* Fill in symbol. */
r_extern = 1;
r_index = (*(g->sym_ptr_ptr))->KEEPIT;
}
}
else
{
/* Just an ordinary section. */
r_extern = 0;
r_index = output_section->target_index;
}
/* Now the fun stuff. */
if (bfd_header_big_endian (abfd))
{
natptr->r_index[0] = r_index >> 16;
natptr->r_index[1] = r_index >> 8;
natptr->r_index[2] = r_index;
natptr->r_type[0] =
( (r_extern ? RELOC_STD_BITS_EXTERN_BIG: 0)
| (r_pcrel ? RELOC_STD_BITS_PCREL_BIG: 0)
| (r_neg ? RELOC_ARM_BITS_NEG_BIG: 0)
| (r_length << RELOC_STD_BITS_LENGTH_SH_BIG));
}
else
{
natptr->r_index[2] = r_index >> 16;
natptr->r_index[1] = r_index >> 8;
natptr->r_index[0] = r_index;
natptr->r_type[0] =
( (r_extern ? RELOC_STD_BITS_EXTERN_LITTLE: 0)
| (r_pcrel ? RELOC_STD_BITS_PCREL_LITTLE: 0)
| (r_neg ? RELOC_ARM_BITS_NEG_LITTLE: 0)
| (r_length << RELOC_STD_BITS_LENGTH_SH_LITTLE));
}
}
#define MY_BFD_TARGET
#include "aout-target.h"
extern const bfd_target arm_aout_be_vec;
const bfd_target arm_aout_le_vec =
{
"a.out-arm-little", /* Name. */
bfd_target_aout_flavour,
BFD_ENDIAN_LITTLE, /* Target byte order (little). */
BFD_ENDIAN_LITTLE, /* Target headers byte order (little). */
(HAS_RELOC | EXEC_P | /* Object flags. */
HAS_LINENO | HAS_DEBUG |
HAS_SYMS | HAS_LOCALS | DYNAMIC | WP_TEXT | D_PAGED),
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_CODE | SEC_DATA),
MY_symbol_leading_char,
AR_PAD_CHAR, /* AR_pad_char. */
15, /* AR_max_namelen. */
0, /* match priority. */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* Data. */
bfd_getl64, bfd_getl_signed_64, bfd_putl64,
bfd_getl32, bfd_getl_signed_32, bfd_putl32,
bfd_getl16, bfd_getl_signed_16, bfd_putl16, /* Headers. */
{ /* bfd_check_format. */
_bfd_dummy_target,
MY_object_p,
bfd_generic_archive_p,
MY_core_file_p
},
{ /* bfd_set_format. */
_bfd_bool_bfd_false_error,
MY_mkobject,
_bfd_generic_mkarchive,
_bfd_bool_bfd_false_error
},
{ /* bfd_write_contents. */
_bfd_bool_bfd_false_error,
MY_write_object_contents,
_bfd_write_archive_contents,
_bfd_bool_bfd_false_error
},
BFD_JUMP_TABLE_GENERIC (MY),
BFD_JUMP_TABLE_COPY (MY),
BFD_JUMP_TABLE_CORE (MY),
BFD_JUMP_TABLE_ARCHIVE (MY),
BFD_JUMP_TABLE_SYMBOLS (MY),
BFD_JUMP_TABLE_RELOCS (MY),
BFD_JUMP_TABLE_WRITE (MY),
BFD_JUMP_TABLE_LINK (MY),
BFD_JUMP_TABLE_DYNAMIC (MY),
& arm_aout_be_vec,
(void *) MY_backend_data,
};
const bfd_target arm_aout_be_vec =
{
"a.out-arm-big", /* Name. */
bfd_target_aout_flavour,
BFD_ENDIAN_BIG, /* Target byte order (big). */
BFD_ENDIAN_BIG, /* Target headers byte order (big). */
(HAS_RELOC | EXEC_P | /* Object flags. */
HAS_LINENO | HAS_DEBUG |
HAS_SYMS | HAS_LOCALS | DYNAMIC | WP_TEXT | D_PAGED),
(SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_CODE | SEC_DATA),
MY_symbol_leading_char,
AR_PAD_CHAR, /* AR_pad_char. */
15, /* AR_max_namelen. */
0, /* match priority. */
bfd_getb64, bfd_getb_signed_64, bfd_putb64,
bfd_getb32, bfd_getb_signed_32, bfd_putb32,
bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Data. */
bfd_getb64, bfd_getb_signed_64, bfd_putb64,
bfd_getb32, bfd_getb_signed_32, bfd_putb32,
bfd_getb16, bfd_getb_signed_16, bfd_putb16, /* Headers. */
{ /* bfd_check_format. */
_bfd_dummy_target,
MY_object_p,
bfd_generic_archive_p,
MY_core_file_p
},
{ /* bfd_set_format. */
_bfd_bool_bfd_false_error,
MY_mkobject,
_bfd_generic_mkarchive,
_bfd_bool_bfd_false_error
},
{ /* bfd_write_contents. */
_bfd_bool_bfd_false_error,
MY_write_object_contents,
_bfd_write_archive_contents,
_bfd_bool_bfd_false_error
},
BFD_JUMP_TABLE_GENERIC (MY),
BFD_JUMP_TABLE_COPY (MY),
BFD_JUMP_TABLE_CORE (MY),
BFD_JUMP_TABLE_ARCHIVE (MY),
BFD_JUMP_TABLE_SYMBOLS (MY),
BFD_JUMP_TABLE_RELOCS (MY),
BFD_JUMP_TABLE_WRITE (MY),
BFD_JUMP_TABLE_LINK (MY),
BFD_JUMP_TABLE_DYNAMIC (MY),
& arm_aout_le_vec,
(void *) MY_backend_data,
};

View file

@ -1,39 +0,0 @@
/* BFD back-end for NetBSD/ARM a.out-ish binaries.
Copyright (C) 1999-2018 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#define BYTES_IN_WORD 4
#undef TARGET_IS_BIG_ENDIAN_P
#define TARGET_PAGE_SIZE 4096
#define SEGMENT_SIZE TARGET_PAGE_SIZE
#define DEFAULT_ARCH bfd_arch_arm
#define DEFAULT_MID M_ARM6_NETBSD
/*#define MACHTYPE_OK(mtype) ((mtype) == M_ARM6_NETBSD)*/
/* Do not "beautify" the CONCAT* macro args. Traditional C will not
remove whitespace added here, and thus will fail to concatenate
the tokens. */
#define MY(OP) CONCAT2 (arm_aout_nbsd_, OP)
/* This needs to start with a.out so GDB knows it is an a.out variant. */
#define TARGETNAME "a.out-arm-netbsd"
#include "netbsd.h"

View file

@ -53,8 +53,6 @@ case $targ in
echo "*** Use or1k-*-elf or or1k-*-linux as the target instead" >&2
exit 1
;;
arm*-*-aout | \
arm*-*-coff | \
powerpc-*-lynxos* | powerpc-*-windiss* | \
null)
if test "x$enable_obsolete" != xyes; then
@ -80,7 +78,12 @@ case $targ in
*-*-rtemsaout* | \
*-*-rtemscoff* | \
a29k-* | \
arm*-*-aout | \
arm-*-coff | \
arm-*-netbsd* | \
arm-*-openbsd* | \
arm-*-oabi | \
arm-*-riscix* | \
arm-epoc-pe* | \
h8300*-*-coff | \
h8500*-*-coff | \
@ -347,25 +350,17 @@ case "${targ}" in
;;
armeb-*-netbsdelf*)
targ_defvec=arm_elf32_be_vec
targ_selvecs="arm_elf32_le_vec arm_aout_nbsd_vec"
targ_selvecs="arm_elf32_le_vec"
;;
arm-*-netbsdelf*)
targ_defvec=arm_elf32_le_vec
targ_selvecs="arm_elf32_be_vec arm_aout_nbsd_vec"
;;
arm-*-netbsd* | arm-*-openbsd*)
targ_defvec=arm_aout_nbsd_vec
targ_selvecs="arm_elf32_le_vec arm_elf32_be_vec"
targ_underscore=yes
targ_selvecs="arm_elf32_be_vec"
;;
arm-*-nto* | nto*arm*)
targ_defvec=arm_elf32_le_vec
targ_selvecs=arm_elf32_be_vec
targ_cflags=-D__QNXTARGET__
;;
arm-*-riscix*)
targ_defvec=arm_aout_riscix_vec
;;
arm-wince-pe | arm-*-wince | arm*-*-mingw32ce* | arm*-*-cegcc*)
targ_defvec=arm_pe_wince_le_vec
targ_selvecs="arm_pe_wince_le_vec arm_pe_wince_be_vec arm_pei_wince_le_vec arm_pei_wince_be_vec"
@ -377,19 +372,6 @@ case "${targ}" in
targ_selvecs="arm_pe_le_vec arm_pe_be_vec arm_pei_le_vec arm_pei_be_vec"
targ_underscore=yes
;;
arm-*-aout | armel-*-aout)
targ_defvec=arm_aout_le_vec
targ_selvecs=arm_aout_be_vec
;;
armeb-*-aout)
targ_defvec=arm_aout_be_vec
targ_selvecs=arm_aout_le_vec
;;
arm-*-coff)
targ_defvec=arm_coff_le_vec
targ_selvecs=arm_coff_be_vec
targ_underscore=yes
;;
arm-*-phoenix*)
targ_defvec=arm_elf32_le_vec
targ_selvecs=arm_elf32_be_vec

6
bfd/configure vendored
View file

@ -14345,12 +14345,6 @@ do
aout_vec) tb="$tb host-aout.lo aout32.lo" ;;
arc_elf32_be_vec) tb="$tb elf32-arc.lo elf32.lo $elf" ;;
arc_elf32_le_vec) tb="$tb elf32-arc.lo elf32.lo $elf" ;;
arm_aout_be_vec) tb="$tb aout-arm.lo aout32.lo" ;;
arm_aout_le_vec) tb="$tb aout-arm.lo aout32.lo" ;;
arm_aout_nbsd_vec) tb="$tb armnetbsd.lo aout32.lo" ;;
arm_aout_riscix_vec) tb="$tb aout32.lo riscix.lo" ;;
arm_coff_be_vec) tb="$tb coff-arm.lo $coff" ;;
arm_coff_le_vec) tb="$tb coff-arm.lo $coff" ;;
arm_elf32_be_vec) tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;
arm_elf32_le_vec) tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;
arm_elf32_nacl_be_vec) tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;

View file

@ -422,12 +422,6 @@ do
aout_vec) tb="$tb host-aout.lo aout32.lo" ;;
arc_elf32_be_vec) tb="$tb elf32-arc.lo elf32.lo $elf" ;;
arc_elf32_le_vec) tb="$tb elf32-arc.lo elf32.lo $elf" ;;
arm_aout_be_vec) tb="$tb aout-arm.lo aout32.lo" ;;
arm_aout_le_vec) tb="$tb aout-arm.lo aout32.lo" ;;
arm_aout_nbsd_vec) tb="$tb armnetbsd.lo aout32.lo" ;;
arm_aout_riscix_vec) tb="$tb aout32.lo riscix.lo" ;;
arm_coff_be_vec) tb="$tb coff-arm.lo $coff" ;;
arm_coff_le_vec) tb="$tb coff-arm.lo $coff" ;;
arm_elf32_be_vec) tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;
arm_elf32_le_vec) tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;
arm_elf32_nacl_be_vec) tb="$tb elf32-arm.lo elf32.lo elf-nacl.lo elf-vxworks.lo $elf" ;;

View file

@ -1,6 +1,5 @@
aix386-core.c
aix5ppc-core.c
aout-arm.c
aout-cris.c
aout-ns32k.c
aout-target.h
@ -11,7 +10,6 @@ aoutx.h
archive.c
archive64.c
archures.c
armnetbsd.c
bfd.c
bfdio.c
bfdwin.c
@ -20,7 +18,6 @@ cache.c
cf-i386lynx.c
cisco-core.c
coff-alpha.c
coff-arm.c
coff-bfd.c
coff-go32.c
coff-i386.c
@ -291,7 +288,6 @@ plugin.c
ppcboot.c
reloc.c
reloc16.c
riscix.c
rs6000-core.c
sco5-core.c
section.c

View file

@ -1,649 +0,0 @@
/* BFD back-end for RISC iX (Acorn, arm) binaries.
Copyright (C) 1994-2018 Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
/* RISC iX overloads the MAGIC field to indicate more than just the usual
[ZNO]MAGIC values. Also included are squeezing information and
shared library usage. */
/* The following come from the man page. */
#define SHLIBLEN 60
#define MF_IMPURE 00200
#define MF_SQUEEZED 01000
#define MF_USES_SL 02000
#define MF_IS_SL 04000
/* Common combinations. */
/* Demand load (impure text). */
#define IMAGIC (MF_IMPURE | ZMAGIC)
/* OMAGIC with large header.
May contain a ref to a shared lib required by the object. */
#define SPOMAGIC (MF_USES_SL | OMAGIC)
/* A reference to a shared library.
The text portion of the object contains "overflow text" from
the shared library to be linked in with an object. */
#define SLOMAGIC (MF_IS_SL | OMAGIC)
/* Sqeezed demand paged.
NOTE: This interpretation of QMAGIC seems to be at variance
with that used on other architectures. */
#define QMAGIC (MF_SQUEEZED | ZMAGIC)
/* Program which uses sl. */
#define SPZMAGIC (MF_USES_SL | ZMAGIC)
/* Sqeezed ditto. */
#define SPQMAGIC (MF_USES_SL | QMAGIC)
/* Shared lib part of prog. */
#define SLZMAGIC (MF_IS_SL | ZMAGIC)
/* Sl which uses another. */
#define SLPZMAGIC (MF_USES_SL | SLZMAGIC)
#define N_SHARED_LIB(x) ((x)->a_info & MF_USES_SL)
/* Only a pure OMAGIC file has the minimal header. */
#define N_TXTOFF(x) \
((x)->a_info == OMAGIC \
? 32 \
: (N_MAGIC(x) == ZMAGIC \
? TARGET_PAGE_SIZE \
: 999))
#define N_TXTADDR(x) \
(N_MAGIC(x) != ZMAGIC \
? (bfd_vma) 0 /* object file or NMAGIC */ \
/* Programs with shared libs are loaded at the first page after all the \
text segments of the shared library programs. Without looking this \
up we can't know exactly what the address will be. A reasonable guess \
is that a_entry will be in the first page of the executable. */ \
: (N_SHARED_LIB(x) \
? ((x)->a_entry & ~(bfd_vma) (TARGET_PAGE_SIZE - 1)) \
: (bfd_vma) TEXT_START_ADDR))
#define N_SYMOFF(x) \
(N_TXTOFF (x) + (x)->a_text + (x)->a_data + (x)->a_trsize + (x)->a_drsize)
#define N_STROFF(x) (N_SYMOFF (x) + (x)->a_syms)
#define TEXT_START_ADDR 32768
#define TARGET_PAGE_SIZE 32768
#define SEGMENT_SIZE TARGET_PAGE_SIZE
#define DEFAULT_ARCH bfd_arch_arm
/* Do not "beautify" the CONCAT* macro args. Traditional C will not
remove whitespace added here, and thus will fail to concatenate
the tokens. */
#define MY(OP) CONCAT2 (arm_aout_riscix_,OP)
#define TARGETNAME "a.out-riscix"
#define N_BADMAG(x) ((((x)->a_info & ~007200) != ZMAGIC) \
&& (((x)->a_info & ~006000) != OMAGIC) \
&& ((x)->a_info != NMAGIC))
#define N_MAGIC(x) ((x)->a_info & ~07200)
#include "sysdep.h"
#include "bfd.h"
#include "libbfd.h"
#define WRITE_HEADERS(abfd, execp) \
{ \
if (adata (abfd).magic == undecided_magic) \
NAME (aout, adjust_sizes_and_vmas) (abfd); \
\
execp->a_syms = bfd_get_symcount (abfd) * EXTERNAL_NLIST_SIZE; \
execp->a_entry = bfd_get_start_address (abfd); \
\
execp->a_trsize = ((obj_textsec (abfd)->reloc_count) * \
obj_reloc_entry_size (abfd)); \
execp->a_drsize = ((obj_datasec (abfd)->reloc_count) * \
obj_reloc_entry_size (abfd)); \
NAME (aout, swap_exec_header_out) (abfd, execp, & exec_bytes); \
\
if (bfd_seek (abfd, (file_ptr) 0, SEEK_SET) != 0 \
|| bfd_bwrite ((void *) & exec_bytes, (bfd_size_type) EXEC_BYTES_SIZE, \
abfd) != EXEC_BYTES_SIZE) \
return FALSE; \
/* Now write out reloc info, followed by syms and strings. */ \
\
if (bfd_get_outsymbols (abfd) != NULL \
&& bfd_get_symcount (abfd) != 0) \
{ \
if (bfd_seek (abfd, (file_ptr) (N_SYMOFF (execp)), SEEK_SET) != 0) \
return FALSE; \
\
if (! NAME (aout, write_syms) (abfd)) \
return FALSE; \
\
if (bfd_seek (abfd, (file_ptr) (N_TRELOFF (execp)), SEEK_SET) != 0) \
return FALSE; \
\
if (! riscix_squirt_out_relocs (abfd, obj_textsec (abfd))) \
return FALSE; \
if (bfd_seek (abfd, (file_ptr) (N_DRELOFF (execp)), SEEK_SET) != 0) \
return FALSE; \
\
if (!NAME (aout, squirt_out_relocs) (abfd, obj_datasec (abfd))) \
return FALSE; \
} \
}
#include "libaout.h"
#include "aout/aout64.h"
static bfd_reloc_status_type
riscix_fix_pcrel_26_done (bfd *abfd ATTRIBUTE_UNUSED,
arelent *reloc_entry ATTRIBUTE_UNUSED,
asymbol *symbol ATTRIBUTE_UNUSED,
void * data ATTRIBUTE_UNUSED,
asection *input_section ATTRIBUTE_UNUSED,
bfd *output_bfd ATTRIBUTE_UNUSED,
char **error_message ATTRIBUTE_UNUSED)
{
/* This is dead simple at present. */
return bfd_reloc_ok;
}
static bfd_reloc_status_type riscix_fix_pcrel_26 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
static const bfd_target *arm_aout_riscix_callback (bfd *);
static reloc_howto_type riscix_std_reloc_howto[] =
{
/* Type rs size bsz pcrel bitpos ovrf sf name part_inpl readmask setmask pcdone */
HOWTO( 0, 0, 0, 8, FALSE, 0, complain_overflow_bitfield,0,"8", TRUE, 0x000000ff,0x000000ff, FALSE),
HOWTO( 1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield,0,"16", TRUE, 0x0000ffff,0x0000ffff, FALSE),
HOWTO( 2, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,0,"32", TRUE, 0xffffffff,0xffffffff, FALSE),
HOWTO( 3, 2, 3, 26, TRUE, 0, complain_overflow_signed, riscix_fix_pcrel_26 , "ARM26", TRUE, 0x00ffffff,0x00ffffff, FALSE),
HOWTO( 4, 0, 0, 8, TRUE, 0, complain_overflow_signed, 0,"DISP8", TRUE, 0x000000ff,0x000000ff, TRUE),
HOWTO( 5, 0, 1, 16, TRUE, 0, complain_overflow_signed, 0,"DISP16", TRUE, 0x0000ffff,0x0000ffff, TRUE),
HOWTO( 6, 0, 2, 32, TRUE, 0, complain_overflow_signed, 0,"DISP32", TRUE, 0xffffffff,0xffffffff, TRUE),
HOWTO( 7, 2, 3, 26, FALSE, 0, complain_overflow_signed, riscix_fix_pcrel_26_done, "ARM26D",TRUE,0x00ffffff,0x00ffffff, FALSE),
EMPTY_HOWTO (-1),
HOWTO( 9, 0, -1, 16, FALSE, 0, complain_overflow_bitfield,0,"NEG16", TRUE, 0x0000ffff,0x0000ffff, FALSE),
HOWTO( 10, 0, -2, 32, FALSE, 0, complain_overflow_bitfield,0,"NEG32", TRUE, 0xffffffff,0xffffffff, FALSE)
};
#define RISCIX_TABLE_SIZE \
(sizeof (riscix_std_reloc_howto) / sizeof (reloc_howto_type))
static bfd_reloc_status_type
riscix_fix_pcrel_26 (bfd *abfd,
arelent *reloc_entry,
asymbol *symbol,
void * data,
asection *input_section,
bfd *output_bfd,
char **error_message ATTRIBUTE_UNUSED)
{
bfd_vma relocation;
bfd_size_type addr = reloc_entry->address;
long target = bfd_get_32 (abfd, (bfd_byte *) data + addr);
bfd_reloc_status_type flag = bfd_reloc_ok;
/* If this is an undefined symbol, return error. */
if (bfd_is_und_section (symbol->section)
&& (symbol->flags & BSF_WEAK) == 0)
return output_bfd ? bfd_reloc_continue : bfd_reloc_undefined;
/* If the sections are different, and we are doing a partial relocation,
just ignore it for now. */
if (symbol->section->name != input_section->name
&& output_bfd != NULL)
return bfd_reloc_continue;
relocation = (target & 0x00ffffff) << 2;
relocation = (relocation ^ 0x02000000) - 0x02000000; /* Sign extend. */
relocation += symbol->value;
relocation += symbol->section->output_section->vma;
relocation += symbol->section->output_offset;
relocation += reloc_entry->addend;
relocation -= input_section->output_section->vma;
relocation -= input_section->output_offset;
relocation -= addr;
if (relocation & 3)
return bfd_reloc_overflow;
/* Check for overflow. */
if (relocation & 0x02000000)
{
if ((relocation & ~ (bfd_vma) 0x03ffffff) != ~ (bfd_vma) 0x03ffffff)
flag = bfd_reloc_overflow;
}
else if (relocation & ~ (bfd_vma) 0x03ffffff)
flag = bfd_reloc_overflow;
target &= ~0x00ffffff;
target |= (relocation >> 2) & 0x00ffffff;
bfd_put_32 (abfd, (bfd_vma) target, (bfd_byte *) data + addr);
/* Now the ARM magic... Change the reloc type so that it is marked as done.
Strictly this is only necessary if we are doing a partial relocation. */
reloc_entry->howto = &riscix_std_reloc_howto[7];
return flag;
}
static reloc_howto_type *
riscix_reloc_type_lookup (bfd *abfd, bfd_reloc_code_real_type code)
{
#define ASTD(i,j) case i: return &riscix_std_reloc_howto[j]
if (code == BFD_RELOC_CTOR)
switch (bfd_arch_bits_per_address (abfd))
{
case 32:
code = BFD_RELOC_32;
break;
default:
return NULL;
}
switch (code)
{
ASTD (BFD_RELOC_16, 1);
ASTD (BFD_RELOC_32, 2);
ASTD (BFD_RELOC_ARM_PCREL_BRANCH, 3);
ASTD (BFD_RELOC_8_PCREL, 4);
ASTD (BFD_RELOC_16_PCREL, 5);
ASTD (BFD_RELOC_32_PCREL, 6);
default:
return NULL;
}
}
static reloc_howto_type *
riscix_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
const char *r_name)
{
unsigned int i;
for (i = 0;
i < sizeof (riscix_std_reloc_howto) / sizeof (riscix_std_reloc_howto[0]);
i++)
if (riscix_std_reloc_howto[i].name != NULL
&& strcasecmp (riscix_std_reloc_howto[i].name, r_name) == 0)
return &riscix_std_reloc_howto[i];
return NULL;
}
#define MY_bfd_link_hash_table_create _bfd_generic_link_hash_table_create
#define MY_bfd_link_add_symbols _bfd_generic_link_add_symbols
#define MY_final_link_callback should_not_be_used
#define MY_bfd_final_link _bfd_generic_final_link
#define MY_bfd_reloc_type_lookup riscix_reloc_type_lookup
#define MY_bfd_reloc_name_lookup riscix_reloc_name_lookup
#define MY_canonicalize_reloc arm_aout_riscix_canonicalize_reloc
#define MY_object_p arm_aout_riscix_object_p
static void
riscix_swap_std_reloc_out (bfd *abfd,
arelent *g,
struct reloc_std_external *natptr)
{
int r_index;
asymbol *sym = *(g->sym_ptr_ptr);
int r_extern;
int r_length;
int r_pcrel;
int r_neg = 0; /* Negative relocs use the BASEREL bit. */
asection *output_section = sym->section->output_section;
PUT_WORD(abfd, g->address, natptr->r_address);
r_length = g->howto->size ; /* Size as a power of two. */
if (r_length < 0)
{
r_length = -r_length;
r_neg = 1;
}
r_pcrel = (int) g->howto->pc_relative; /* Relative to PC? */
/* For RISC iX, in pc-relative relocs the r_pcrel bit means that the
relocation has been done already (Only for the 26-bit one I think)? */
if (r_length == 3)
r_pcrel = r_pcrel ? 0 : 1;
/* Name was clobbered by aout_write_syms to be symbol index. */
/* If this relocation is relative to a symbol then set the
r_index to the symbols index, and the r_extern bit.
Absolute symbols can come in in two ways, either as an offset
from the abs section, or as a symbol which has an abs value.
check for that here. */
if (bfd_is_com_section (output_section)
|| bfd_is_abs_section (output_section)
|| bfd_is_und_section (output_section))
{
if (bfd_abs_section_ptr->symbol == sym)
{
/* Whoops, looked like an abs symbol, but is really an offset
from the abs section. */
r_index = 0;
r_extern = 0;
}
else
{
/* Fill in symbol. */
r_extern = 1;
r_index = (*g->sym_ptr_ptr)->udata.i;
}
}
else
{
/* Just an ordinary section. */
r_extern = 0;
r_index = output_section->target_index;
}
/* Now the fun stuff. */
if (bfd_header_big_endian (abfd))
{
natptr->r_index[0] = r_index >> 16;
natptr->r_index[1] = r_index >> 8;
natptr->r_index[2] = r_index;
natptr->r_type[0] =
( (r_extern ? RELOC_STD_BITS_EXTERN_BIG: 0)
| (r_pcrel ? RELOC_STD_BITS_PCREL_BIG: 0)
| (r_neg ? RELOC_STD_BITS_BASEREL_BIG: 0)
| (r_length << RELOC_STD_BITS_LENGTH_SH_BIG));
}
else
{
natptr->r_index[2] = r_index >> 16;
natptr->r_index[1] = r_index >> 8;
natptr->r_index[0] = r_index;
natptr->r_type[0] =
( (r_extern ? RELOC_STD_BITS_EXTERN_LITTLE: 0)
| (r_pcrel ? RELOC_STD_BITS_PCREL_LITTLE: 0)
| (r_neg ? RELOC_STD_BITS_BASEREL_LITTLE: 0)
| (r_length << RELOC_STD_BITS_LENGTH_SH_LITTLE));
}
}
static bfd_boolean
riscix_squirt_out_relocs (bfd *abfd, asection *section)
{
arelent **generic;
unsigned char *native, *natptr;
size_t each_size;
unsigned int count = section->reloc_count;
bfd_size_type natsize;
if (count == 0)
return TRUE;
each_size = obj_reloc_entry_size (abfd);
natsize = each_size;
natsize *= count;
native = bfd_zalloc (abfd, natsize);
if (!native)
return FALSE;
generic = section->orelocation;
for (natptr = native;
count != 0;
--count, natptr += each_size, ++generic)
riscix_swap_std_reloc_out (abfd, *generic,
(struct reloc_std_external *) natptr);
if (bfd_bwrite ((void *) native, natsize, abfd) != natsize)
{
bfd_release (abfd, native);
return FALSE;
}
bfd_release (abfd, native);
return TRUE;
}
/* This is just like the standard aoutx.h version but we need to do our
own mapping of external reloc type values to howto entries. */
static long
MY (canonicalize_reloc) (bfd *abfd,
sec_ptr section,
arelent **relptr,
asymbol **symbols)
{
arelent *tblptr = section->relocation;
unsigned int count, c;
extern reloc_howto_type NAME (aout, std_howto_table)[];
/* If we have already read in the relocation table, return the values. */
if (section->flags & SEC_CONSTRUCTOR)
{
arelent_chain *chain = section->constructor_chain;
for (count = 0; count < section->reloc_count; count++)
{
*relptr++ = &chain->relent;
chain = chain->next;
}
*relptr = 0;
return section->reloc_count;
}
if (tblptr && section->reloc_count)
{
for (count = 0; count++ < section->reloc_count;)
*relptr++ = tblptr++;
*relptr = 0;
return section->reloc_count;
}
if (!NAME (aout, slurp_reloc_table) (abfd, section, symbols))
return -1;
tblptr = section->relocation;
/* Fix up howto entries. */
for (count = 0; count++ < section->reloc_count;)
{
c = tblptr->howto - NAME(aout,std_howto_table);
BFD_ASSERT (c < RISCIX_TABLE_SIZE);
tblptr->howto = &riscix_std_reloc_howto[c];
*relptr++ = tblptr++;
}
*relptr = 0;
return section->reloc_count;
}
/* This is the same as NAME(aout,some_aout_object_p), but has different
expansions of the macro definitions. */
static const bfd_target *
riscix_some_aout_object_p (bfd *abfd,
struct internal_exec *execp,
const bfd_target *(*callback_to_real_object_p) (bfd *))
{
struct aout_data_struct *rawptr, *oldrawptr;
const bfd_target *result;
bfd_size_type amt = sizeof (struct aout_data_struct);
rawptr = bfd_zalloc (abfd, amt);
if (rawptr == NULL)
return NULL;
oldrawptr = abfd->tdata.aout_data;
abfd->tdata.aout_data = rawptr;
/* Copy the contents of the old tdata struct. */
if (oldrawptr != NULL)
*abfd->tdata.aout_data = *oldrawptr;
abfd->tdata.aout_data->a.hdr = &rawptr->e;
/* Copy in the internal_exec struct. */
*(abfd->tdata.aout_data->a.hdr) = *execp;
execp = abfd->tdata.aout_data->a.hdr;
/* Set the file flags. */
abfd->flags = BFD_NO_FLAGS;
if (execp->a_drsize || execp->a_trsize)
abfd->flags |= HAS_RELOC;
/* Setting of EXEC_P has been deferred to the bottom of this function. */
if (execp->a_syms)
abfd->flags |= HAS_LINENO | HAS_DEBUG | HAS_SYMS | HAS_LOCALS;
if (N_DYNAMIC (execp))
abfd->flags |= DYNAMIC;
/* Squeezed files aren't supported (yet)! */
if ((execp->a_info & MF_SQUEEZED) != 0)
{
bfd_set_error (bfd_error_wrong_format);
return NULL;
}
else if ((execp->a_info & MF_IS_SL) != 0)
{
/* Nor are shared libraries. */
bfd_set_error (bfd_error_wrong_format);
return NULL;
}
else if (N_MAGIC (execp) == ZMAGIC)
{
abfd->flags |= D_PAGED | WP_TEXT;
adata (abfd).magic = z_magic;
}
else if (N_MAGIC (execp) == NMAGIC)
{
abfd->flags |= WP_TEXT;
adata (abfd).magic = n_magic;
}
else if (N_MAGIC (execp) == OMAGIC)
adata (abfd).magic = o_magic;
else
/* Should have been checked with N_BADMAG before this routine
was called. */
abort ();
bfd_get_start_address (abfd) = execp->a_entry;
obj_aout_symbols (abfd) = NULL;
bfd_get_symcount (abfd) = execp->a_syms / sizeof (struct external_nlist);
/* The default relocation entry size is that of traditional V7 Unix. */
obj_reloc_entry_size (abfd) = RELOC_STD_SIZE;
/* The default symbol entry size is that of traditional Unix. */
obj_symbol_entry_size (abfd) = EXTERNAL_NLIST_SIZE;
obj_aout_external_syms (abfd) = NULL;
obj_aout_external_strings (abfd) = NULL;
obj_aout_sym_hashes (abfd) = NULL;
if (! NAME (aout, make_sections) (abfd))
return NULL;
obj_datasec (abfd)->size = execp->a_data;
obj_bsssec (abfd)->size = execp->a_bss;
obj_textsec (abfd)->flags =
(execp->a_trsize != 0
? (SEC_ALLOC | SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS | SEC_RELOC)
: (SEC_ALLOC | SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS));
obj_datasec (abfd)->flags =
(execp->a_drsize != 0
? (SEC_ALLOC | SEC_LOAD | SEC_DATA | SEC_HAS_CONTENTS | SEC_RELOC)
: (SEC_ALLOC | SEC_LOAD | SEC_DATA | SEC_HAS_CONTENTS));
obj_bsssec (abfd)->flags = SEC_ALLOC;
result = (*callback_to_real_object_p) (abfd);
#if defined(MACH) || defined(STAT_FOR_EXEC)
/* The original heuristic doesn't work in some important cases. The
a.out file has no information about the text start address. For
files (like kernels) linked to non-standard addresses (ld -Ttext
nnn) the entry point may not be between the default text start
(obj_textsec(abfd)->vma) and (obj_textsec(abfd)->vma) + text size
This is not just a mach issue. Many kernels are loaded at non
standard addresses. */
{
struct stat stat_buf;
if (abfd->iostream != NULL
&& (abfd->flags & BFD_IN_MEMORY) == 0
&& (fstat(fileno((FILE *) (abfd->iostream)), &stat_buf) == 0)
&& ((stat_buf.st_mode & 0111) != 0))
abfd->flags |= EXEC_P;
}
#else /* ! MACH */
/* Now that the segment addresses have been worked out, take a better
guess at whether the file is executable. If the entry point
is within the text segment, assume it is. (This makes files
executable even if their entry point address is 0, as long as
their text starts at zero.)
At some point we should probably break down and stat the file and
declare it executable if (one of) its 'x' bits are on... */
if ((execp->a_entry >= obj_textsec(abfd)->vma) &&
(execp->a_entry < obj_textsec(abfd)->vma + obj_textsec(abfd)->size))
abfd->flags |= EXEC_P;
#endif /* MACH */
if (result == NULL)
{
free (rawptr);
abfd->tdata.aout_data = oldrawptr;
}
return result;
}
static const bfd_target *
MY (object_p) (bfd *abfd)
{
struct external_exec exec_bytes; /* Raw exec header from file. */
struct internal_exec exec; /* Cleaned-up exec header. */
const bfd_target *target;
if (bfd_bread ((void *) &exec_bytes, (bfd_size_type) EXEC_BYTES_SIZE, abfd)
!= EXEC_BYTES_SIZE)
{
if (bfd_get_error () != bfd_error_system_call)
bfd_set_error (bfd_error_wrong_format);
return NULL;
}
exec.a_info = H_GET_32 (abfd, exec_bytes.e_info);
if (N_BADMAG (&exec))
return NULL;
#ifdef MACHTYPE_OK
if (!(MACHTYPE_OK (N_MACHTYPE (&exec))))
return NULL;
#endif
NAME (aout, swap_exec_header_in) (abfd, & exec_bytes, & exec);
target = riscix_some_aout_object_p (abfd, & exec, MY (callback));
return target;
}
#include "aout-target.h"

View file

@ -597,12 +597,6 @@ extern const bfd_target am33_elf32_linux_vec;
extern const bfd_target aout_vec;
extern const bfd_target arc_elf32_be_vec;
extern const bfd_target arc_elf32_le_vec;
extern const bfd_target arm_aout_be_vec;
extern const bfd_target arm_aout_le_vec;
extern const bfd_target arm_aout_nbsd_vec;
extern const bfd_target arm_aout_riscix_vec;
extern const bfd_target arm_coff_be_vec;
extern const bfd_target arm_coff_le_vec;
extern const bfd_target arm_elf32_be_vec;
extern const bfd_target arm_elf32_le_vec;
extern const bfd_target arm_elf32_nacl_be_vec;
@ -925,18 +919,6 @@ static const bfd_target * const _bfd_target_vector[] =
&arc_elf32_be_vec,
&arc_elf32_le_vec,
#if 0
/* We have no way of distinguishing these from other a.out variants. */
&arm_aout_be_vec,
&arm_aout_le_vec,
#endif
&arm_aout_nbsd_vec,
#if 0
/* We have no way of distinguishing these from other a.out variants. */
&arm_aout_riscix_vec,
#endif
&arm_coff_be_vec,
&arm_coff_le_vec,
&arm_elf32_be_vec,
&arm_elf32_le_vec,
&arm_elf32_symbian_be_vec,

View file

@ -1,3 +1,10 @@
2018-04-25 Alan Modra <amodra@gmail.com>
* testsuite/binutils-all/arm/objdump.exp: Remove arm-aout and
arm-coff support.
* testsuite/binutils-all/objcopy.exp: Likewise.
* testsuite/lib/binutils-common.exp: Likewise.
2018-04-18 Nick Clifton <nickc@redhat.com>
PR 23062

View file

@ -18,10 +18,6 @@ if {![istarget "arm*-*-*"]} then {
return
}
if {[istarget "*-*-aout"]} then {
return
}
if {![is_remote host] && [which $OBJDUMP] == 0} then {
perror "$OBJDUMP does not exist"
return

View file

@ -651,7 +651,6 @@ proc copy_executable { prog flags test1 test2 } {
setup_xfail "*-*-*"
}
setup_xfail "arm*-*-coff"
setup_xfail "arm*-*-pe"
setup_xfail "*-*-mingw*"
setup_xfail "*-*-cygwin*"

View file

@ -80,8 +80,6 @@ proc is_aout_format {} {
if { [istarget *-*-*aout*]
|| [istarget *-*-bsd*]
|| [istarget *-*-msdos*]
|| [istarget arm-*-netbsd*]
|| [istarget arm-*-openbsd*]
|| [istarget ns32k-*-*]
|| [istarget pdp11-*-*]
|| [istarget vax-*-netbsd] } {

View file

@ -1,3 +1,164 @@
2018-04-25 Alan Modra <amodra@gmail.com>
* Makefile.am: Remove arm-aout and arm-coff support.
* config/tc-arm.c: Likewise.
* config/tc-arm.h: Likewise.
* configure.tgt: Likewise.
* testsuite/gas/aarch64/codealign.d: Likewise.
* testsuite/gas/aarch64/mapping.d: Likewise.
* testsuite/gas/aarch64/mapping2.d: Likewise.
* testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.d: Likewise.
* testsuite/gas/arm/adds-thumb1-reloc-local.d: Likewise.
* testsuite/gas/arm/addsw-bad.d: Likewise.
* testsuite/gas/arm/align.d: Likewise.
* testsuite/gas/arm/align64.d: Likewise.
* testsuite/gas/arm/arch7.d: Likewise.
* testsuite/gas/arm/arch7a-mp.d: Likewise.
* testsuite/gas/arm/arch7em.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-5.d: Likewise.
* testsuite/gas/arm/arm-it-auto-2.d: Likewise.
* testsuite/gas/arm/arm-it-auto-3.d: Likewise.
* testsuite/gas/arm/arm-it-auto.d: Likewise.
* testsuite/gas/arm/arm-it-bad-2.d: Likewise.
* testsuite/gas/arm/arm-it.d: Likewise.
* testsuite/gas/arm/armv7e-m+fpv5-d16.d: Likewise.
* testsuite/gas/arm/armv7e-m+fpv5-sp-d16.d: Likewise.
* testsuite/gas/arm/armv8-2-fp16-scalar-thumb.d: Likewise.
* testsuite/gas/arm/armv8-2-fp16-scalar.d: Likewise.
* testsuite/gas/arm/armv8-2-fp16-simd-thumb.d: Likewise.
* testsuite/gas/arm/armv8-2-fp16-simd.d: Likewise.
* testsuite/gas/arm/armv8-a+crypto.d: Likewise.
* testsuite/gas/arm/armv8-a+fp.d: Likewise.
* testsuite/gas/arm/armv8-a+ras.d: Likewise.
* testsuite/gas/arm/armv8-a+rdma-warning.d: Likewise.
* testsuite/gas/arm/armv8-a+rdma.d: Likewise.
* testsuite/gas/arm/armv8-a+simd.d: Likewise.
* testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise.
* testsuite/gas/arm/armv8-r+fp.d: Likewise.
* testsuite/gas/arm/armv8-r+simd.d: Likewise.
* testsuite/gas/arm/armv8-r-barrier-thumb.d: Likewise.
* testsuite/gas/arm/armv8_1-a+simd.d: Likewise.
* testsuite/gas/arm/armv8_2+rdma.d: Likewise.
* testsuite/gas/arm/armv8_2-a.d: Likewise.
* testsuite/gas/arm/armv8_3-a-fp.d: Likewise.
* testsuite/gas/arm/armv8_3-a-simd.d: Likewise.
* testsuite/gas/arm/armv8a-automatic-hlt.d: Likewise.
* testsuite/gas/arm/armv8a-automatic-lda.d: Likewise.
* testsuite/gas/arm/attr-syntax.d: Likewise.
* testsuite/gas/arm/automatic-bw.d: Likewise.
* testsuite/gas/arm/automatic-cbz.d: Likewise.
* testsuite/gas/arm/automatic-clrex.d: Likewise.
* testsuite/gas/arm/automatic-lda.d: Likewise.
* testsuite/gas/arm/automatic-ldaex.d: Likewise.
* testsuite/gas/arm/automatic-ldaexb.d: Likewise.
* testsuite/gas/arm/automatic-ldrex.d: Likewise.
* testsuite/gas/arm/automatic-ldrexd.d: Likewise.
* testsuite/gas/arm/automatic-movw.d: Likewise.
* testsuite/gas/arm/automatic-sdiv.d: Likewise.
* testsuite/gas/arm/automatic-strexb.d: Likewise.
* testsuite/gas/arm/barrier-bad-thumb.d: Likewise.
* testsuite/gas/arm/barrier-bad.d: Likewise.
* testsuite/gas/arm/barrier-thumb.d: Likewise.
* testsuite/gas/arm/barrier.d: Likewise.
* testsuite/gas/arm/bignum1.d: Likewise.
* testsuite/gas/arm/blx-bad.d: Likewise.
* testsuite/gas/arm/blx-bl-convert.d: Likewise.
* testsuite/gas/arm/blx-local.s: Likewise.
* testsuite/gas/arm/crc32-armv8-a-bad.d: Likewise.
* testsuite/gas/arm/crc32-armv8-a.d: Likewise.
* testsuite/gas/arm/crc32-armv8-r-bad.d: Likewise.
* testsuite/gas/arm/crc32-armv8-r.d: Likewise.
* testsuite/gas/arm/dis-data.d: Likewise.
* testsuite/gas/arm/dis-data2.d: Likewise.
* testsuite/gas/arm/dis-data3.d: Likewise.
* testsuite/gas/arm/eabi_attr_1.d: Likewise.
* testsuite/gas/arm/fp-save.d: Likewise.
* testsuite/gas/arm/group-reloc-alu-encoding-bad.d: Likewise.
* testsuite/gas/arm/group-reloc-alu-parsing-bad.d: Likewise.
* testsuite/gas/arm/group-reloc-alu.d: Likewise.
* testsuite/gas/arm/group-reloc-ldc-encoding-bad.d: Likewise.
* testsuite/gas/arm/group-reloc-ldc-parsing-bad.d: Likewise.
* testsuite/gas/arm/group-reloc-ldc.d: Likewise.
* testsuite/gas/arm/group-reloc-ldr-encoding-bad.d: Likewise.
* testsuite/gas/arm/group-reloc-ldr-parsing-bad.d: Likewise.
* testsuite/gas/arm/group-reloc-ldr.d: Likewise.
* testsuite/gas/arm/group-reloc-ldrs-encoding-bad.d: Likewise.
* testsuite/gas/arm/group-reloc-ldrs-parsing-bad.d: Likewise.
* testsuite/gas/arm/group-reloc-ldrs.d: Likewise.
* testsuite/gas/arm/insn-error-a.d: Likewise.
* testsuite/gas/arm/insn-error-t.d: Likewise.
* testsuite/gas/arm/inst-po-2.d: Likewise.
* testsuite/gas/arm/inst-po-3.d: Likewise.
* testsuite/gas/arm/inst-po-be.d: Likewise.
* testsuite/gas/arm/inst-po.d: Likewise.
* testsuite/gas/arm/ldconst.d: Likewise.
* testsuite/gas/arm/ldgesb-bad.d: Likewise.
* testsuite/gas/arm/ldgesh-bad.d: Likewise.
* testsuite/gas/arm/ldst-offset0.d: Likewise.
* testsuite/gas/arm/local_function.d: Likewise.
* testsuite/gas/arm/local_label_coff.d: Likewise.
* testsuite/gas/arm/local_label_elf.d: Likewise.
* testsuite/gas/arm/mapping.d: Likewise.
* testsuite/gas/arm/mapping2.d: Likewise.
* testsuite/gas/arm/mapping3.d: Likewise.
* testsuite/gas/arm/mapping4.d: Likewise.
* testsuite/gas/arm/mapshort-elf.d: Likewise.
* testsuite/gas/arm/mask_1-armv8-a.d: Likewise.
* testsuite/gas/arm/mask_1-armv8-r.d: Likewise.
* testsuite/gas/arm/movs-thumb1-reloc-local-armv7-m.d: Likewise.
* testsuite/gas/arm/movs-thumb1-reloc-local.d: Likewise.
* testsuite/gas/arm/movw-local.d: Likewise.
* testsuite/gas/arm/mrs-msr-thumb-v6t2.d: Likewise.
* testsuite/gas/arm/mrs-msr-thumb-v7-m.d: Likewise.
* testsuite/gas/arm/mrs-msr-thumb-v7e-m.d: Likewise.
* testsuite/gas/arm/msr-imm-bad.d: Likewise.
* testsuite/gas/arm/msr-reg-bad.d: Likewise.
* testsuite/gas/arm/msr-reg-thumb.d: Likewise.
* testsuite/gas/arm/nomapping.d: Likewise.
* testsuite/gas/arm/nops.d: Likewise.
* testsuite/gas/arm/pic.d: Likewise.
* testsuite/gas/arm/pinsn.d: Likewise.
* testsuite/gas/arm/plt-1.d: Likewise.
* testsuite/gas/arm/pr21458.d: Likewise.
* testsuite/gas/arm/pr9722.d: Likewise.
* testsuite/gas/arm/strex-t.d: Likewise.
* testsuite/gas/arm/t2-branch-global.d: Likewise.
* testsuite/gas/arm/target-reloc-1.d: Likewise.
* testsuite/gas/arm/thumb-b-bad.d: Likewise.
* testsuite/gas/arm/thumb-w-bad.d: Likewise.
* testsuite/gas/arm/thumb-w-good.d: Likewise.
* testsuite/gas/arm/thumb.d: Likewise.
* testsuite/gas/arm/thumb2_it.d: Likewise.
* testsuite/gas/arm/thumb2_it_auto.d: Likewise.
* testsuite/gas/arm/thumb2_it_search.d: Likewise.
* testsuite/gas/arm/thumb2_ldmstm.d: Likewise.
* testsuite/gas/arm/thumb2_ldr_immediate_armv6.d: Likewise.
* testsuite/gas/arm/thumb2_ldr_immediate_armv6t2.d: Likewise.
* testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d: Likewise.
* testsuite/gas/arm/thumb2_pool.d: Likewise.
* testsuite/gas/arm/thumb2_vpool.d: Likewise.
* testsuite/gas/arm/thumb2_vpool_be.d: Likewise.
* testsuite/gas/arm/thumb32.d: Likewise.
* testsuite/gas/arm/thumbver.d: Likewise.
* testsuite/gas/arm/tls.d: Likewise.
* testsuite/gas/arm/tls_vxworks.d: Likewise.
* testsuite/gas/arm/undefined.d: Likewise.
* testsuite/gas/arm/undefined_coff.d: Likewise.
* testsuite/gas/arm/unwind.d: Likewise.
* testsuite/gas/arm/v4bx.d: Likewise.
* testsuite/gas/arm/vcmp-noprefix-imm.d: Likewise.
* testsuite/gas/arm/vcvt-bad.d: Likewise.
* testsuite/gas/arm/vfma1.d: Likewise.
* testsuite/gas/arm/vldconst.d: Likewise.
* testsuite/gas/arm/vldconst_be.d: Likewise.
* testsuite/gas/arm/vldm-arm.d: Likewise.
* testsuite/gas/arm/vldr.d: Likewise.
* testsuite/gas/arm/weakdef-1.d: Likewise.
* testsuite/gas/arm/weakdef-2.d: Likewise.
* config/te-riscix.h: Delete.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
2018-04-23 Alan Modra <amodra@gmail.com>
* stabs.c (generate_asm_file): Use memcpy rather than strncpy.

View file

@ -321,7 +321,6 @@ TARG_ENV_HFILES = \
config/te-nbsd532.h \
config/te-pc532mach.h \
config/te-pe.h \
config/te-riscix.h \
config/te-solaris.h \
config/te-svr4.h \
config/te-symbian.h \

View file

@ -617,7 +617,6 @@ TARG_ENV_HFILES = \
config/te-nbsd532.h \
config/te-pc532mach.h \
config/te-pe.h \
config/te-riscix.h \
config/te-solaris.h \
config/te-svr4.h \
config/te-symbian.h \

View file

@ -1040,7 +1040,6 @@ static int
my_get_expression (expressionS * ep, char ** str, int prefix_mode)
{
char * save_in;
segT seg;
/* In unified syntax, all prefixes are optional. */
if (unified_syntax)
@ -1072,7 +1071,7 @@ my_get_expression (expressionS * ep, char ** str, int prefix_mode)
save_in = input_line_pointer;
input_line_pointer = *str;
in_my_get_expression = TRUE;
seg = expression (ep);
expression (ep);
in_my_get_expression = FALSE;
if (ep->X_op == O_illegal || ep->X_op == O_absent)
@ -1086,22 +1085,6 @@ my_get_expression (expressionS * ep, char ** str, int prefix_mode)
return 1;
}
#ifdef OBJ_AOUT
if (seg != absolute_section
&& seg != text_section
&& seg != data_section
&& seg != bss_section
&& seg != undefined_section)
{
inst.error = _("bad segment");
*str = input_line_pointer;
input_line_pointer = save_in;
return 1;
}
#else
(void) seg;
#endif
/* Get rid of any bignums now, so that we don't generate an error for which
we can't establish a line number later on. Big numbers are never valid
in instructions, which is where this routine is always called. */
@ -22060,21 +22043,6 @@ valueT
md_section_align (segT segment ATTRIBUTE_UNUSED,
valueT size)
{
#if (defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT))
if (OUTPUT_FLAVOR == bfd_target_aout_flavour)
{
/* For a.out, force the section size to be aligned. If we don't do
this, BFD will align it for us, but it will not write out the
final bytes of the section. This may be a bug in BFD, but it is
easier to fix it here since that is how the other a.out targets
work. */
int align;
align = bfd_get_section_alignment (stdoutput, segment);
size = ((size + (1 << align) - 1) & (-((valueT) 1 << align)));
}
#endif
return size;
}

View file

@ -46,21 +46,7 @@
struct fix;
#if defined OBJ_AOUT
# if defined TE_RISCIX
# define TARGET_FORMAT "a.out-riscix"
# elif defined TE_LINUX
# define ARM_BI_ENDIAN
# define TARGET_FORMAT "a.out-arm-linux"
# elif defined TE_NetBSD
# define TARGET_FORMAT "a.out-arm-netbsd"
# else
# define ARM_BI_ENDIAN
# define TARGET_FORMAT (target_big_endian ? "a.out-arm-big" : "a.out-arm-little")
# endif
#elif defined OBJ_AIF
# define TARGET_FORMAT "aif"
#elif defined OBJ_COFF
#if defined OBJ_COFF
# define ARM_BI_ENDIAN
# if defined TE_PE
# if defined TE_WINCE

View file

@ -1,25 +0,0 @@
/* Copyright (C) 2007-2018 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as
published by the Free Software Foundation; either version 3,
or (at your option) any later version.
GAS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
the GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
#define TE_RISCIX
#define LOCAL_LABELS_DOLLAR 1
#define LOCAL_LABELS_FB 1
#include "obj-format.h"

View file

@ -136,8 +136,6 @@ case ${generic_target} in
arc-*-elf*) fmt=elf ;;
arc*-*-linux*) fmt=elf bfd_gas=yes ;;
arm-*-aout) fmt=aout ;;
arm-*-coff) fmt=coff ;;
arm-*-phoenix*) fmt=elf ;;
arm-*-elf) fmt=elf ;;
arm-*-eabi* | arm-*-rtems*) fmt=elf em=armeabi ;;
@ -148,19 +146,16 @@ case ${generic_target} in
fmt=elf em=freebsd ;;
arm-*-freebsd* | armeb-*-freebsd*) fmt=elf em=armfbsdeabi ;;
arm*-*-freebsd*) fmt=elf em=armfbsdvfp ;;
arm-*-linux*aout*) fmt=aout em=linux ;;
arm-*-linux-*eabi*) fmt=elf em=armlinuxeabi ;;
arm-*-linux-*) fmt=elf em=linux ;;
arm-*-uclinux*eabi*) fmt=elf em=armlinuxeabi ;;
arm-*-uclinux*) fmt=elf em=linux ;;
arm-*-nacl*) fmt=elf em=nacl ;;
arm-*-netbsdelf*) fmt=elf em=nbsd ;;
arm-*-*n*bsd*) fmt=aout em=nbsd ;;
arm-*-nto*) fmt=elf ;;
arm-wince-pe | arm-*-wince | arm*-*-mingw32ce* | arm*-*-cegcc*)
fmt=coff em=wince-pe ;;
arm-*-pe) fmt=coff em=pe ;;
arm-*-riscix*) fmt=aout em=riscix ;;
arm-*-fuchsia*) fmt=elf ;;
avr-*-*) fmt=elf bfd_gas=yes ;;

View file

@ -196,7 +196,6 @@ config/te-nbsd.h
config/te-nbsd532.h
config/te-pc532mach.h
config/te-pe.h
config/te-riscix.h
config/te-solaris.h
config/te-svr4.h
config/te-symbian.h

View file

@ -1,7 +1,7 @@
#objdump: --section-headers
# Minimum code alignment should be set.
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: +file format.*aarch64.*

View file

@ -1,7 +1,7 @@
#objdump: --syms --special-syms
#name: AArch64 Mapping Symbols
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
# Test the generation of AArch64 ELF Mapping Symbols

View file

@ -1,7 +1,7 @@
#objdump: --syms --special-syms
#name: AArch64 Mapping Symbols Test 2
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: +file format.*aarch64.*

View file

@ -1,5 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#skip: *-*-pe *-*-wince
#name: ADDS relocations against local symbols for armv7-m
.*: +file format .*arm.*

View file

@ -1,5 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#skip: *-*-pe *-*-wince
#name: ADDS relocations against local symbols for armv6s-m
.*: +file format .*arm.*

View file

@ -1,3 +1,3 @@
#name: Invalid Immediate field for flag-setting add,sub
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
#error-output: addsw-bad.l

View file

@ -1,7 +1,7 @@
# name: ARM V6t2 Alignment
# as: -march=armv6kt2
# objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,6 +1,6 @@
# name: 64 Bytes alignment test
# objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,7 +1,7 @@
#name: ARM V7 instructions
#as: -march=armv7r
#objdump: -dr --prefix-addresses --show-raw-insn
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#as: -march=armv7-a+mp
#objdump: -dr --prefix-addresses --show-raw-insn
#source: arch7ar-mp.s
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,7 +1,7 @@
# name: 32-bit Thumb DSP instructions
# as: -march=armv7e-m
# objdump: -dr --prefix-addresses --show-raw-insn
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#source: arch7em.s
#as: -march=armv8-m.main+dsp
#objdump: -dr --prefix-addresses --show-raw-insn
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,7 +1,7 @@
#name: ARM IT automatic instruction generation 2
#as: -mthumb -march=armv7a -mimplicit-it=always
#objdump: -d --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,7 +1,7 @@
#name: ARM IT automatic instruction generation 3
#as: -mthumb -march=armv7a -mimplicit-it=always
#objdump: -d --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,7 +1,7 @@
#name: ARM IT automatic instruction generation
#as: -mthumb -march=armv7 -mimplicit-it=always
#objdump: -d --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,4 +1,4 @@
#name: Test unclosed IT block validation.
#as: -march=armv7a
#skip: *-*-*aout* *-*-pe
#skip: *-*-pe
#error-output: arm-it-bad-2.l

View file

@ -1,6 +1,6 @@
#name: ARM IT instruction
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,6 +1,6 @@
#name: Valid v7e-m+fpv5-d16
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-pe *-wince-* *-*-coff
#skip: *-*-pe *-wince-*
.*: +file format .*arm.*

View file

@ -1,5 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-pe *-wince-* *-*-coff
#skip: *-*-pe *-wince-*
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#source: armv8-2-fp16-scalar.s
#objdump: -d
#as: -march=armv8.2-a+fp16 -mfpu=fp-armv8 -mthumb
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*
Disassembly of section .text:

View file

@ -2,7 +2,7 @@
#source: armv8-2-fp16-scalar.s
#objdump: -d
#as: -march=armv8.2-a+fp16 -mfpu=fp-armv8
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*
Disassembly of section .text:

View file

@ -2,7 +2,7 @@
#source: armv8-2-fp16-simd.s
#objdump: -d
#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8 -mthumb
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#source: armv8-2-fp16-simd.s
#objdump: -d
#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,6 +1,6 @@
#name: Valid v8-a+cryptov1
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#source: armv8-ar+fp.s
#as: -march=armv8-a
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#as: -march=armv8-a+ras
#source: armv8_2-a.s
#objdump: -dr
#skip: *-*-pe *-wince-* *-*-coff
#skip: *-*-pe *-wince-*
.*: +file format .*arm.*

View file

@ -1,6 +1,6 @@
#name: Accepted v8-a with ARMv8.1 AdvSIMD.
#as: -march=armv8-a+simd
#objdump: -dr
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
#source: armv8-a+rdma.s
#error-output: armv8-a+rdma.l

View file

@ -1,7 +1,7 @@
#name: Valid v8-a+rdma
#as: -march=armv8-a+rdma
#objdump: -dr
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
#source: armv8-a+rdma.s
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#source: armv8-ar+simd.s
#as: -march=armv8-a
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#as: -march=armv8-a -mthumb
#source: armv8-ar-barrier.s
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#source: armv8-ar+fp.s
#as: -march=armv8-r
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#source: armv8-ar+simd.s
#as: -march=armv8-r
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#as: -march=armv8-r -mthumb
#source: armv8-ar-barrier.s
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,7 +1,7 @@
#name: Valid ARMv8.1-A with +simd
#as: -march=armv8.1-a+simd
#objdump: -dr
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
#source: armv8-a+rdma.s
.*: +file format .*arm.*

View file

@ -1,7 +1,7 @@
#name: Valid ARMv8.2-A with ARMv8.1-A NEON instructions.
#as: -march=armv8.2-a -mfpu=neon-fp-armv8
#objdump: -dr
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
#source: armv8-a+rdma.s
.*: +file format .*arm.*

View file

@ -1,7 +1,7 @@
#name: ARMv8.2-A
#as: -march=armv8.2-a
#objdump: -dr
#skip: *-*-pe *-wince-* *-*-coff *-*-aout
#skip: *-*-pe *-wince-*
.*: +file format .*arm.*

View file

@ -1,6 +1,6 @@
#as: -march=armv8.3-a+fp
#objdump: -dr
#skip: *-*-pe *-wince-* *-*-coff
#skip: *-*-pe *-wince-*
.*: +file format .*arm.*

View file

@ -1,6 +1,6 @@
#as: -march=armv8.3-a+fp16+simd
#objdump: -dr
#skip: *-*-pe *-wince-* *-*-coff
#skip: *-*-pe *-wince-*
.*: +file format .*arm.*

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v8

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v8

View file

@ -1,4 +1,4 @@
#source: attr-syntax.s
#not-target: *-*-pe *-*-aout
#not-target: *-*-pe
#as:
#error: :1: Error: Attribute name not recognised: made_up_tag.*:3: Error: expected <tag> , <value>.*:5: Error: expected <tag> , <value>

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v8

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v8

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v8

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v7

View file

@ -1,6 +1,6 @@
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_arch: v6T2

View file

@ -1,5 +1,5 @@
#name: Bad barrier options (Thumb)
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
#source: barrier-bad.s
#as: -mthumb
#error-output: barrier-bad.l

View file

@ -1,3 +1,3 @@
#name: Bad barrier options (ARM)
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#skip: *-*-pe *-*-wince
#error-output: barrier-bad.l

View file

@ -3,7 +3,7 @@
#source: barrier.s
#as: -mcpu=cortex-a8 -mthumb
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#not-target: *-*-pe *-*-wince
# Test Barrier Instruction Operands

View file

@ -2,7 +2,7 @@
#name: Barrier Instruction Operands
#as: -mcpu=cortex-a8
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd
#not-target: *-*-pe *-*-wince
# Test Barrier Instruction Operands

View file

@ -2,7 +2,7 @@
# as:
# objdump: --full-contents
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -1,7 +1,7 @@
#objdump: -drw --show-raw-insn
#name: BLX encoding
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: file format .*arm.*

View file

@ -1,7 +1,7 @@
#name: blx->bl convert under no -march/cpu
#error-output: blx-bl-convert.l
#objdump: -d
#skip: *-*-pe *-wince-* *-*-coff *-*-vxworks *-*-netbsdelf *-*-nto*
#skip: *-*-pe *-wince-* *-*-vxworks *-*-netbsdelf *-*-nto*
.*: file format .*

View file

@ -1,5 +1,5 @@
# objdump: -fdrw --prefix-addresses --show-raw-insn
# not-target: *-*-*aout* *-*-pe
# not-target: *-*-pe
.text
.arch armv5t

View file

@ -3,7 +3,7 @@
#source: crc32-armv8-ar-bad.s
#as: -march=armv8-a+crc
#stderr: crc32-bad.l
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#name: ARMv8-A CRC32 instructions
#source: crc32-armv8-ar.s
#as: -march=armv8-a+crc
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: *file format .*arm.*

View file

@ -3,7 +3,7 @@
#source: crc32-armv8-ar-bad.s
#as: -march=armv8-r+crc
#stderr: crc32-bad.l
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: +file format .*arm.*

View file

@ -2,7 +2,7 @@
#name: ARMv8-R CRC32 instructions
#source: crc32-armv8-ar.s
#as: -march=armv8-r+crc
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
.*: *file format .*arm.*

View file

@ -1,5 +1,5 @@
# name: Data disassembler test (no symbols)
# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
# skip: *-*-pe *-*-wince
# objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*

View file

@ -1,5 +1,5 @@
# name: Data disassembler test (function symbol)
# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
# skip: *-*-pe *-*-wince
# objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*

View file

@ -1,5 +1,5 @@
# name: Data disassembler test (with mapping symbol)
# skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
# skip: *-*-pe *-*-wince
# objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*

View file

@ -1,7 +1,7 @@
# as: -meabi=4
# readelf: -A
# This test is only valid on ELF based ports.
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#not-target: *-*-pe *-*-wince
Attribute Section: aeabi
File Attributes
Tag_CPU_name: "ARM1136JF-S"

View file

@ -1,6 +1,6 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: PR5712 - saving FP registers
#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-riscix*
#not-target: *-*-pe *-*-wince
#as: -mfpu=fpa
.*: *file format .*arm.*

View file

@ -1,3 +1,3 @@
#name: Group relocation tests, encoding failures (alu)
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
#skip: *-*-pe *-*-wince *-*-vxworks
#error-output: group-reloc-alu-encoding-bad.l

View file

@ -1,3 +1,3 @@
#name: Group relocation tests, parsing failures (alu)
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#skip: *-*-pe *-*-wince
#error-output: group-reloc-alu-parsing-bad.l

View file

@ -1,5 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
#skip: *-*-pe *-*-wince *-*-vxworks
#name: Group relocation tests (alu)
.*: +file format .*arm.*

View file

@ -1,3 +1,3 @@
#name: Group relocation tests, encoding failures (ldc)
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
#skip: *-*-pe *-*-wince *-*-vxworks
#error-output: group-reloc-ldc-encoding-bad.l

View file

@ -1,3 +1,3 @@
#name: Group relocation tests, parsing failures (ldc)
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#skip: *-*-pe *-*-wince
#error-output: group-reloc-ldc-parsing-bad.l

View file

@ -1,5 +1,5 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
#skip: *-*-pe *-*-wince *-*-vxworks
#name: Group relocation tests (ldc)
.*: +file format .*arm.*

View file

@ -1,3 +1,3 @@
#name: Group relocation tests, encoding failures (ldr)
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
#skip: *-*-pe *-*-wince *-*-vxworks
#error-output: group-reloc-ldr-encoding-bad.l

View file

@ -1,3 +1,3 @@
#name: Group relocation tests, parsing failures (ldr)
#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
#skip: *-*-pe *-*-wince
#error-output: group-reloc-ldr-parsing-bad.l

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