FreeChainXenon/binutils-gdb
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

sim: arm/cr16/d10v/h8300/microblaze/sh: fill out sim-cpu pc fetch/store helpers

Browse source 
This makes the common sim-cpu logic work.
This commit is contained in:
Mike Frysinger 2015-04-17 02:16:10 -04:00
parent 0fdc66e16e
commit 27b97b40bc
13 changed files with 159 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

22
sim/d10v/interp.c
View file

@ -722,6 +722,18 @@ sim_read (SIM_DESC sd, SIM_ADDR addr, unsigned char *buffer, int size)
return xfer_mem( addr, buffer, size, 0);
}
static sim_cia
d10v_pc_get (sim_cpu *cpu)
{
return PC;
}
static void
d10v_pc_set (sim_cpu *cpu, sim_cia pc)
{
SET_PC (pc);
}
static void
free_state (SIM_DESC sd)
{
@ -740,6 +752,7 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv)
struct hash_entry *h;
static int init_p = 0;
char **p;
int i;
SIM_DESC sd = sim_state_alloc (kind, cb);
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
@ -791,6 +804,15 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv)
return 0;
}
/* CPU specific initialization. */
for (i = 0; i < MAX_NR_PROCESSORS; ++i)
{
SIM_CPU *cpu = STATE_CPU (sd, i);
CPU_PC_FETCH (cpu) = d10v_pc_get;
CPU_PC_STORE (cpu) = d10v_pc_set;
}
trace_sd = sd;
d10v_callback = cb;
old_segment_mapping = 0;