* config/tc-mips.c (load_delay_nop): New function.
(load_address, macro): Use load_delay_nop() to build a nop which can be omitted with gpr_interlocks. * gas/mips/lb-xgot-ilocks.d: Remove nops in load delay slot. * gas/mips/mips-abi32-pic.d: Likewise. * gas/mips/mips-abi32-pic2.d: Likewise. * gas/mips/mips-gp32-fp32-pic.d: Likewise. * gas/mips/mips-gp32-fp64-pic.d: Likewise. * gas/mips/mips-gp64-fp32-pic.d: Likewise. * gas/mips/mips-gp64-fp64-pic.d: Likewise. * gas/mips/relax-swap1-mips2.d: Likewise. * gas/mips/lb-svr4pic-ilocks.d: New test. * gas/mips/mips.exp: Run it.
This commit is contained in:
Thiemo Seufer
parent
24772049ed
commit
269137b29a
13 changed files with 936 additions and 870 deletions
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@ -1,3 +1,9 @@
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2004-04-22 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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* config/tc-mips.c (load_delay_nop): New function.
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(load_address, macro): Use load_delay_nop() to build a nop
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which can be omitted with gpr_interlocks.
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2004-04-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
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* config/tc-mips.c (hilo_interlocks, gpr_interlocks,
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@ -3783,6 +3783,13 @@ load_register (int reg, expressionS *ep, int dbl)
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macro_build (&lo32, "ori", "t,r,i", reg, freg, BFD_RELOC_LO16);
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}
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static inline void
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load_delay_nop (void)
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{
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if (!gpr_interlocks)
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macro_build (NULL, "nop", "");
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}
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/* Load an address into a register. */
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static void
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@ -3916,7 +3923,7 @@ load_address (int reg, expressionS *ep, int *used_at)
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ep->X_add_number = 0;
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macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg,
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BFD_RELOC_MIPS_GOT16, mips_gp_register);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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relax_start (ep->X_add_symbol);
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relax_switch ();
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macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg,
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@ -4001,7 +4008,7 @@ load_address (int reg, expressionS *ep, int *used_at)
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}
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macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg,
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BFD_RELOC_MIPS_GOT16, mips_gp_register);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg,
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BFD_RELOC_LO16);
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relax_end ();
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@ -5063,12 +5070,12 @@ macro (struct mips_cl_insn *ip)
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/* We're going to put in an addu instruction using
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tempreg, so we may as well insert the nop right
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now. */
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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}
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relax_switch ();
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macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)",
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tempreg, BFD_RELOC_MIPS_GOT16, mips_gp_register);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j",
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tempreg, tempreg, BFD_RELOC_LO16);
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relax_end ();
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@ -5080,7 +5087,7 @@ macro (struct mips_cl_insn *ip)
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&& offset_expr.X_add_number < 0x8000)
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{
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load_got_offset (tempreg, &offset_expr);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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add_got_offset (tempreg, &offset_expr);
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}
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else
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@ -5099,7 +5106,7 @@ macro (struct mips_cl_insn *ip)
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not using a base register. */
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if (breg == treg)
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{
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t",
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treg, AT, breg);
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breg = 0;
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@ -5282,13 +5289,13 @@ macro (struct mips_cl_insn *ip)
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/* We're going to put in an addu instruction using
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tempreg, so we may as well insert the nop right
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now. */
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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}
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}
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else if (expr1.X_add_number >= -0x8000
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&& expr1.X_add_number < 0x8000)
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{
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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macro_build (&expr1, ADDRESS_ADDI_INSN, "t,r,j",
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tempreg, tempreg, BFD_RELOC_LO16);
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}
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@ -5308,7 +5315,7 @@ macro (struct mips_cl_insn *ip)
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else
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{
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assert (tempreg == AT);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t",
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treg, AT, breg);
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dreg = treg;
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@ -5335,7 +5342,7 @@ macro (struct mips_cl_insn *ip)
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if (expr1.X_add_number >= -0x8000
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&& expr1.X_add_number < 0x8000)
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{
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j",
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tempreg, tempreg, BFD_RELOC_LO16);
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/* FIXME: If add_number is 0, and there was no base
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@ -5351,7 +5358,7 @@ macro (struct mips_cl_insn *ip)
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/* We must add in the base register now, as in the
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external symbol case. */
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assert (tempreg == AT);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t",
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treg, AT, breg);
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tempreg = treg;
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@ -5637,7 +5644,7 @@ macro (struct mips_cl_insn *ip)
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macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)",
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PIC_CALL_REG, BFD_RELOC_MIPS_CALL16,
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mips_gp_register);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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relax_switch ();
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}
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else
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@ -5652,7 +5659,7 @@ macro (struct mips_cl_insn *ip)
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macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)",
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PIC_CALL_REG, BFD_RELOC_MIPS_CALL_LO16,
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PIC_CALL_REG);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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relax_switch ();
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if (gpdelay)
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macro_build (NULL, "nop", "");
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@ -5660,7 +5667,7 @@ macro (struct mips_cl_insn *ip)
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macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)",
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PIC_CALL_REG, BFD_RELOC_MIPS_GOT16,
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mips_gp_register);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j",
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PIC_CALL_REG, PIC_CALL_REG, BFD_RELOC_LO16);
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relax_end ();
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@ -6160,7 +6167,7 @@ macro (struct mips_cl_insn *ip)
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as_bad (_("PIC code offset overflow (max 16 signed bits)"));
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macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg,
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lw_reloc_type, mips_gp_register);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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relax_start (offset_expr.X_add_symbol);
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relax_switch ();
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macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg,
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@ -6210,7 +6217,7 @@ macro (struct mips_cl_insn *ip)
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macro_build (NULL, "nop", "");
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macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg,
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BFD_RELOC_MIPS_GOT16, mips_gp_register);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg,
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tempreg, BFD_RELOC_LO16);
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relax_end ();
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@ -6685,7 +6692,7 @@ macro (struct mips_cl_insn *ip)
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|| expr1.X_add_number >= 0x8000 - 4)
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as_bad (_("PIC code offset overflow (max 16 signed bits)"));
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load_got_offset (AT, &offset_expr);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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if (breg != 0)
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macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT);
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@ -6744,7 +6751,7 @@ macro (struct mips_cl_insn *ip)
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AT, AT, mips_gp_register);
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macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)",
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AT, BFD_RELOC_MIPS_GOT_LO16, AT);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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if (breg != 0)
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macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT);
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/* Itbl support may require additional care here. */
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@ -6768,7 +6775,7 @@ macro (struct mips_cl_insn *ip)
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macro_build (NULL, "nop", "");
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macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT,
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BFD_RELOC_MIPS_GOT16, mips_gp_register);
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macro_build (NULL, "nop", "");
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load_delay_nop ();
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if (breg != 0)
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macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT);
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/* Itbl support may require additional care here. */
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@ -1,3 +1,16 @@
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2004-04-22 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
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* gas/mips/lb-xgot-ilocks.d: Remove nops in load delay slot.
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* gas/mips/mips-abi32-pic.d: Likewise.
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* gas/mips/mips-abi32-pic2.d: Likewise.
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* gas/mips/mips-gp32-fp32-pic.d: Likewise.
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* gas/mips/mips-gp32-fp64-pic.d: Likewise.
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* gas/mips/mips-gp64-fp32-pic.d: Likewise.
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* gas/mips/mips-gp64-fp64-pic.d: Likewise.
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* gas/mips/relax-swap1-mips2.d: Likewise.
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* gas/mips/lb-svr4pic-ilocks.d: New test.
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* gas/mips/mips.exp: Run it.
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2004-04-22 Paul Brook <paul@codesourcery.com>
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* maverick.c (off8s): Test full shifted operand range.
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154
gas/testsuite/gas/mips/lb-svr4pic-ilocks.d
Normal file
154
gas/testsuite/gas/mips/lb-svr4pic-ilocks.d
Normal file
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@ -0,0 +1,154 @@
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#objdump: -dr --prefix-addresses
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#name: MIPS lb-svr4pic-ilocks
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#as: -32 -KPIC
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#source: lb-pic.s
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# Test the lb macro with -KPIC.
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.*: +file format .*mips.*
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Disassembly of section .text:
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0+0000 <[^>]*> lb a0,0\(zero\)
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0+0004 <[^>]*> lb a0,1\(zero\)
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0+0008 <[^>]*> lui a0,0x1
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0+000c <[^>]*> lb a0,-32768\(a0\)
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0+0010 <[^>]*> lb a0,-32768\(zero\)
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0+0014 <[^>]*> lui a0,0x1
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0+0018 <[^>]*> lb a0,0\(a0\)
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0+001c <[^>]*> lui a0,0x2
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0+0020 <[^>]*> lb a0,-23131\(a0\)
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0+0024 <[^>]*> lb a0,0\(a1\)
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0+0028 <[^>]*> lb a0,1\(a1\)
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0+002c <[^>]*> lui a0,0x1
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0+0030 <[^>]*> addu a0,a0,a1
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0+0034 <[^>]*> lb a0,-32768\(a0\)
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0+0038 <[^>]*> lb a0,-32768\(a1\)
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0+003c <[^>]*> lui a0,0x1
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0+0040 <[^>]*> addu a0,a0,a1
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0+0044 <[^>]*> lb a0,0\(a0\)
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0+0048 <[^>]*> lui a0,0x2
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0+004c <[^>]*> addu a0,a0,a1
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0+0050 <[^>]*> lb a0,-23131\(a0\)
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0+0054 <[^>]*> lw a0,0\(gp\)
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[ ]*54: R_MIPS_GOT16 .data
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0+0058 <[^>]*> addiu a0,a0,0
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[ ]*58: R_MIPS_LO16 .data
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0+005c <[^>]*> lb a0,0\(a0\)
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0+0060 <[^>]*> lw a0,0\(gp\)
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[ ]*60: R_MIPS_GOT16 big_external_data_label
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0+0064 <[^>]*> lb a0,0\(a0\)
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0+0068 <[^>]*> lw a0,0\(gp\)
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[ ]*68: R_MIPS_GOT16 small_external_data_label
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0+006c <[^>]*> lb a0,0\(a0\)
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0+0070 <[^>]*> lw a0,0\(gp\)
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[ ]*70: R_MIPS_GOT16 big_external_common
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0+0074 <[^>]*> lb a0,0\(a0\)
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0+0078 <[^>]*> lw a0,0\(gp\)
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[ ]*78: R_MIPS_GOT16 small_external_common
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0+007c <[^>]*> lb a0,0\(a0\)
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0+0080 <[^>]*> lw a0,0\(gp\)
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[ ]*80: R_MIPS_GOT16 .bss
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0+0084 <[^>]*> addiu a0,a0,0
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[ ]*84: R_MIPS_LO16 .bss
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0+0088 <[^>]*> lb a0,0\(a0\)
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0+008c <[^>]*> lw a0,0\(gp\)
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[ ]*8c: R_MIPS_GOT16 .bss
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0+0090 <[^>]*> addiu a0,a0,1000
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[ ]*90: R_MIPS_LO16 .bss
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0+0094 <[^>]*> lb a0,0\(a0\)
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0+0098 <[^>]*> lw a0,0\(gp\)
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[ ]*98: R_MIPS_GOT16 .data
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0+009c <[^>]*> addiu a0,a0,0
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[ ]*9c: R_MIPS_LO16 .data
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0+00a0 <[^>]*> lb a0,1\(a0\)
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0+00a4 <[^>]*> lw a0,0\(gp\)
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[ ]*a4: R_MIPS_GOT16 big_external_data_label
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0+00a8 <[^>]*> lb a0,1\(a0\)
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0+00ac <[^>]*> lw a0,0\(gp\)
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[ ]*ac: R_MIPS_GOT16 small_external_data_label
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0+00b0 <[^>]*> lb a0,1\(a0\)
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0+00b4 <[^>]*> lw a0,0\(gp\)
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[ ]*b4: R_MIPS_GOT16 big_external_common
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0+00b8 <[^>]*> lb a0,1\(a0\)
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0+00bc <[^>]*> lw a0,0\(gp\)
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[ ]*bc: R_MIPS_GOT16 small_external_common
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0+00c0 <[^>]*> lb a0,1\(a0\)
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0+00c4 <[^>]*> lw a0,0\(gp\)
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[ ]*c4: R_MIPS_GOT16 .bss
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0+00c8 <[^>]*> addiu a0,a0,0
|
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[ ]*c8: R_MIPS_LO16 .bss
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0+00cc <[^>]*> lb a0,1\(a0\)
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0+00d0 <[^>]*> lw a0,0\(gp\)
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[ ]*d0: R_MIPS_GOT16 .bss
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0+00d4 <[^>]*> addiu a0,a0,1000
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[ ]*d4: R_MIPS_LO16 .bss
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0+00d8 <[^>]*> lb a0,1\(a0\)
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0+00dc <[^>]*> lw a0,0\(gp\)
|
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[ ]*dc: R_MIPS_GOT16 .data
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0+00e0 <[^>]*> addiu a0,a0,0
|
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[ ]*e0: R_MIPS_LO16 .data
|
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0+00e4 <[^>]*> addu a0,a0,a1
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0+00e8 <[^>]*> lb a0,0\(a0\)
|
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0+00ec <[^>]*> lw a0,0\(gp\)
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[ ]*ec: R_MIPS_GOT16 big_external_data_label
|
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0+00f0 <[^>]*> addu a0,a0,a1
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0+00f4 <[^>]*> lb a0,0\(a0\)
|
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0+00f8 <[^>]*> lw a0,0\(gp\)
|
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[ ]*f8: R_MIPS_GOT16 small_external_data_label
|
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0+00fc <[^>]*> addu a0,a0,a1
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0+0100 <[^>]*> lb a0,0\(a0\)
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0+0104 <[^>]*> lw a0,0\(gp\)
|
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[ ]*104: R_MIPS_GOT16 big_external_common
|
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0+0108 <[^>]*> addu a0,a0,a1
|
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0+010c <[^>]*> lb a0,0\(a0\)
|
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0+0110 <[^>]*> lw a0,0\(gp\)
|
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[ ]*110: R_MIPS_GOT16 small_external_common
|
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0+0114 <[^>]*> addu a0,a0,a1
|
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0+0118 <[^>]*> lb a0,0\(a0\)
|
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0+011c <[^>]*> lw a0,0\(gp\)
|
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[ ]*11c: R_MIPS_GOT16 .bss
|
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0+0120 <[^>]*> addiu a0,a0,0
|
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[ ]*120: R_MIPS_LO16 .bss
|
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0+0124 <[^>]*> addu a0,a0,a1
|
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0+0128 <[^>]*> lb a0,0\(a0\)
|
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0+012c <[^>]*> lw a0,0\(gp\)
|
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[ ]*12c: R_MIPS_GOT16 .bss
|
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0+0130 <[^>]*> addiu a0,a0,1000
|
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[ ]*130: R_MIPS_LO16 .bss
|
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0+0134 <[^>]*> addu a0,a0,a1
|
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0+0138 <[^>]*> lb a0,0\(a0\)
|
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0+013c <[^>]*> lw a0,0\(gp\)
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[ ]*13c: R_MIPS_GOT16 .data
|
||||
0+0140 <[^>]*> addiu a0,a0,0
|
||||
[ ]*140: R_MIPS_LO16 .data
|
||||
0+0144 <[^>]*> addu a0,a0,a1
|
||||
0+0148 <[^>]*> lb a0,1\(a0\)
|
||||
0+014c <[^>]*> lw a0,0\(gp\)
|
||||
[ ]*14c: R_MIPS_GOT16 big_external_data_label
|
||||
0+0150 <[^>]*> addu a0,a0,a1
|
||||
0+0154 <[^>]*> lb a0,1\(a0\)
|
||||
0+0158 <[^>]*> lw a0,0\(gp\)
|
||||
[ ]*158: R_MIPS_GOT16 small_external_data_label
|
||||
0+015c <[^>]*> addu a0,a0,a1
|
||||
0+0160 <[^>]*> lb a0,1\(a0\)
|
||||
0+0164 <[^>]*> lw a0,0\(gp\)
|
||||
[ ]*164: R_MIPS_GOT16 big_external_common
|
||||
0+0168 <[^>]*> addu a0,a0,a1
|
||||
0+016c <[^>]*> lb a0,1\(a0\)
|
||||
0+0170 <[^>]*> lw a0,0\(gp\)
|
||||
[ ]*170: R_MIPS_GOT16 small_external_common
|
||||
0+0174 <[^>]*> addu a0,a0,a1
|
||||
0+0178 <[^>]*> lb a0,1\(a0\)
|
||||
0+017c <[^>]*> lw a0,0\(gp\)
|
||||
[ ]*17c: R_MIPS_GOT16 .bss
|
||||
0+0180 <[^>]*> addiu a0,a0,0
|
||||
[ ]*180: R_MIPS_LO16 .bss
|
||||
0+0184 <[^>]*> addu a0,a0,a1
|
||||
0+0188 <[^>]*> lb a0,1\(a0\)
|
||||
0+018c <[^>]*> lw a0,0\(gp\)
|
||||
[ ]*18c: R_MIPS_GOT16 .bss
|
||||
0+0190 <[^>]*> addiu a0,a0,1000
|
||||
[ ]*190: R_MIPS_LO16 .bss
|
||||
0+0194 <[^>]*> addu a0,a0,a1
|
||||
0+0198 <[^>]*> lb a0,1\(a0\)
|
||||
0+019c <[^>]*> nop
|
||||
|
|
@ -31,184 +31,172 @@ Disassembly of section \.text:
|
|||
0+0050 <.*> lb a0,-23131\(a0\)
|
||||
0+0054 <.*> lw a0,0\(gp\)
|
||||
54: R_MIPS_GOT16 \.data
|
||||
0+0058 <.*> nop
|
||||
0+005c <.*> addiu a0,a0,0
|
||||
5c: R_MIPS_LO16 \.data
|
||||
0+0060 <.*> lb a0,0\(a0\)
|
||||
0+0064 <.*> lui a0,0x0
|
||||
64: R_MIPS_GOT_HI16 big_external_data_label
|
||||
0+0068 <.*> addu a0,a0,gp
|
||||
0+006c <.*> lw a0,0\(a0\)
|
||||
6c: R_MIPS_GOT_LO16 big_external_data_label
|
||||
0+0070 <.*> lb a0,0\(a0\)
|
||||
0+0074 <.*> lui a0,0x0
|
||||
74: R_MIPS_GOT_HI16 small_external_data_label
|
||||
0+0078 <.*> addu a0,a0,gp
|
||||
0+007c <.*> lw a0,0\(a0\)
|
||||
7c: R_MIPS_GOT_LO16 small_external_data_label
|
||||
0+0080 <.*> lb a0,0\(a0\)
|
||||
0+0084 <.*> lui a0,0x0
|
||||
84: R_MIPS_GOT_HI16 big_external_common
|
||||
0+0088 <.*> addu a0,a0,gp
|
||||
0+008c <.*> lw a0,0\(a0\)
|
||||
8c: R_MIPS_GOT_LO16 big_external_common
|
||||
0+0090 <.*> lb a0,0\(a0\)
|
||||
0+0094 <.*> lui a0,0x0
|
||||
94: R_MIPS_GOT_HI16 small_external_common
|
||||
0+0098 <.*> addu a0,a0,gp
|
||||
0+009c <.*> lw a0,0\(a0\)
|
||||
9c: R_MIPS_GOT_LO16 small_external_common
|
||||
0+00a0 <.*> lb a0,0\(a0\)
|
||||
0+00a4 <.*> lw a0,0\(gp\)
|
||||
a4: R_MIPS_GOT16 \.bss
|
||||
0+00a8 <.*> nop
|
||||
0+00ac <.*> addiu a0,a0,0
|
||||
ac: R_MIPS_LO16 \.bss
|
||||
0+00b0 <.*> lb a0,0\(a0\)
|
||||
0+00b4 <.*> lw a0,0\(gp\)
|
||||
b4: R_MIPS_GOT16 \.bss
|
||||
0+00b8 <.*> nop
|
||||
0+00bc <.*> addiu a0,a0,1000
|
||||
bc: R_MIPS_LO16 \.bss
|
||||
0+00c0 <.*> lb a0,0\(a0\)
|
||||
0+00c4 <.*> lw a0,0\(gp\)
|
||||
c4: R_MIPS_GOT16 \.data
|
||||
0+00c8 <.*> nop
|
||||
0+00cc <.*> addiu a0,a0,0
|
||||
cc: R_MIPS_LO16 \.data
|
||||
0+0058 <.*> addiu a0,a0,0
|
||||
58: R_MIPS_LO16 \.data
|
||||
0+005c <.*> lb a0,0\(a0\)
|
||||
0+0060 <.*> lui a0,0x0
|
||||
60: R_MIPS_GOT_HI16 big_external_data_label
|
||||
0+0064 <.*> addu a0,a0,gp
|
||||
0+0068 <.*> lw a0,0\(a0\)
|
||||
68: R_MIPS_GOT_LO16 big_external_data_label
|
||||
0+006c <.*> lb a0,0\(a0\)
|
||||
0+0070 <.*> lui a0,0x0
|
||||
70: R_MIPS_GOT_HI16 small_external_data_label
|
||||
0+0074 <.*> addu a0,a0,gp
|
||||
0+0078 <.*> lw a0,0\(a0\)
|
||||
78: R_MIPS_GOT_LO16 small_external_data_label
|
||||
0+007c <.*> lb a0,0\(a0\)
|
||||
0+0080 <.*> lui a0,0x0
|
||||
80: R_MIPS_GOT_HI16 big_external_common
|
||||
0+0084 <.*> addu a0,a0,gp
|
||||
0+0088 <.*> lw a0,0\(a0\)
|
||||
88: R_MIPS_GOT_LO16 big_external_common
|
||||
0+008c <.*> lb a0,0\(a0\)
|
||||
0+0090 <.*> lui a0,0x0
|
||||
90: R_MIPS_GOT_HI16 small_external_common
|
||||
0+0094 <.*> addu a0,a0,gp
|
||||
0+0098 <.*> lw a0,0\(a0\)
|
||||
98: R_MIPS_GOT_LO16 small_external_common
|
||||
0+009c <.*> lb a0,0\(a0\)
|
||||
0+00a0 <.*> lw a0,0\(gp\)
|
||||
a0: R_MIPS_GOT16 \.bss
|
||||
0+00a4 <.*> addiu a0,a0,0
|
||||
a4: R_MIPS_LO16 \.bss
|
||||
0+00a8 <.*> lb a0,0\(a0\)
|
||||
0+00ac <.*> lw a0,0\(gp\)
|
||||
ac: R_MIPS_GOT16 \.bss
|
||||
0+00b0 <.*> addiu a0,a0,1000
|
||||
b0: R_MIPS_LO16 \.bss
|
||||
0+00b4 <.*> lb a0,0\(a0\)
|
||||
0+00b8 <.*> lw a0,0\(gp\)
|
||||
b8: R_MIPS_GOT16 \.data
|
||||
0+00bc <.*> addiu a0,a0,0
|
||||
bc: R_MIPS_LO16 \.data
|
||||
0+00c0 <.*> lb a0,1\(a0\)
|
||||
0+00c4 <.*> lui a0,0x0
|
||||
c4: R_MIPS_GOT_HI16 big_external_data_label
|
||||
0+00c8 <.*> addu a0,a0,gp
|
||||
0+00cc <.*> lw a0,0\(a0\)
|
||||
cc: R_MIPS_GOT_LO16 big_external_data_label
|
||||
0+00d0 <.*> lb a0,1\(a0\)
|
||||
0+00d4 <.*> lui a0,0x0
|
||||
d4: R_MIPS_GOT_HI16 big_external_data_label
|
||||
d4: R_MIPS_GOT_HI16 small_external_data_label
|
||||
0+00d8 <.*> addu a0,a0,gp
|
||||
0+00dc <.*> lw a0,0\(a0\)
|
||||
dc: R_MIPS_GOT_LO16 big_external_data_label
|
||||
dc: R_MIPS_GOT_LO16 small_external_data_label
|
||||
0+00e0 <.*> lb a0,1\(a0\)
|
||||
0+00e4 <.*> lui a0,0x0
|
||||
e4: R_MIPS_GOT_HI16 small_external_data_label
|
||||
e4: R_MIPS_GOT_HI16 big_external_common
|
||||
0+00e8 <.*> addu a0,a0,gp
|
||||
0+00ec <.*> lw a0,0\(a0\)
|
||||
ec: R_MIPS_GOT_LO16 small_external_data_label
|
||||
ec: R_MIPS_GOT_LO16 big_external_common
|
||||
0+00f0 <.*> lb a0,1\(a0\)
|
||||
0+00f4 <.*> lui a0,0x0
|
||||
f4: R_MIPS_GOT_HI16 big_external_common
|
||||
f4: R_MIPS_GOT_HI16 small_external_common
|
||||
0+00f8 <.*> addu a0,a0,gp
|
||||
0+00fc <.*> lw a0,0\(a0\)
|
||||
fc: R_MIPS_GOT_LO16 big_external_common
|
||||
fc: R_MIPS_GOT_LO16 small_external_common
|
||||
0+0100 <.*> lb a0,1\(a0\)
|
||||
0+0104 <.*> lui a0,0x0
|
||||
104: R_MIPS_GOT_HI16 small_external_common
|
||||
0+0108 <.*> addu a0,a0,gp
|
||||
0+010c <.*> lw a0,0\(a0\)
|
||||
10c: R_MIPS_GOT_LO16 small_external_common
|
||||
0+0110 <.*> lb a0,1\(a0\)
|
||||
0+0114 <.*> lw a0,0\(gp\)
|
||||
114: R_MIPS_GOT16 \.bss
|
||||
0+0118 <.*> nop
|
||||
0+011c <.*> addiu a0,a0,0
|
||||
11c: R_MIPS_LO16 \.bss
|
||||
0+0120 <.*> lb a0,1\(a0\)
|
||||
0+0124 <.*> lw a0,0\(gp\)
|
||||
124: R_MIPS_GOT16 \.bss
|
||||
0+0128 <.*> nop
|
||||
0+012c <.*> addiu a0,a0,1000
|
||||
12c: R_MIPS_LO16 \.bss
|
||||
0+0130 <.*> lb a0,1\(a0\)
|
||||
0+0134 <.*> lw a0,0\(gp\)
|
||||
134: R_MIPS_GOT16 \.data
|
||||
0+0138 <.*> nop
|
||||
0+013c <.*> addiu a0,a0,0
|
||||
13c: R_MIPS_LO16 \.data
|
||||
0+0140 <.*> addu a0,a0,a1
|
||||
0+0144 <.*> lb a0,0\(a0\)
|
||||
0+0148 <.*> lui a0,0x0
|
||||
148: R_MIPS_GOT_HI16 big_external_data_label
|
||||
0+014c <.*> addu a0,a0,gp
|
||||
0+0150 <.*> lw a0,0\(a0\)
|
||||
150: R_MIPS_GOT_LO16 big_external_data_label
|
||||
0+0154 <.*> addu a0,a0,a1
|
||||
0+0158 <.*> lb a0,0\(a0\)
|
||||
0+015c <.*> lui a0,0x0
|
||||
15c: R_MIPS_GOT_HI16 small_external_data_label
|
||||
0+0160 <.*> addu a0,a0,gp
|
||||
0+0164 <.*> lw a0,0\(a0\)
|
||||
164: R_MIPS_GOT_LO16 small_external_data_label
|
||||
0+0168 <.*> addu a0,a0,a1
|
||||
0+016c <.*> lb a0,0\(a0\)
|
||||
0+0170 <.*> lui a0,0x0
|
||||
170: R_MIPS_GOT_HI16 big_external_common
|
||||
0+0174 <.*> addu a0,a0,gp
|
||||
0+0178 <.*> lw a0,0\(a0\)
|
||||
178: R_MIPS_GOT_LO16 big_external_common
|
||||
0+017c <.*> addu a0,a0,a1
|
||||
0+0180 <.*> lb a0,0\(a0\)
|
||||
0+0184 <.*> lui a0,0x0
|
||||
184: R_MIPS_GOT_HI16 small_external_common
|
||||
0+0188 <.*> addu a0,a0,gp
|
||||
0+018c <.*> lw a0,0\(a0\)
|
||||
18c: R_MIPS_GOT_LO16 small_external_common
|
||||
0+0190 <.*> addu a0,a0,a1
|
||||
0+0194 <.*> lb a0,0\(a0\)
|
||||
0+0198 <.*> lw a0,0\(gp\)
|
||||
198: R_MIPS_GOT16 \.bss
|
||||
0+019c <.*> nop
|
||||
0+0104 <.*> lw a0,0\(gp\)
|
||||
104: R_MIPS_GOT16 \.bss
|
||||
0+0108 <.*> addiu a0,a0,0
|
||||
108: R_MIPS_LO16 \.bss
|
||||
0+010c <.*> lb a0,1\(a0\)
|
||||
0+0110 <.*> lw a0,0\(gp\)
|
||||
110: R_MIPS_GOT16 \.bss
|
||||
0+0114 <.*> addiu a0,a0,1000
|
||||
114: R_MIPS_LO16 \.bss
|
||||
0+0118 <.*> lb a0,1\(a0\)
|
||||
0+011c <.*> lw a0,0\(gp\)
|
||||
11c: R_MIPS_GOT16 \.data
|
||||
0+0120 <.*> addiu a0,a0,0
|
||||
120: R_MIPS_LO16 \.data
|
||||
0+0124 <.*> addu a0,a0,a1
|
||||
0+0128 <.*> lb a0,0\(a0\)
|
||||
0+012c <.*> lui a0,0x0
|
||||
12c: R_MIPS_GOT_HI16 big_external_data_label
|
||||
0+0130 <.*> addu a0,a0,gp
|
||||
0+0134 <.*> lw a0,0\(a0\)
|
||||
134: R_MIPS_GOT_LO16 big_external_data_label
|
||||
0+0138 <.*> addu a0,a0,a1
|
||||
0+013c <.*> lb a0,0\(a0\)
|
||||
0+0140 <.*> lui a0,0x0
|
||||
140: R_MIPS_GOT_HI16 small_external_data_label
|
||||
0+0144 <.*> addu a0,a0,gp
|
||||
0+0148 <.*> lw a0,0\(a0\)
|
||||
148: R_MIPS_GOT_LO16 small_external_data_label
|
||||
0+014c <.*> addu a0,a0,a1
|
||||
0+0150 <.*> lb a0,0\(a0\)
|
||||
0+0154 <.*> lui a0,0x0
|
||||
154: R_MIPS_GOT_HI16 big_external_common
|
||||
0+0158 <.*> addu a0,a0,gp
|
||||
0+015c <.*> lw a0,0\(a0\)
|
||||
15c: R_MIPS_GOT_LO16 big_external_common
|
||||
0+0160 <.*> addu a0,a0,a1
|
||||
0+0164 <.*> lb a0,0\(a0\)
|
||||
0+0168 <.*> lui a0,0x0
|
||||
168: R_MIPS_GOT_HI16 small_external_common
|
||||
0+016c <.*> addu a0,a0,gp
|
||||
0+0170 <.*> lw a0,0\(a0\)
|
||||
170: R_MIPS_GOT_LO16 small_external_common
|
||||
0+0174 <.*> addu a0,a0,a1
|
||||
0+0178 <.*> lb a0,0\(a0\)
|
||||
0+017c <.*> lw a0,0\(gp\)
|
||||
17c: R_MIPS_GOT16 \.bss
|
||||
0+0180 <.*> addiu a0,a0,0
|
||||
180: R_MIPS_LO16 \.bss
|
||||
0+0184 <.*> addu a0,a0,a1
|
||||
0+0188 <.*> lb a0,0\(a0\)
|
||||
0+018c <.*> lw a0,0\(gp\)
|
||||
18c: R_MIPS_GOT16 \.bss
|
||||
0+0190 <.*> addiu a0,a0,1000
|
||||
190: R_MIPS_LO16 \.bss
|
||||
0+0194 <.*> addu a0,a0,a1
|
||||
0+0198 <.*> lb a0,0\(a0\)
|
||||
0+019c <.*> lw a0,0\(gp\)
|
||||
19c: R_MIPS_GOT16 \.data
|
||||
0+01a0 <.*> addiu a0,a0,0
|
||||
1a0: R_MIPS_LO16 \.bss
|
||||
1a0: R_MIPS_LO16 \.data
|
||||
0+01a4 <.*> addu a0,a0,a1
|
||||
0+01a8 <.*> lb a0,0\(a0\)
|
||||
0+01ac <.*> lw a0,0\(gp\)
|
||||
1ac: R_MIPS_GOT16 \.bss
|
||||
0+01b0 <.*> nop
|
||||
0+01b4 <.*> addiu a0,a0,1000
|
||||
1b4: R_MIPS_LO16 \.bss
|
||||
0+01a8 <.*> lb a0,1\(a0\)
|
||||
0+01ac <.*> lui a0,0x0
|
||||
1ac: R_MIPS_GOT_HI16 big_external_data_label
|
||||
0+01b0 <.*> addu a0,a0,gp
|
||||
0+01b4 <.*> lw a0,0\(a0\)
|
||||
1b4: R_MIPS_GOT_LO16 big_external_data_label
|
||||
0+01b8 <.*> addu a0,a0,a1
|
||||
0+01bc <.*> lb a0,0\(a0\)
|
||||
0+01c0 <.*> lw a0,0\(gp\)
|
||||
1c0: R_MIPS_GOT16 \.data
|
||||
0+01c4 <.*> nop
|
||||
0+01c8 <.*> addiu a0,a0,0
|
||||
1c8: R_MIPS_LO16 \.data
|
||||
0+01bc <.*> lb a0,1\(a0\)
|
||||
0+01c0 <.*> lui a0,0x0
|
||||
1c0: R_MIPS_GOT_HI16 small_external_data_label
|
||||
0+01c4 <.*> addu a0,a0,gp
|
||||
0+01c8 <.*> lw a0,0\(a0\)
|
||||
1c8: R_MIPS_GOT_LO16 small_external_data_label
|
||||
0+01cc <.*> addu a0,a0,a1
|
||||
0+01d0 <.*> lb a0,1\(a0\)
|
||||
0+01d4 <.*> lui a0,0x0
|
||||
1d4: R_MIPS_GOT_HI16 big_external_data_label
|
||||
1d4: R_MIPS_GOT_HI16 big_external_common
|
||||
0+01d8 <.*> addu a0,a0,gp
|
||||
0+01dc <.*> lw a0,0\(a0\)
|
||||
1dc: R_MIPS_GOT_LO16 big_external_data_label
|
||||
1dc: R_MIPS_GOT_LO16 big_external_common
|
||||
0+01e0 <.*> addu a0,a0,a1
|
||||
0+01e4 <.*> lb a0,1\(a0\)
|
||||
0+01e8 <.*> lui a0,0x0
|
||||
1e8: R_MIPS_GOT_HI16 small_external_data_label
|
||||
1e8: R_MIPS_GOT_HI16 small_external_common
|
||||
0+01ec <.*> addu a0,a0,gp
|
||||
0+01f0 <.*> lw a0,0\(a0\)
|
||||
1f0: R_MIPS_GOT_LO16 small_external_data_label
|
||||
1f0: R_MIPS_GOT_LO16 small_external_common
|
||||
0+01f4 <.*> addu a0,a0,a1
|
||||
0+01f8 <.*> lb a0,1\(a0\)
|
||||
0+01fc <.*> lui a0,0x0
|
||||
1fc: R_MIPS_GOT_HI16 big_external_common
|
||||
0+0200 <.*> addu a0,a0,gp
|
||||
0+0204 <.*> lw a0,0\(a0\)
|
||||
204: R_MIPS_GOT_LO16 big_external_common
|
||||
0+0208 <.*> addu a0,a0,a1
|
||||
0+020c <.*> lb a0,1\(a0\)
|
||||
0+0210 <.*> lui a0,0x0
|
||||
210: R_MIPS_GOT_HI16 small_external_common
|
||||
0+0214 <.*> addu a0,a0,gp
|
||||
0+0218 <.*> lw a0,0\(a0\)
|
||||
218: R_MIPS_GOT_LO16 small_external_common
|
||||
0+021c <.*> addu a0,a0,a1
|
||||
0+0220 <.*> lb a0,1\(a0\)
|
||||
0+0224 <.*> lw a0,0\(gp\)
|
||||
224: R_MIPS_GOT16 \.bss
|
||||
0+0228 <.*> nop
|
||||
0+022c <.*> addiu a0,a0,0
|
||||
22c: R_MIPS_LO16 \.bss
|
||||
0+0230 <.*> addu a0,a0,a1
|
||||
0+0234 <.*> lb a0,1\(a0\)
|
||||
0+0238 <.*> lw a0,0\(gp\)
|
||||
238: R_MIPS_GOT16 \.bss
|
||||
0+023c <.*> nop
|
||||
0+0240 <.*> addiu a0,a0,1000
|
||||
240: R_MIPS_LO16 \.bss
|
||||
0+0244 <.*> addu a0,a0,a1
|
||||
0+0248 <.*> lb a0,1\(a0\)
|
||||
0+024c <.*> nop
|
||||
0+01fc <.*> lw a0,0\(gp\)
|
||||
1fc: R_MIPS_GOT16 \.bss
|
||||
0+0200 <.*> addiu a0,a0,0
|
||||
200: R_MIPS_LO16 \.bss
|
||||
0+0204 <.*> addu a0,a0,a1
|
||||
0+0208 <.*> lb a0,1\(a0\)
|
||||
0+020c <.*> lw a0,0\(gp\)
|
||||
20c: R_MIPS_GOT16 \.bss
|
||||
0+0210 <.*> addiu a0,a0,1000
|
||||
210: R_MIPS_LO16 \.bss
|
||||
0+0214 <.*> addu a0,a0,a1
|
||||
0+0218 <.*> lb a0,1\(a0\)
|
||||
0+021c <.*> nop
|
||||
|
|
|
|||
|
|
@ -15,103 +15,85 @@ Disassembly of section .text:
|
|||
14: 3c041234 lui a0,0x1234
|
||||
18: 34845678 ori a0,a0,0x5678
|
||||
1c: 8f840000 lw a0,0\(gp\)
|
||||
20: 00000000 nop
|
||||
24: 24840000 addiu a0,a0,0
|
||||
28: 8f840000 lw a0,0\(gp\)
|
||||
2c: 00000000 nop
|
||||
30: 24840000 addiu a0,a0,0
|
||||
34: 8f840000 lw a0,0\(gp\)
|
||||
20: 24840000 addiu a0,a0,0
|
||||
24: 8f840000 lw a0,0\(gp\)
|
||||
28: 24840000 addiu a0,a0,0
|
||||
2c: 8f840000 lw a0,0\(gp\)
|
||||
30: 2484015c addiu a0,a0,348
|
||||
34: 10000049 b 15c <[^>]*>
|
||||
38: 00000000 nop
|
||||
3c: 248401a4 addiu a0,a0,420
|
||||
40: 10000058 b 1a4 <[^>]*>
|
||||
44: 00000000 nop
|
||||
48: 8f990000 lw t9,0\(gp\)
|
||||
4c: 00000000 nop
|
||||
50: 273901a4 addiu t9,t9,420
|
||||
54: 0320f809 jalr t9
|
||||
58: 00000000 nop
|
||||
5c: 8fbc0008 lw gp,8\(sp\)
|
||||
60: 8f840000 lw a0,0\(gp\)
|
||||
64: 00000000 nop
|
||||
68: 24840000 addiu a0,a0,0
|
||||
6c: 8c840000 lw a0,0\(a0\)
|
||||
70: 8f840000 lw a0,0\(gp\)
|
||||
74: 00000000 nop
|
||||
78: 24840000 addiu a0,a0,0
|
||||
7c: 8c840000 lw a0,0\(a0\)
|
||||
80: 8f840000 lw a0,0\(gp\)
|
||||
84: 00000000 nop
|
||||
88: 248401a4 addiu a0,a0,420
|
||||
8c: 8c840000 lw a0,0\(a0\)
|
||||
90: 8f810000 lw at,0\(gp\)
|
||||
94: 00000000 nop
|
||||
98: 8c240000 lw a0,0\(at\)
|
||||
9c: 8c250004 lw a1,4\(at\)
|
||||
a0: 8f810000 lw at,0\(gp\)
|
||||
a4: 00000000 nop
|
||||
a8: 8c240000 lw a0,0\(at\)
|
||||
ac: 8c250004 lw a1,4\(at\)
|
||||
3c: 8f990000 lw t9,0\(gp\)
|
||||
40: 2739015c addiu t9,t9,348
|
||||
44: 0320f809 jalr t9
|
||||
48: 00000000 nop
|
||||
4c: 8fbc0008 lw gp,8\(sp\)
|
||||
50: 8f840000 lw a0,0\(gp\)
|
||||
54: 24840000 addiu a0,a0,0
|
||||
58: 8c840000 lw a0,0\(a0\)
|
||||
5c: 8f840000 lw a0,0\(gp\)
|
||||
60: 24840000 addiu a0,a0,0
|
||||
64: 8c840000 lw a0,0\(a0\)
|
||||
68: 8f840000 lw a0,0\(gp\)
|
||||
6c: 2484015c addiu a0,a0,348
|
||||
70: 8c840000 lw a0,0\(a0\)
|
||||
74: 8f810000 lw at,0\(gp\)
|
||||
78: 8c240000 lw a0,0\(at\)
|
||||
7c: 8c250004 lw a1,4\(at\)
|
||||
80: 8f810000 lw at,0\(gp\)
|
||||
84: 8c240000 lw a0,0\(at\)
|
||||
88: 8c250004 lw a1,4\(at\)
|
||||
8c: 8f810000 lw at,0\(gp\)
|
||||
90: 8c24015c lw a0,348\(at\)
|
||||
94: 8c250160 lw a1,352\(at\)
|
||||
98: 8f810000 lw at,0\(gp\)
|
||||
9c: 24210000 addiu at,at,0
|
||||
a0: ac240000 sw a0,0\(at\)
|
||||
a4: 8f810000 lw at,0\(gp\)
|
||||
a8: 24210000 addiu at,at,0
|
||||
ac: ac240000 sw a0,0\(at\)
|
||||
b0: 8f810000 lw at,0\(gp\)
|
||||
b4: 00000000 nop
|
||||
b8: 8c2401a4 lw a0,420\(at\)
|
||||
bc: 8c2501a8 lw a1,424\(at\)
|
||||
c0: 8f810000 lw at,0\(gp\)
|
||||
c4: 00000000 nop
|
||||
c8: 24210000 addiu at,at,0
|
||||
cc: ac240000 sw a0,0\(at\)
|
||||
d0: 8f810000 lw at,0\(gp\)
|
||||
d4: 00000000 nop
|
||||
d8: 24210000 addiu at,at,0
|
||||
dc: ac240000 sw a0,0\(at\)
|
||||
b4: ac240000 sw a0,0\(at\)
|
||||
b8: ac250004 sw a1,4\(at\)
|
||||
bc: 8f810000 lw at,0\(gp\)
|
||||
c0: ac240000 sw a0,0\(at\)
|
||||
c4: ac250004 sw a1,4\(at\)
|
||||
c8: 8f810000 lw at,0\(gp\)
|
||||
cc: 24210000 addiu at,at,0
|
||||
d0: 80240000 lb a0,0\(at\)
|
||||
d4: 90210001 lbu at,1\(at\)
|
||||
d8: 00042200 sll a0,a0,0x8
|
||||
dc: 00812025 or a0,a0,at
|
||||
e0: 8f810000 lw at,0\(gp\)
|
||||
e4: 00000000 nop
|
||||
e8: ac240000 sw a0,0\(at\)
|
||||
ec: ac250004 sw a1,4\(at\)
|
||||
f0: 8f810000 lw at,0\(gp\)
|
||||
f4: 00000000 nop
|
||||
f8: ac240000 sw a0,0\(at\)
|
||||
fc: ac250004 sw a1,4\(at\)
|
||||
e4: 24210000 addiu at,at,0
|
||||
e8: a0240001 sb a0,1\(at\)
|
||||
ec: 00042202 srl a0,a0,0x8
|
||||
f0: a0240000 sb a0,0\(at\)
|
||||
f4: 90210001 lbu at,1\(at\)
|
||||
f8: 00042200 sll a0,a0,0x8
|
||||
fc: 00812025 or a0,a0,at
|
||||
100: 8f810000 lw at,0\(gp\)
|
||||
104: 00000000 nop
|
||||
108: 24210000 addiu at,at,0
|
||||
10c: 80240000 lb a0,0\(at\)
|
||||
110: 90210001 lbu at,1\(at\)
|
||||
114: 00042200 sll a0,a0,0x8
|
||||
118: 00812025 or a0,a0,at
|
||||
11c: 8f810000 lw at,0\(gp\)
|
||||
120: 00000000 nop
|
||||
124: 24210000 addiu at,at,0
|
||||
128: a0240001 sb a0,1\(at\)
|
||||
12c: 00042202 srl a0,a0,0x8
|
||||
130: a0240000 sb a0,0\(at\)
|
||||
134: 90210001 lbu at,1\(at\)
|
||||
138: 00042200 sll a0,a0,0x8
|
||||
13c: 00812025 or a0,a0,at
|
||||
104: 24210000 addiu at,at,0
|
||||
108: 88240000 lwl a0,0\(at\)
|
||||
10c: 98240003 lwr a0,3\(at\)
|
||||
110: 8f810000 lw at,0\(gp\)
|
||||
114: 24210000 addiu at,at,0
|
||||
118: a8240000 swl a0,0\(at\)
|
||||
11c: b8240003 swr a0,3\(at\)
|
||||
120: 3c043ff0 lui a0,0x3ff0
|
||||
124: 00002821 move a1,zero
|
||||
128: 8f810000 lw at,0\(gp\)
|
||||
12c: 8c240000 lw a0,0\(at\)
|
||||
130: 8c250004 lw a1,4\(at\)
|
||||
134: 3c013ff0 lui at,0x3ff0
|
||||
138: 44810800 mtc1 at,\$f1
|
||||
13c: 44800000 mtc1 zero,\$f0
|
||||
140: 8f810000 lw at,0\(gp\)
|
||||
144: 00000000 nop
|
||||
148: 24210000 addiu at,at,0
|
||||
14c: 88240000 lwl a0,0\(at\)
|
||||
150: 98240003 lwr a0,3\(at\)
|
||||
154: 8f810000 lw at,0\(gp\)
|
||||
158: 00000000 nop
|
||||
15c: 24210000 addiu at,at,0
|
||||
160: a8240000 swl a0,0\(at\)
|
||||
164: b8240003 swr a0,3\(at\)
|
||||
168: 3c043ff0 lui a0,0x3ff0
|
||||
16c: 00002821 move a1,zero
|
||||
170: 8f810000 lw at,0\(gp\)
|
||||
174: 8c240000 lw a0,0\(at\)
|
||||
178: 8c250004 lw a1,4\(at\)
|
||||
17c: 3c013ff0 lui at,0x3ff0
|
||||
180: 44810800 mtc1 at,\$f1
|
||||
184: 44800000 mtc1 zero,\$f0
|
||||
188: 8f810000 lw at,0\(gp\)
|
||||
18c: d4200008 ldc1 \$f0,8\(at\)
|
||||
190: 24a40064 addiu a0,a1,100
|
||||
194: 2c840001 sltiu a0,a0,1
|
||||
198: 24a40064 addiu a0,a1,100
|
||||
19c: 0004202b sltu a0,zero,a0
|
||||
1a0: 00a02021 move a0,a1
|
||||
144: d4200008 ldc1 \$f0,8\(at\)
|
||||
148: 24a40064 addiu a0,a1,100
|
||||
14c: 2c840001 sltiu a0,a0,1
|
||||
150: 24a40064 addiu a0,a1,100
|
||||
154: 0004202b sltu a0,zero,a0
|
||||
158: 00a02021 move a0,a1
|
||||
|
||||
0+01a4 <[^>]*>:
|
||||
0+015c <[^>]*>:
|
||||
...
|
||||
|
|
|
|||
|
|
@ -13,62 +13,59 @@ Disassembly of section \.text:
|
|||
0+00c <[^>]*> afbc0008 sw gp,8\(sp\)
|
||||
0+010 <[^>]*> 8f990000 lw t9,0\(gp\)
|
||||
10: R_MIPS_GOT16 \.text
|
||||
0+014 <[^>]*> 00000000 nop
|
||||
0+018 <[^>]*> 273900d8 addiu t9,t9,216
|
||||
18: R_MIPS_LO16 \.text
|
||||
0+01c <[^>]*> 0320f809 jalr t9
|
||||
0+020 <[^>]*> 00000000 nop
|
||||
0+024 <[^>]*> 8fbc0008 lw gp,8\(sp\)
|
||||
0+028 <[^>]*> 00000000 nop
|
||||
0+02c <[^>]*> 0320f809 jalr t9
|
||||
0+030 <[^>]*> 00000000 nop
|
||||
0+034 <[^>]*> 8fbc0008 lw gp,8\(sp\)
|
||||
0+038 <[^>]*> 3c1c0000 lui gp,0x0
|
||||
38: R_MIPS_HI16 _gp_disp
|
||||
0+03c <[^>]*> 279c0000 addiu gp,gp,0
|
||||
3c: R_MIPS_LO16 _gp_disp
|
||||
0+040 <[^>]*> 0399e021 addu gp,gp,t9
|
||||
0+044 <[^>]*> 3c010001 lui at,0x1
|
||||
0+048 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+04c <[^>]*> ac3c8000 sw gp,-32768\(at\)
|
||||
0+050 <[^>]*> 8f990000 lw t9,0\(gp\)
|
||||
50: R_MIPS_GOT16 \.text
|
||||
0+054 <[^>]*> 00000000 nop
|
||||
0+058 <[^>]*> 273900d8 addiu t9,t9,216
|
||||
58: R_MIPS_LO16 \.text
|
||||
0+05c <[^>]*> 0320f809 jalr t9
|
||||
0+060 <[^>]*> 00000000 nop
|
||||
0+064 <[^>]*> 3c010001 lui at,0x1
|
||||
0+068 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+06c <[^>]*> 8c3c8000 lw gp,-32768\(at\)
|
||||
0+014 <[^>]*> 273900cc addiu t9,t9,204
|
||||
14: R_MIPS_LO16 \.text
|
||||
0+018 <[^>]*> 0320f809 jalr t9
|
||||
0+01c <[^>]*> 00000000 nop
|
||||
0+020 <[^>]*> 8fbc0008 lw gp,8\(sp\)
|
||||
0+024 <[^>]*> 00000000 nop
|
||||
0+028 <[^>]*> 0320f809 jalr t9
|
||||
0+02c <[^>]*> 00000000 nop
|
||||
0+030 <[^>]*> 8fbc0008 lw gp,8\(sp\)
|
||||
0+034 <[^>]*> 3c1c0000 lui gp,0x0
|
||||
34: R_MIPS_HI16 _gp_disp
|
||||
0+038 <[^>]*> 279c0000 addiu gp,gp,0
|
||||
38: R_MIPS_LO16 _gp_disp
|
||||
0+03c <[^>]*> 0399e021 addu gp,gp,t9
|
||||
0+040 <[^>]*> 3c010001 lui at,0x1
|
||||
0+044 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+048 <[^>]*> ac3c8000 sw gp,-32768\(at\)
|
||||
0+04c <[^>]*> 8f990000 lw t9,0\(gp\)
|
||||
4c: R_MIPS_GOT16 \.text
|
||||
0+050 <[^>]*> 273900cc addiu t9,t9,204
|
||||
50: R_MIPS_LO16 \.text
|
||||
0+054 <[^>]*> 0320f809 jalr t9
|
||||
0+058 <[^>]*> 00000000 nop
|
||||
0+05c <[^>]*> 3c010001 lui at,0x1
|
||||
0+060 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+064 <[^>]*> 8c3c8000 lw gp,-32768\(at\)
|
||||
0+068 <[^>]*> 00000000 nop
|
||||
0+06c <[^>]*> 0320f809 jalr t9
|
||||
0+070 <[^>]*> 00000000 nop
|
||||
0+074 <[^>]*> 0320f809 jalr t9
|
||||
0+078 <[^>]*> 00000000 nop
|
||||
0+07c <[^>]*> 3c010001 lui at,0x1
|
||||
0+080 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+084 <[^>]*> 8c3c8000 lw gp,-32768\(at\)
|
||||
0+088 <[^>]*> 3c1c0000 lui gp,0x0
|
||||
88: R_MIPS_HI16 _gp_disp
|
||||
0+08c <[^>]*> 279c0000 addiu gp,gp,0
|
||||
8c: R_MIPS_LO16 _gp_disp
|
||||
0+090 <[^>]*> 0399e021 addu gp,gp,t9
|
||||
0+094 <[^>]*> 3c010001 lui at,0x1
|
||||
0+098 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+09c <[^>]*> ac3c0000 sw gp,0\(at\)
|
||||
0+0a0 <[^>]*> 8f990000 lw t9,0\(gp\)
|
||||
a0: R_MIPS_GOT16 \.text
|
||||
0+074 <[^>]*> 3c010001 lui at,0x1
|
||||
0+078 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+07c <[^>]*> 8c3c8000 lw gp,-32768\(at\)
|
||||
0+080 <[^>]*> 3c1c0000 lui gp,0x0
|
||||
80: R_MIPS_HI16 _gp_disp
|
||||
0+084 <[^>]*> 279c0000 addiu gp,gp,0
|
||||
84: R_MIPS_LO16 _gp_disp
|
||||
0+088 <[^>]*> 0399e021 addu gp,gp,t9
|
||||
0+08c <[^>]*> 3c010001 lui at,0x1
|
||||
0+090 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+094 <[^>]*> ac3c0000 sw gp,0\(at\)
|
||||
0+098 <[^>]*> 8f990000 lw t9,0\(gp\)
|
||||
98: R_MIPS_GOT16 \.text
|
||||
0+09c <[^>]*> 273900cc addiu t9,t9,204
|
||||
9c: R_MIPS_LO16 \.text
|
||||
0+0a0 <[^>]*> 0320f809 jalr t9
|
||||
0+0a4 <[^>]*> 00000000 nop
|
||||
0+0a8 <[^>]*> 273900d8 addiu t9,t9,216
|
||||
a8: R_MIPS_LO16 \.text
|
||||
0+0ac <[^>]*> 0320f809 jalr t9
|
||||
0+0b0 <[^>]*> 00000000 nop
|
||||
0+0b4 <[^>]*> 3c010001 lui at,0x1
|
||||
0+0b8 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+0bc <[^>]*> 8c3c0000 lw gp,0\(at\)
|
||||
0+0c0 <[^>]*> 00000000 nop
|
||||
0+0c4 <[^>]*> 0320f809 jalr t9
|
||||
0+0c8 <[^>]*> 00000000 nop
|
||||
0+0cc <[^>]*> 3c010001 lui at,0x1
|
||||
0+0d0 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+0d4 <[^>]*> 8c3c0000 lw gp,0\(at\)
|
||||
0+0a8 <[^>]*> 3c010001 lui at,0x1
|
||||
0+0ac <[^>]*> 003d0821 addu at,at,sp
|
||||
0+0b0 <[^>]*> 8c3c0000 lw gp,0\(at\)
|
||||
0+0b4 <[^>]*> 00000000 nop
|
||||
0+0b8 <[^>]*> 0320f809 jalr t9
|
||||
0+0bc <[^>]*> 00000000 nop
|
||||
0+0c0 <[^>]*> 3c010001 lui at,0x1
|
||||
0+0c4 <[^>]*> 003d0821 addu at,at,sp
|
||||
0+0c8 <[^>]*> 8c3c0000 lw gp,0\(at\)
|
||||
\.\.\.
|
||||
|
|
|
|||
|
|
@ -15,103 +15,85 @@ Disassembly of section .text:
|
|||
14: 3c041234 lui a0,0x1234
|
||||
18: 34845678 ori a0,a0,0x5678
|
||||
1c: 8f840000 lw a0,0\(gp\)
|
||||
20: 00000000 nop
|
||||
24: 24840000 addiu a0,a0,0
|
||||
28: 8f840000 lw a0,0\(gp\)
|
||||
2c: 00000000 nop
|
||||
30: 24840000 addiu a0,a0,0
|
||||
34: 8f840000 lw a0,0\(gp\)
|
||||
20: 24840000 addiu a0,a0,0
|
||||
24: 8f840000 lw a0,0\(gp\)
|
||||
28: 24840000 addiu a0,a0,0
|
||||
2c: 8f840000 lw a0,0\(gp\)
|
||||
30: 2484015c addiu a0,a0,348
|
||||
34: 10000049 b 15c <[^>]*>
|
||||
38: 00000000 nop
|
||||
3c: 248401a4 addiu a0,a0,420
|
||||
40: 10000058 b 1a4 <[^>]*>
|
||||
44: 00000000 nop
|
||||
48: 8f990000 lw t9,0\(gp\)
|
||||
4c: 00000000 nop
|
||||
50: 273901a4 addiu t9,t9,420
|
||||
54: 0320f809 jalr t9
|
||||
58: 00000000 nop
|
||||
5c: 8fbc0008 lw gp,8\(sp\)
|
||||
60: 8f840000 lw a0,0\(gp\)
|
||||
64: 00000000 nop
|
||||
68: 24840000 addiu a0,a0,0
|
||||
6c: 8c840000 lw a0,0\(a0\)
|
||||
70: 8f840000 lw a0,0\(gp\)
|
||||
74: 00000000 nop
|
||||
78: 24840000 addiu a0,a0,0
|
||||
7c: 8c840000 lw a0,0\(a0\)
|
||||
80: 8f840000 lw a0,0\(gp\)
|
||||
84: 00000000 nop
|
||||
88: 248401a4 addiu a0,a0,420
|
||||
8c: 8c840000 lw a0,0\(a0\)
|
||||
90: 8f810000 lw at,0\(gp\)
|
||||
94: 00000000 nop
|
||||
98: 8c240000 lw a0,0\(at\)
|
||||
9c: 8c250004 lw a1,4\(at\)
|
||||
a0: 8f810000 lw at,0\(gp\)
|
||||
a4: 00000000 nop
|
||||
a8: 8c240000 lw a0,0\(at\)
|
||||
ac: 8c250004 lw a1,4\(at\)
|
||||
3c: 8f990000 lw t9,0\(gp\)
|
||||
40: 2739015c addiu t9,t9,348
|
||||
44: 0320f809 jalr t9
|
||||
48: 00000000 nop
|
||||
4c: 8fbc0008 lw gp,8\(sp\)
|
||||
50: 8f840000 lw a0,0\(gp\)
|
||||
54: 24840000 addiu a0,a0,0
|
||||
58: 8c840000 lw a0,0\(a0\)
|
||||
5c: 8f840000 lw a0,0\(gp\)
|
||||
60: 24840000 addiu a0,a0,0
|
||||
64: 8c840000 lw a0,0\(a0\)
|
||||
68: 8f840000 lw a0,0\(gp\)
|
||||
6c: 2484015c addiu a0,a0,348
|
||||
70: 8c840000 lw a0,0\(a0\)
|
||||
74: 8f810000 lw at,0\(gp\)
|
||||
78: 8c240000 lw a0,0\(at\)
|
||||
7c: 8c250004 lw a1,4\(at\)
|
||||
80: 8f810000 lw at,0\(gp\)
|
||||
84: 8c240000 lw a0,0\(at\)
|
||||
88: 8c250004 lw a1,4\(at\)
|
||||
8c: 8f810000 lw at,0\(gp\)
|
||||
90: 8c24015c lw a0,348\(at\)
|
||||
94: 8c250160 lw a1,352\(at\)
|
||||
98: 8f810000 lw at,0\(gp\)
|
||||
9c: 24210000 addiu at,at,0
|
||||
a0: ac240000 sw a0,0\(at\)
|
||||
a4: 8f810000 lw at,0\(gp\)
|
||||
a8: 24210000 addiu at,at,0
|
||||
ac: ac240000 sw a0,0\(at\)
|
||||
b0: 8f810000 lw at,0\(gp\)
|
||||
b4: 00000000 nop
|
||||
b8: 8c2401a4 lw a0,420\(at\)
|
||||
bc: 8c2501a8 lw a1,424\(at\)
|
||||
c0: 8f810000 lw at,0\(gp\)
|
||||
c4: 00000000 nop
|
||||
c8: 24210000 addiu at,at,0
|
||||
cc: ac240000 sw a0,0\(at\)
|
||||
d0: 8f810000 lw at,0\(gp\)
|
||||
d4: 00000000 nop
|
||||
d8: 24210000 addiu at,at,0
|
||||
dc: ac240000 sw a0,0\(at\)
|
||||
b4: ac240000 sw a0,0\(at\)
|
||||
b8: ac250004 sw a1,4\(at\)
|
||||
bc: 8f810000 lw at,0\(gp\)
|
||||
c0: ac240000 sw a0,0\(at\)
|
||||
c4: ac250004 sw a1,4\(at\)
|
||||
c8: 8f810000 lw at,0\(gp\)
|
||||
cc: 24210000 addiu at,at,0
|
||||
d0: 80240000 lb a0,0\(at\)
|
||||
d4: 90210001 lbu at,1\(at\)
|
||||
d8: 00042200 sll a0,a0,0x8
|
||||
dc: 00812025 or a0,a0,at
|
||||
e0: 8f810000 lw at,0\(gp\)
|
||||
e4: 00000000 nop
|
||||
e8: ac240000 sw a0,0\(at\)
|
||||
ec: ac250004 sw a1,4\(at\)
|
||||
f0: 8f810000 lw at,0\(gp\)
|
||||
f4: 00000000 nop
|
||||
f8: ac240000 sw a0,0\(at\)
|
||||
fc: ac250004 sw a1,4\(at\)
|
||||
e4: 24210000 addiu at,at,0
|
||||
e8: a0240001 sb a0,1\(at\)
|
||||
ec: 00042202 srl a0,a0,0x8
|
||||
f0: a0240000 sb a0,0\(at\)
|
||||
f4: 90210001 lbu at,1\(at\)
|
||||
f8: 00042200 sll a0,a0,0x8
|
||||
fc: 00812025 or a0,a0,at
|
||||
100: 8f810000 lw at,0\(gp\)
|
||||
104: 00000000 nop
|
||||
108: 24210000 addiu at,at,0
|
||||
10c: 80240000 lb a0,0\(at\)
|
||||
110: 90210001 lbu at,1\(at\)
|
||||
114: 00042200 sll a0,a0,0x8
|
||||
118: 00812025 or a0,a0,at
|
||||
11c: 8f810000 lw at,0\(gp\)
|
||||
120: 00000000 nop
|
||||
124: 24210000 addiu at,at,0
|
||||
128: a0240001 sb a0,1\(at\)
|
||||
12c: 00042202 srl a0,a0,0x8
|
||||
130: a0240000 sb a0,0\(at\)
|
||||
134: 90210001 lbu at,1\(at\)
|
||||
138: 00042200 sll a0,a0,0x8
|
||||
13c: 00812025 or a0,a0,at
|
||||
104: 24210000 addiu at,at,0
|
||||
108: 88240000 lwl a0,0\(at\)
|
||||
10c: 98240003 lwr a0,3\(at\)
|
||||
110: 8f810000 lw at,0\(gp\)
|
||||
114: 24210000 addiu at,at,0
|
||||
118: a8240000 swl a0,0\(at\)
|
||||
11c: b8240003 swr a0,3\(at\)
|
||||
120: 3c043ff0 lui a0,0x3ff0
|
||||
124: 00002821 move a1,zero
|
||||
128: 8f810000 lw at,0\(gp\)
|
||||
12c: 8c240000 lw a0,0\(at\)
|
||||
130: 8c250004 lw a1,4\(at\)
|
||||
134: 3c013ff0 lui at,0x3ff0
|
||||
138: 44810800 mtc1 at,\$f1
|
||||
13c: 44800000 mtc1 zero,\$f0
|
||||
140: 8f810000 lw at,0\(gp\)
|
||||
144: 00000000 nop
|
||||
148: 24210000 addiu at,at,0
|
||||
14c: 88240000 lwl a0,0\(at\)
|
||||
150: 98240003 lwr a0,3\(at\)
|
||||
154: 8f810000 lw at,0\(gp\)
|
||||
158: 00000000 nop
|
||||
15c: 24210000 addiu at,at,0
|
||||
160: a8240000 swl a0,0\(at\)
|
||||
164: b8240003 swr a0,3\(at\)
|
||||
168: 3c043ff0 lui a0,0x3ff0
|
||||
16c: 00002821 move a1,zero
|
||||
170: 8f810000 lw at,0\(gp\)
|
||||
174: 8c240000 lw a0,0\(at\)
|
||||
178: 8c250004 lw a1,4\(at\)
|
||||
17c: 3c013ff0 lui at,0x3ff0
|
||||
180: 44810800 mtc1 at,\$f1
|
||||
184: 44800000 mtc1 zero,\$f0
|
||||
188: 8f810000 lw at,0\(gp\)
|
||||
18c: d4200008 ldc1 \$f0,8\(at\)
|
||||
190: 24a40064 addiu a0,a1,100
|
||||
194: 2c840001 sltiu a0,a0,1
|
||||
198: 24a40064 addiu a0,a1,100
|
||||
19c: 0004202b sltu a0,zero,a0
|
||||
1a0: 00a02021 move a0,a1
|
||||
144: d4200008 ldc1 \$f0,8\(at\)
|
||||
148: 24a40064 addiu a0,a1,100
|
||||
14c: 2c840001 sltiu a0,a0,1
|
||||
150: 24a40064 addiu a0,a1,100
|
||||
154: 0004202b sltu a0,zero,a0
|
||||
158: 00a02021 move a0,a1
|
||||
|
||||
0+01a4 <[^>]*>:
|
||||
0+015c <[^>]*>:
|
||||
...
|
||||
|
|
|
|||
|
|
@ -15,103 +15,85 @@ Disassembly of section .text:
|
|||
14: 3c041234 lui a0,0x1234
|
||||
18: 34845678 ori a0,a0,0x5678
|
||||
1c: 8f840000 lw a0,0\(gp\)
|
||||
20: 00000000 nop
|
||||
24: 24840000 addiu a0,a0,0
|
||||
28: 8f840000 lw a0,0\(gp\)
|
||||
2c: 00000000 nop
|
||||
30: 24840000 addiu a0,a0,0
|
||||
34: 8f840000 lw a0,0\(gp\)
|
||||
20: 24840000 addiu a0,a0,0
|
||||
24: 8f840000 lw a0,0\(gp\)
|
||||
28: 24840000 addiu a0,a0,0
|
||||
2c: 8f840000 lw a0,0\(gp\)
|
||||
30: 2484015c addiu a0,a0,348
|
||||
34: 10000049 b 15c <[^>]*>
|
||||
38: 00000000 nop
|
||||
3c: 248401a4 addiu a0,a0,420
|
||||
40: 10000058 b 1a4 <[^>]*>
|
||||
44: 00000000 nop
|
||||
48: 8f990000 lw t9,0\(gp\)
|
||||
4c: 00000000 nop
|
||||
50: 273901a4 addiu t9,t9,420
|
||||
54: 0320f809 jalr t9
|
||||
58: 00000000 nop
|
||||
5c: 8fbc0008 lw gp,8\(sp\)
|
||||
60: 8f840000 lw a0,0\(gp\)
|
||||
64: 00000000 nop
|
||||
68: 24840000 addiu a0,a0,0
|
||||
6c: 8c840000 lw a0,0\(a0\)
|
||||
70: 8f840000 lw a0,0\(gp\)
|
||||
74: 00000000 nop
|
||||
78: 24840000 addiu a0,a0,0
|
||||
7c: 8c840000 lw a0,0\(a0\)
|
||||
80: 8f840000 lw a0,0\(gp\)
|
||||
84: 00000000 nop
|
||||
88: 248401a4 addiu a0,a0,420
|
||||
8c: 8c840000 lw a0,0\(a0\)
|
||||
90: 8f810000 lw at,0\(gp\)
|
||||
94: 00000000 nop
|
||||
98: 8c240000 lw a0,0\(at\)
|
||||
9c: 8c250004 lw a1,4\(at\)
|
||||
a0: 8f810000 lw at,0\(gp\)
|
||||
a4: 00000000 nop
|
||||
a8: 8c240000 lw a0,0\(at\)
|
||||
ac: 8c250004 lw a1,4\(at\)
|
||||
3c: 8f990000 lw t9,0\(gp\)
|
||||
40: 2739015c addiu t9,t9,348
|
||||
44: 0320f809 jalr t9
|
||||
48: 00000000 nop
|
||||
4c: 8fbc0008 lw gp,8\(sp\)
|
||||
50: 8f840000 lw a0,0\(gp\)
|
||||
54: 24840000 addiu a0,a0,0
|
||||
58: 8c840000 lw a0,0\(a0\)
|
||||
5c: 8f840000 lw a0,0\(gp\)
|
||||
60: 24840000 addiu a0,a0,0
|
||||
64: 8c840000 lw a0,0\(a0\)
|
||||
68: 8f840000 lw a0,0\(gp\)
|
||||
6c: 2484015c addiu a0,a0,348
|
||||
70: 8c840000 lw a0,0\(a0\)
|
||||
74: 8f810000 lw at,0\(gp\)
|
||||
78: 8c240000 lw a0,0\(at\)
|
||||
7c: 8c250004 lw a1,4\(at\)
|
||||
80: 8f810000 lw at,0\(gp\)
|
||||
84: 8c240000 lw a0,0\(at\)
|
||||
88: 8c250004 lw a1,4\(at\)
|
||||
8c: 8f810000 lw at,0\(gp\)
|
||||
90: 8c24015c lw a0,348\(at\)
|
||||
94: 8c250160 lw a1,352\(at\)
|
||||
98: 8f810000 lw at,0\(gp\)
|
||||
9c: 24210000 addiu at,at,0
|
||||
a0: ac240000 sw a0,0\(at\)
|
||||
a4: 8f810000 lw at,0\(gp\)
|
||||
a8: 24210000 addiu at,at,0
|
||||
ac: ac240000 sw a0,0\(at\)
|
||||
b0: 8f810000 lw at,0\(gp\)
|
||||
b4: 00000000 nop
|
||||
b8: 8c2401a4 lw a0,420\(at\)
|
||||
bc: 8c2501a8 lw a1,424\(at\)
|
||||
c0: 8f810000 lw at,0\(gp\)
|
||||
c4: 00000000 nop
|
||||
c8: 24210000 addiu at,at,0
|
||||
cc: ac240000 sw a0,0\(at\)
|
||||
d0: 8f810000 lw at,0\(gp\)
|
||||
d4: 00000000 nop
|
||||
d8: 24210000 addiu at,at,0
|
||||
dc: ac240000 sw a0,0\(at\)
|
||||
b4: ac240000 sw a0,0\(at\)
|
||||
b8: ac250004 sw a1,4\(at\)
|
||||
bc: 8f810000 lw at,0\(gp\)
|
||||
c0: ac240000 sw a0,0\(at\)
|
||||
c4: ac250004 sw a1,4\(at\)
|
||||
c8: 8f810000 lw at,0\(gp\)
|
||||
cc: 24210000 addiu at,at,0
|
||||
d0: 80240000 lb a0,0\(at\)
|
||||
d4: 90210001 lbu at,1\(at\)
|
||||
d8: 00042200 sll a0,a0,0x8
|
||||
dc: 00812025 or a0,a0,at
|
||||
e0: 8f810000 lw at,0\(gp\)
|
||||
e4: 00000000 nop
|
||||
e8: ac240000 sw a0,0\(at\)
|
||||
ec: ac250004 sw a1,4\(at\)
|
||||
f0: 8f810000 lw at,0\(gp\)
|
||||
f4: 00000000 nop
|
||||
f8: ac240000 sw a0,0\(at\)
|
||||
fc: ac250004 sw a1,4\(at\)
|
||||
e4: 24210000 addiu at,at,0
|
||||
e8: a0240001 sb a0,1\(at\)
|
||||
ec: 00042202 srl a0,a0,0x8
|
||||
f0: a0240000 sb a0,0\(at\)
|
||||
f4: 90210001 lbu at,1\(at\)
|
||||
f8: 00042200 sll a0,a0,0x8
|
||||
fc: 00812025 or a0,a0,at
|
||||
100: 8f810000 lw at,0\(gp\)
|
||||
104: 00000000 nop
|
||||
108: 24210000 addiu at,at,0
|
||||
10c: 80240000 lb a0,0\(at\)
|
||||
110: 90210001 lbu at,1\(at\)
|
||||
114: 00042200 sll a0,a0,0x8
|
||||
118: 00812025 or a0,a0,at
|
||||
11c: 8f810000 lw at,0\(gp\)
|
||||
120: 00000000 nop
|
||||
124: 24210000 addiu at,at,0
|
||||
128: a0240001 sb a0,1\(at\)
|
||||
12c: 00042202 srl a0,a0,0x8
|
||||
130: a0240000 sb a0,0\(at\)
|
||||
134: 90210001 lbu at,1\(at\)
|
||||
138: 00042200 sll a0,a0,0x8
|
||||
13c: 00812025 or a0,a0,at
|
||||
140: 8f810000 lw at,0\(gp\)
|
||||
144: 00000000 nop
|
||||
148: 24210000 addiu at,at,0
|
||||
14c: 88240000 lwl a0,0\(at\)
|
||||
150: 98240003 lwr a0,3\(at\)
|
||||
154: 8f810000 lw at,0\(gp\)
|
||||
158: 00000000 nop
|
||||
15c: 24210000 addiu at,at,0
|
||||
160: a8240000 swl a0,0\(at\)
|
||||
164: b8240003 swr a0,3\(at\)
|
||||
168: 3c043ff0 lui a0,0x3ff0
|
||||
16c: 00002821 move a1,zero
|
||||
170: 8f810000 lw at,0\(gp\)
|
||||
174: 8c240000 lw a0,0\(at\)
|
||||
178: 8c250004 lw a1,4\(at\)
|
||||
17c: 8f810000 lw at,0\(gp\)
|
||||
180: d4200008 ldc1 \$f0,8\(at\)
|
||||
184: 8f810000 lw at,0\(gp\)
|
||||
188: d4200010 ldc1 \$f0,16\(at\)
|
||||
18c: 24a40064 addiu a0,a1,100
|
||||
190: 2c840001 sltiu a0,a0,1
|
||||
194: 24a40064 addiu a0,a1,100
|
||||
198: 0004202b sltu a0,zero,a0
|
||||
19c: 00a02021 move a0,a1
|
||||
1a0: 46231040 add.d \$f1,\$f2,\$f3
|
||||
104: 24210000 addiu at,at,0
|
||||
108: 88240000 lwl a0,0\(at\)
|
||||
10c: 98240003 lwr a0,3\(at\)
|
||||
110: 8f810000 lw at,0\(gp\)
|
||||
114: 24210000 addiu at,at,0
|
||||
118: a8240000 swl a0,0\(at\)
|
||||
11c: b8240003 swr a0,3\(at\)
|
||||
120: 3c043ff0 lui a0,0x3ff0
|
||||
124: 00002821 move a1,zero
|
||||
128: 8f810000 lw at,0\(gp\)
|
||||
12c: 8c240000 lw a0,0\(at\)
|
||||
130: 8c250004 lw a1,4\(at\)
|
||||
134: 8f810000 lw at,0\(gp\)
|
||||
138: d4200008 ldc1 \$f0,8\(at\)
|
||||
13c: 8f810000 lw at,0\(gp\)
|
||||
140: d4200010 ldc1 \$f0,16\(at\)
|
||||
144: 24a40064 addiu a0,a1,100
|
||||
148: 2c840001 sltiu a0,a0,1
|
||||
14c: 24a40064 addiu a0,a1,100
|
||||
150: 0004202b sltu a0,zero,a0
|
||||
154: 00a02021 move a0,a1
|
||||
158: 46231040 add.d \$f1,\$f2,\$f3
|
||||
|
||||
0+01a4 <[^>]*>:
|
||||
0+015c <[^>]*>:
|
||||
...
|
||||
|
|
|
|||
|
|
@ -15,138 +15,116 @@ Disassembly of section .text:
|
|||
14: 3c041234 lui a0,0x1234
|
||||
18: 34845678 ori a0,a0,0x5678
|
||||
1c: 8f840000 lw a0,0\(gp\)
|
||||
20: 00000000 nop
|
||||
24: 24840000 addiu a0,a0,0
|
||||
28: 8f840000 lw a0,0\(gp\)
|
||||
2c: 00000000 nop
|
||||
30: 24840000 addiu a0,a0,0
|
||||
34: 8f840000 lw a0,0\(gp\)
|
||||
20: 24840000 addiu a0,a0,0
|
||||
24: 8f840000 lw a0,0\(gp\)
|
||||
28: 24840000 addiu a0,a0,0
|
||||
2c: 8f840000 lw a0,0\(gp\)
|
||||
30: 248401d8 addiu a0,a0,472
|
||||
34: 10000068 b 1d8 <[^>]*>
|
||||
38: 00000000 nop
|
||||
3c: 24840230 addiu a0,a0,560
|
||||
40: 1000007b b 230 <[^>]*>
|
||||
44: 00000000 nop
|
||||
48: 8f990000 lw t9,0\(gp\)
|
||||
4c: 00000000 nop
|
||||
50: 27390230 addiu t9,t9,560
|
||||
54: 0320f809 jalr t9
|
||||
58: 00000000 nop
|
||||
5c: 8fbc0008 lw gp,8\(sp\)
|
||||
60: 8f840000 lw a0,0\(gp\)
|
||||
64: 00000000 nop
|
||||
68: 24840000 addiu a0,a0,0
|
||||
6c: 8c840000 lw a0,0\(a0\)
|
||||
70: 8f840000 lw a0,0\(gp\)
|
||||
74: 00000000 nop
|
||||
3c: 8f990000 lw t9,0\(gp\)
|
||||
40: 273901d8 addiu t9,t9,472
|
||||
44: 0320f809 jalr t9
|
||||
48: 00000000 nop
|
||||
4c: 8fbc0008 lw gp,8\(sp\)
|
||||
50: 8f840000 lw a0,0\(gp\)
|
||||
54: 24840000 addiu a0,a0,0
|
||||
58: 8c840000 lw a0,0\(a0\)
|
||||
5c: 8f840000 lw a0,0\(gp\)
|
||||
60: 24840000 addiu a0,a0,0
|
||||
64: 8c840000 lw a0,0\(a0\)
|
||||
68: 8f840000 lw a0,0\(gp\)
|
||||
6c: 248401d8 addiu a0,a0,472
|
||||
70: 8c840000 lw a0,0\(a0\)
|
||||
74: 8f840000 lw a0,0\(gp\)
|
||||
78: 24840000 addiu a0,a0,0
|
||||
7c: 8c840000 lw a0,0\(a0\)
|
||||
7c: dc840000 ld a0,0\(a0\)
|
||||
80: 8f840000 lw a0,0\(gp\)
|
||||
84: 00000000 nop
|
||||
88: 24840230 addiu a0,a0,560
|
||||
8c: 8c840000 lw a0,0\(a0\)
|
||||
90: 8f840000 lw a0,0\(gp\)
|
||||
94: 00000000 nop
|
||||
98: 24840000 addiu a0,a0,0
|
||||
9c: dc840000 ld a0,0\(a0\)
|
||||
a0: 8f840000 lw a0,0\(gp\)
|
||||
a4: 00000000 nop
|
||||
a8: 24840000 addiu a0,a0,0
|
||||
ac: dc840000 ld a0,0\(a0\)
|
||||
b0: 8f840000 lw a0,0\(gp\)
|
||||
b4: 00000000 nop
|
||||
b8: 24840230 addiu a0,a0,560
|
||||
bc: dc840000 ld a0,0\(a0\)
|
||||
c0: 8f810000 lw at,0\(gp\)
|
||||
c4: 00000000 nop
|
||||
c8: 24210000 addiu at,at,0
|
||||
cc: ac240000 sw a0,0\(at\)
|
||||
d0: 8f810000 lw at,0\(gp\)
|
||||
d4: 00000000 nop
|
||||
d8: 24210000 addiu at,at,0
|
||||
dc: ac240000 sw a0,0\(at\)
|
||||
84: 24840000 addiu a0,a0,0
|
||||
88: dc840000 ld a0,0\(a0\)
|
||||
8c: 8f840000 lw a0,0\(gp\)
|
||||
90: 248401d8 addiu a0,a0,472
|
||||
94: dc840000 ld a0,0\(a0\)
|
||||
98: 8f810000 lw at,0\(gp\)
|
||||
9c: 24210000 addiu at,at,0
|
||||
a0: ac240000 sw a0,0\(at\)
|
||||
a4: 8f810000 lw at,0\(gp\)
|
||||
a8: 24210000 addiu at,at,0
|
||||
ac: ac240000 sw a0,0\(at\)
|
||||
b0: 8f810000 lw at,0\(gp\)
|
||||
b4: 24210000 addiu at,at,0
|
||||
b8: fc240000 sd a0,0\(at\)
|
||||
bc: 8f810000 lw at,0\(gp\)
|
||||
c0: 24210000 addiu at,at,0
|
||||
c4: fc240000 sd a0,0\(at\)
|
||||
c8: 8f810000 lw at,0\(gp\)
|
||||
cc: 24210000 addiu at,at,0
|
||||
d0: 80240000 lb a0,0\(at\)
|
||||
d4: 90210001 lbu at,1\(at\)
|
||||
d8: 00042200 sll a0,a0,0x8
|
||||
dc: 00812025 or a0,a0,at
|
||||
e0: 8f810000 lw at,0\(gp\)
|
||||
e4: 00000000 nop
|
||||
e8: 24210000 addiu at,at,0
|
||||
ec: fc240000 sd a0,0\(at\)
|
||||
f0: 8f810000 lw at,0\(gp\)
|
||||
f4: 00000000 nop
|
||||
f8: 24210000 addiu at,at,0
|
||||
fc: fc240000 sd a0,0\(at\)
|
||||
e4: 24210000 addiu at,at,0
|
||||
e8: a0240001 sb a0,1\(at\)
|
||||
ec: 00042202 srl a0,a0,0x8
|
||||
f0: a0240000 sb a0,0\(at\)
|
||||
f4: 90210001 lbu at,1\(at\)
|
||||
f8: 00042200 sll a0,a0,0x8
|
||||
fc: 00812025 or a0,a0,at
|
||||
100: 8f810000 lw at,0\(gp\)
|
||||
104: 00000000 nop
|
||||
108: 24210000 addiu at,at,0
|
||||
10c: 80240000 lb a0,0\(at\)
|
||||
110: 90210001 lbu at,1\(at\)
|
||||
114: 00042200 sll a0,a0,0x8
|
||||
118: 00812025 or a0,a0,at
|
||||
11c: 8f810000 lw at,0\(gp\)
|
||||
120: 00000000 nop
|
||||
124: 24210000 addiu at,at,0
|
||||
128: a0240001 sb a0,1\(at\)
|
||||
12c: 00042202 srl a0,a0,0x8
|
||||
130: a0240000 sb a0,0\(at\)
|
||||
134: 90210001 lbu at,1\(at\)
|
||||
138: 00042200 sll a0,a0,0x8
|
||||
13c: 00812025 or a0,a0,at
|
||||
140: 8f810000 lw at,0\(gp\)
|
||||
144: 00000000 nop
|
||||
148: 24210000 addiu at,at,0
|
||||
14c: 88240000 lwl a0,0\(at\)
|
||||
150: 98240003 lwr a0,3\(at\)
|
||||
154: 8f810000 lw at,0\(gp\)
|
||||
158: 00000000 nop
|
||||
15c: 24210000 addiu at,at,0
|
||||
160: a8240000 swl a0,0\(at\)
|
||||
164: b8240003 swr a0,3\(at\)
|
||||
168: 3404ffc0 li a0,0xffc0
|
||||
16c: 000423bc dsll32 a0,a0,0xe
|
||||
170: 8f810000 lw at,0\(gp\)
|
||||
174: dc240000 ld a0,0\(at\)
|
||||
178: 3c013ff0 lui at,0x3ff0
|
||||
17c: 44810800 mtc1 at,\$f1
|
||||
180: 44800000 mtc1 zero,\$f0
|
||||
184: 8f810000 lw at,0\(gp\)
|
||||
188: d4200008 ldc1 \$f0,8\(at\)
|
||||
18c: 64a40064 daddiu a0,a1,100
|
||||
190: 2c840001 sltiu a0,a0,1
|
||||
194: 64a40064 daddiu a0,a1,100
|
||||
198: 0004202b sltu a0,zero,a0
|
||||
19c: 00a0202d move a0,a1
|
||||
1a0: 8f840000 lw a0,0\(gp\)
|
||||
1a4: 00000000 nop
|
||||
1a8: 24840000 addiu a0,a0,0
|
||||
1ac: 8f840000 lw a0,0\(gp\)
|
||||
1b0: 00000000 nop
|
||||
1b4: 24840000 addiu a0,a0,0
|
||||
1b8: 8f810000 lw at,0\(gp\)
|
||||
1bc: 00000000 nop
|
||||
1c0: 24210000 addiu at,at,0
|
||||
1c4: 68240000 ldl a0,0\(at\)
|
||||
1c8: 6c240007 ldr a0,7\(at\)
|
||||
1cc: 8f810000 lw at,0\(gp\)
|
||||
1d0: 00000000 nop
|
||||
1d4: 24210000 addiu at,at,0
|
||||
1d8: b0240000 sdl a0,0\(at\)
|
||||
1dc: b4240007 sdr a0,7\(at\)
|
||||
1e0: 34018000 li at,0x8000
|
||||
1e4: 00010c38 dsll at,at,0x10
|
||||
1e8: 0081082a slt at,a0,at
|
||||
1ec: 10200010 beqz at,230 <[^>]*>
|
||||
1f0: 00000000 nop
|
||||
1f4: 34018000 li at,0x8000
|
||||
1f8: 00010c78 dsll at,at,0x11
|
||||
1fc: 0081082b sltu at,a0,at
|
||||
200: 1020000b beqz at,230 <[^>]*>
|
||||
204: 00000000 nop
|
||||
208: 34018000 li at,0x8000
|
||||
20c: 00010c38 dsll at,at,0x10
|
||||
210: 0081082a slt at,a0,at
|
||||
214: 14200006 bnez at,230 <[^>]*>
|
||||
218: 00000000 nop
|
||||
21c: 34018000 li at,0x8000
|
||||
220: 00010c78 dsll at,at,0x11
|
||||
224: 0081082b sltu at,a0,at
|
||||
228: 14200001 bnez at,230 <[^>]*>
|
||||
22c: 00000000 nop
|
||||
104: 24210000 addiu at,at,0
|
||||
108: 88240000 lwl a0,0\(at\)
|
||||
10c: 98240003 lwr a0,3\(at\)
|
||||
110: 8f810000 lw at,0\(gp\)
|
||||
114: 24210000 addiu at,at,0
|
||||
118: a8240000 swl a0,0\(at\)
|
||||
11c: b8240003 swr a0,3\(at\)
|
||||
120: 3404ffc0 li a0,0xffc0
|
||||
124: 000423bc dsll32 a0,a0,0xe
|
||||
128: 8f810000 lw at,0\(gp\)
|
||||
12c: dc240000 ld a0,0\(at\)
|
||||
130: 3c013ff0 lui at,0x3ff0
|
||||
134: 44810800 mtc1 at,\$f1
|
||||
138: 44800000 mtc1 zero,\$f0
|
||||
13c: 8f810000 lw at,0\(gp\)
|
||||
140: d4200008 ldc1 \$f0,8\(at\)
|
||||
144: 64a40064 daddiu a0,a1,100
|
||||
148: 2c840001 sltiu a0,a0,1
|
||||
14c: 64a40064 daddiu a0,a1,100
|
||||
150: 0004202b sltu a0,zero,a0
|
||||
154: 00a0202d move a0,a1
|
||||
158: 8f840000 lw a0,0\(gp\)
|
||||
15c: 24840000 addiu a0,a0,0
|
||||
160: 8f840000 lw a0,0\(gp\)
|
||||
164: 24840000 addiu a0,a0,0
|
||||
168: 8f810000 lw at,0\(gp\)
|
||||
16c: 24210000 addiu at,at,0
|
||||
170: 68240000 ldl a0,0\(at\)
|
||||
174: 6c240007 ldr a0,7\(at\)
|
||||
178: 8f810000 lw at,0\(gp\)
|
||||
17c: 24210000 addiu at,at,0
|
||||
180: b0240000 sdl a0,0\(at\)
|
||||
184: b4240007 sdr a0,7\(at\)
|
||||
188: 34018000 li at,0x8000
|
||||
18c: 00010c38 dsll at,at,0x10
|
||||
190: 0081082a slt at,a0,at
|
||||
194: 10200010 beqz at,1d8 <[^>]*>
|
||||
198: 00000000 nop
|
||||
19c: 34018000 li at,0x8000
|
||||
1a0: 00010c78 dsll at,at,0x11
|
||||
1a4: 0081082b sltu at,a0,at
|
||||
1a8: 1020000b beqz at,1d8 <[^>]*>
|
||||
1ac: 00000000 nop
|
||||
1b0: 34018000 li at,0x8000
|
||||
1b4: 00010c38 dsll at,at,0x10
|
||||
1b8: 0081082a slt at,a0,at
|
||||
1bc: 14200006 bnez at,1d8 <[^>]*>
|
||||
1c0: 00000000 nop
|
||||
1c4: 34018000 li at,0x8000
|
||||
1c8: 00010c78 dsll at,at,0x11
|
||||
1cc: 0081082b sltu at,a0,at
|
||||
1d0: 14200001 bnez at,1d8 <[^>]*>
|
||||
1d4: 00000000 nop
|
||||
|
||||
0+0230 <[^>]*>:
|
||||
0+01d8 <[^>]*>:
|
||||
...
|
||||
|
|
|
|||
|
|
@ -15,139 +15,117 @@ Disassembly of section .text:
|
|||
14: 3c041234 lui a0,0x1234
|
||||
18: 34845678 ori a0,a0,0x5678
|
||||
1c: 8f840000 lw a0,0\(gp\)
|
||||
20: 00000000 nop
|
||||
24: 24840000 addiu a0,a0,0
|
||||
28: 8f840000 lw a0,0\(gp\)
|
||||
2c: 00000000 nop
|
||||
30: 24840000 addiu a0,a0,0
|
||||
34: 8f840000 lw a0,0\(gp\)
|
||||
20: 24840000 addiu a0,a0,0
|
||||
24: 8f840000 lw a0,0\(gp\)
|
||||
28: 24840000 addiu a0,a0,0
|
||||
2c: 8f840000 lw a0,0\(gp\)
|
||||
30: 248401dc addiu a0,a0,476
|
||||
34: 10000069 b 1dc <[^>]*>
|
||||
38: 00000000 nop
|
||||
3c: 24840234 addiu a0,a0,564
|
||||
40: 1000007c b 234 <[^>]*>
|
||||
44: 00000000 nop
|
||||
48: 8f990000 lw t9,0\(gp\)
|
||||
4c: 00000000 nop
|
||||
50: 27390234 addiu t9,t9,564
|
||||
54: 0320f809 jalr t9
|
||||
58: 00000000 nop
|
||||
5c: 8fbc0008 lw gp,8\(sp\)
|
||||
60: 8f840000 lw a0,0\(gp\)
|
||||
64: 00000000 nop
|
||||
68: 24840000 addiu a0,a0,0
|
||||
6c: 8c840000 lw a0,0\(a0\)
|
||||
70: 8f840000 lw a0,0\(gp\)
|
||||
74: 00000000 nop
|
||||
3c: 8f990000 lw t9,0\(gp\)
|
||||
40: 273901dc addiu t9,t9,476
|
||||
44: 0320f809 jalr t9
|
||||
48: 00000000 nop
|
||||
4c: 8fbc0008 lw gp,8\(sp\)
|
||||
50: 8f840000 lw a0,0\(gp\)
|
||||
54: 24840000 addiu a0,a0,0
|
||||
58: 8c840000 lw a0,0\(a0\)
|
||||
5c: 8f840000 lw a0,0\(gp\)
|
||||
60: 24840000 addiu a0,a0,0
|
||||
64: 8c840000 lw a0,0\(a0\)
|
||||
68: 8f840000 lw a0,0\(gp\)
|
||||
6c: 248401dc addiu a0,a0,476
|
||||
70: 8c840000 lw a0,0\(a0\)
|
||||
74: 8f840000 lw a0,0\(gp\)
|
||||
78: 24840000 addiu a0,a0,0
|
||||
7c: 8c840000 lw a0,0\(a0\)
|
||||
7c: dc840000 ld a0,0\(a0\)
|
||||
80: 8f840000 lw a0,0\(gp\)
|
||||
84: 00000000 nop
|
||||
88: 24840234 addiu a0,a0,564
|
||||
8c: 8c840000 lw a0,0\(a0\)
|
||||
90: 8f840000 lw a0,0\(gp\)
|
||||
94: 00000000 nop
|
||||
98: 24840000 addiu a0,a0,0
|
||||
9c: dc840000 ld a0,0\(a0\)
|
||||
a0: 8f840000 lw a0,0\(gp\)
|
||||
a4: 00000000 nop
|
||||
a8: 24840000 addiu a0,a0,0
|
||||
ac: dc840000 ld a0,0\(a0\)
|
||||
b0: 8f840000 lw a0,0\(gp\)
|
||||
b4: 00000000 nop
|
||||
b8: 24840234 addiu a0,a0,564
|
||||
bc: dc840000 ld a0,0\(a0\)
|
||||
c0: 8f810000 lw at,0\(gp\)
|
||||
c4: 00000000 nop
|
||||
c8: 24210000 addiu at,at,0
|
||||
cc: ac240000 sw a0,0\(at\)
|
||||
d0: 8f810000 lw at,0\(gp\)
|
||||
d4: 00000000 nop
|
||||
d8: 24210000 addiu at,at,0
|
||||
dc: ac240000 sw a0,0\(at\)
|
||||
84: 24840000 addiu a0,a0,0
|
||||
88: dc840000 ld a0,0\(a0\)
|
||||
8c: 8f840000 lw a0,0\(gp\)
|
||||
90: 248401dc addiu a0,a0,476
|
||||
94: dc840000 ld a0,0\(a0\)
|
||||
98: 8f810000 lw at,0\(gp\)
|
||||
9c: 24210000 addiu at,at,0
|
||||
a0: ac240000 sw a0,0\(at\)
|
||||
a4: 8f810000 lw at,0\(gp\)
|
||||
a8: 24210000 addiu at,at,0
|
||||
ac: ac240000 sw a0,0\(at\)
|
||||
b0: 8f810000 lw at,0\(gp\)
|
||||
b4: 24210000 addiu at,at,0
|
||||
b8: fc240000 sd a0,0\(at\)
|
||||
bc: 8f810000 lw at,0\(gp\)
|
||||
c0: 24210000 addiu at,at,0
|
||||
c4: fc240000 sd a0,0\(at\)
|
||||
c8: 8f810000 lw at,0\(gp\)
|
||||
cc: 24210000 addiu at,at,0
|
||||
d0: 80240000 lb a0,0\(at\)
|
||||
d4: 90210001 lbu at,1\(at\)
|
||||
d8: 00042200 sll a0,a0,0x8
|
||||
dc: 00812025 or a0,a0,at
|
||||
e0: 8f810000 lw at,0\(gp\)
|
||||
e4: 00000000 nop
|
||||
e8: 24210000 addiu at,at,0
|
||||
ec: fc240000 sd a0,0\(at\)
|
||||
f0: 8f810000 lw at,0\(gp\)
|
||||
f4: 00000000 nop
|
||||
f8: 24210000 addiu at,at,0
|
||||
fc: fc240000 sd a0,0\(at\)
|
||||
e4: 24210000 addiu at,at,0
|
||||
e8: a0240001 sb a0,1\(at\)
|
||||
ec: 00042202 srl a0,a0,0x8
|
||||
f0: a0240000 sb a0,0\(at\)
|
||||
f4: 90210001 lbu at,1\(at\)
|
||||
f8: 00042200 sll a0,a0,0x8
|
||||
fc: 00812025 or a0,a0,at
|
||||
100: 8f810000 lw at,0\(gp\)
|
||||
104: 00000000 nop
|
||||
108: 24210000 addiu at,at,0
|
||||
10c: 80240000 lb a0,0\(at\)
|
||||
110: 90210001 lbu at,1\(at\)
|
||||
114: 00042200 sll a0,a0,0x8
|
||||
118: 00812025 or a0,a0,at
|
||||
11c: 8f810000 lw at,0\(gp\)
|
||||
120: 00000000 nop
|
||||
124: 24210000 addiu at,at,0
|
||||
128: a0240001 sb a0,1\(at\)
|
||||
12c: 00042202 srl a0,a0,0x8
|
||||
130: a0240000 sb a0,0\(at\)
|
||||
134: 90210001 lbu at,1\(at\)
|
||||
138: 00042200 sll a0,a0,0x8
|
||||
13c: 00812025 or a0,a0,at
|
||||
140: 8f810000 lw at,0\(gp\)
|
||||
144: 00000000 nop
|
||||
148: 24210000 addiu at,at,0
|
||||
14c: 88240000 lwl a0,0\(at\)
|
||||
150: 98240003 lwr a0,3\(at\)
|
||||
154: 8f810000 lw at,0\(gp\)
|
||||
158: 00000000 nop
|
||||
15c: 24210000 addiu at,at,0
|
||||
160: a8240000 swl a0,0\(at\)
|
||||
164: b8240003 swr a0,3\(at\)
|
||||
168: 3404ffc0 li a0,0xffc0
|
||||
16c: 000423bc dsll32 a0,a0,0xe
|
||||
170: 8f810000 lw at,0\(gp\)
|
||||
174: dc240000 ld a0,0\(at\)
|
||||
178: 3401ffc0 li at,0xffc0
|
||||
17c: 00010bbc dsll32 at,at,0xe
|
||||
180: 44a10000 dmtc1 at,\$f0
|
||||
184: 8f810000 lw at,0\(gp\)
|
||||
188: d4200008 ldc1 \$f0,8\(at\)
|
||||
18c: 64a40064 daddiu a0,a1,100
|
||||
190: 2c840001 sltiu a0,a0,1
|
||||
194: 64a40064 daddiu a0,a1,100
|
||||
198: 0004202b sltu a0,zero,a0
|
||||
19c: 00a0202d move a0,a1
|
||||
1a0: 8f840000 lw a0,0\(gp\)
|
||||
1a4: 00000000 nop
|
||||
1a8: 24840000 addiu a0,a0,0
|
||||
1ac: 8f840000 lw a0,0\(gp\)
|
||||
1b0: 00000000 nop
|
||||
1b4: 24840000 addiu a0,a0,0
|
||||
1b8: 8f810000 lw at,0\(gp\)
|
||||
1bc: 00000000 nop
|
||||
1c0: 24210000 addiu at,at,0
|
||||
1c4: 68240000 ldl a0,0\(at\)
|
||||
1c8: 6c240007 ldr a0,7\(at\)
|
||||
1cc: 8f810000 lw at,0\(gp\)
|
||||
1d0: 00000000 nop
|
||||
1d4: 24210000 addiu at,at,0
|
||||
1d8: b0240000 sdl a0,0\(at\)
|
||||
1dc: b4240007 sdr a0,7\(at\)
|
||||
1e0: 34018000 li at,0x8000
|
||||
1e4: 00010c38 dsll at,at,0x10
|
||||
1e8: 0081082a slt at,a0,at
|
||||
1ec: 10200011 beqz at,234 <[^>]*>
|
||||
1f0: 00000000 nop
|
||||
1f4: 34018000 li at,0x8000
|
||||
1f8: 00010c78 dsll at,at,0x11
|
||||
1fc: 0081082b sltu at,a0,at
|
||||
200: 1020000c beqz at,234 <[^>]*>
|
||||
204: 00000000 nop
|
||||
208: 34018000 li at,0x8000
|
||||
20c: 00010c38 dsll at,at,0x10
|
||||
210: 0081082a slt at,a0,at
|
||||
214: 14200007 bnez at,234 <[^>]*>
|
||||
218: 00000000 nop
|
||||
21c: 34018000 li at,0x8000
|
||||
220: 00010c78 dsll at,at,0x11
|
||||
224: 0081082b sltu at,a0,at
|
||||
228: 14200002 bnez at,234 <[^>]*>
|
||||
22c: 00000000 nop
|
||||
230: 46231040 add.d \$f1,\$f2,\$f3
|
||||
104: 24210000 addiu at,at,0
|
||||
108: 88240000 lwl a0,0\(at\)
|
||||
10c: 98240003 lwr a0,3\(at\)
|
||||
110: 8f810000 lw at,0\(gp\)
|
||||
114: 24210000 addiu at,at,0
|
||||
118: a8240000 swl a0,0\(at\)
|
||||
11c: b8240003 swr a0,3\(at\)
|
||||
120: 3404ffc0 li a0,0xffc0
|
||||
124: 000423bc dsll32 a0,a0,0xe
|
||||
128: 8f810000 lw at,0\(gp\)
|
||||
12c: dc240000 ld a0,0\(at\)
|
||||
130: 3401ffc0 li at,0xffc0
|
||||
134: 00010bbc dsll32 at,at,0xe
|
||||
138: 44a10000 dmtc1 at,\$f0
|
||||
13c: 8f810000 lw at,0\(gp\)
|
||||
140: d4200008 ldc1 \$f0,8\(at\)
|
||||
144: 64a40064 daddiu a0,a1,100
|
||||
148: 2c840001 sltiu a0,a0,1
|
||||
14c: 64a40064 daddiu a0,a1,100
|
||||
150: 0004202b sltu a0,zero,a0
|
||||
154: 00a0202d move a0,a1
|
||||
158: 8f840000 lw a0,0\(gp\)
|
||||
15c: 24840000 addiu a0,a0,0
|
||||
160: 8f840000 lw a0,0\(gp\)
|
||||
164: 24840000 addiu a0,a0,0
|
||||
168: 8f810000 lw at,0\(gp\)
|
||||
16c: 24210000 addiu at,at,0
|
||||
170: 68240000 ldl a0,0\(at\)
|
||||
174: 6c240007 ldr a0,7\(at\)
|
||||
178: 8f810000 lw at,0\(gp\)
|
||||
17c: 24210000 addiu at,at,0
|
||||
180: b0240000 sdl a0,0\(at\)
|
||||
184: b4240007 sdr a0,7\(at\)
|
||||
188: 34018000 li at,0x8000
|
||||
18c: 00010c38 dsll at,at,0x10
|
||||
190: 0081082a slt at,a0,at
|
||||
194: 10200011 beqz at,1dc <[^>]*>
|
||||
198: 00000000 nop
|
||||
19c: 34018000 li at,0x8000
|
||||
1a0: 00010c78 dsll at,at,0x11
|
||||
1a4: 0081082b sltu at,a0,at
|
||||
1a8: 1020000c beqz at,1dc <[^>]*>
|
||||
1ac: 00000000 nop
|
||||
1b0: 34018000 li at,0x8000
|
||||
1b4: 00010c38 dsll at,at,0x10
|
||||
1b8: 0081082a slt at,a0,at
|
||||
1bc: 14200007 bnez at,1dc <[^>]*>
|
||||
1c0: 00000000 nop
|
||||
1c4: 34018000 li at,0x8000
|
||||
1c8: 00010c78 dsll at,at,0x11
|
||||
1cc: 0081082b sltu at,a0,at
|
||||
1d0: 14200002 bnez at,1dc <[^>]*>
|
||||
1d4: 00000000 nop
|
||||
1d8: 46231040 add.d \$f1,\$f2,\$f3
|
||||
|
||||
0+0234 <[^>]*>:
|
||||
0+01dc <[^>]*>:
|
||||
...
|
||||
|
|
|
|||
|
|
@ -458,7 +458,8 @@ if { [istarget mips*-*-*] } then {
|
|||
run_dump_test_arches "lb" [mips_arch_list_matching !mips2]
|
||||
}
|
||||
if $elf {
|
||||
run_dump_test_arches "lb-svr4pic" [mips_arch_list_matching mips1]
|
||||
run_dump_test_arches "lb-svr4pic" [mips_arch_list_matching !gpr_ilocks]
|
||||
run_dump_test_arches "lb-svr4pic-ilocks" [mips_arch_list_matching gpr_ilocks]
|
||||
}
|
||||
if $elf {
|
||||
# Both versions specify the cpu, so we can run both regardless of
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ Disassembly of section \.text:
|
|||
0+0004 <[^>]*> move v0,a0
|
||||
0+0008 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*8: R_MIPS_GOT16 \.text
|
||||
0+000c <[^>]*> addiu at,at,876
|
||||
0+000c <[^>]*> addiu at,at,868
|
||||
[ ]*c: R_MIPS_LO16 \.text
|
||||
0+0010 <[^>]*> jr at
|
||||
0+0014 <[^>]*> move v0,a0
|
||||
|
|
@ -19,7 +19,7 @@ Disassembly of section \.text:
|
|||
0+001c <[^>]*> lw v0,0\(a0\)
|
||||
0+0020 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*20: R_MIPS_GOT16 \.text
|
||||
0+0024 <[^>]*> addiu at,at,876
|
||||
0+0024 <[^>]*> addiu at,at,868
|
||||
[ ]*24: R_MIPS_LO16 \.text
|
||||
0+0028 <[^>]*> jr at
|
||||
0+002c <[^>]*> lw v0,0\(a0\)
|
||||
|
|
@ -27,7 +27,7 @@ Disassembly of section \.text:
|
|||
0+0034 <[^>]*> sw v0,0\(a0\)
|
||||
0+0038 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*38: R_MIPS_GOT16 \.text
|
||||
0+003c <[^>]*> addiu at,at,876
|
||||
0+003c <[^>]*> addiu at,at,868
|
||||
[ ]*3c: R_MIPS_LO16 \.text
|
||||
0+0040 <[^>]*> jr at
|
||||
0+0044 <[^>]*> sw v0,0\(a0\)
|
||||
|
|
@ -39,7 +39,7 @@ Disassembly of section \.text:
|
|||
0+005c <[^>]*> nop
|
||||
0+0060 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*60: R_MIPS_GOT16 \.text
|
||||
0+0064 <[^>]*> addiu at,at,876
|
||||
0+0064 <[^>]*> addiu at,at,868
|
||||
[ ]*64: R_MIPS_LO16 \.text
|
||||
0+0068 <[^>]*> jr at
|
||||
0+006c <[^>]*> nop
|
||||
|
|
@ -49,7 +49,7 @@ Disassembly of section \.text:
|
|||
0+007c <[^>]*> nop
|
||||
0+0080 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*80: R_MIPS_GOT16 \.text
|
||||
0+0084 <[^>]*> addiu at,at,876
|
||||
0+0084 <[^>]*> addiu at,at,868
|
||||
[ ]*84: R_MIPS_LO16 \.text
|
||||
0+0088 <[^>]*> jr at
|
||||
0+008c <[^>]*> move v0,a0
|
||||
|
|
@ -61,7 +61,7 @@ Disassembly of section \.text:
|
|||
0+00a4 <[^>]*> nop
|
||||
0+00a8 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*a8: R_MIPS_GOT16 \.text
|
||||
0+00ac <[^>]*> addiu at,at,876
|
||||
0+00ac <[^>]*> addiu at,at,868
|
||||
[ ]*ac: R_MIPS_LO16 \.text
|
||||
0+00b0 <[^>]*> jr at
|
||||
0+00b4 <[^>]*> nop
|
||||
|
|
@ -71,7 +71,7 @@ Disassembly of section \.text:
|
|||
0+00c4 <[^>]*> nop
|
||||
0+00c8 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*c8: R_MIPS_GOT16 \.text
|
||||
0+00cc <[^>]*> addiu at,at,876
|
||||
0+00cc <[^>]*> addiu at,at,868
|
||||
[ ]*cc: R_MIPS_LO16 \.text
|
||||
0+00d0 <[^>]*> jr at
|
||||
0+00d4 <[^>]*> addiu v0,a0,1
|
||||
|
|
@ -83,7 +83,7 @@ Disassembly of section \.text:
|
|||
0+00ec <[^>]*> nop
|
||||
0+00f0 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*f0: R_MIPS_GOT16 \.text
|
||||
0+00f4 <[^>]*> addiu at,at,876
|
||||
0+00f4 <[^>]*> addiu at,at,868
|
||||
[ ]*f4: R_MIPS_LO16 \.text
|
||||
0+00f8 <[^>]*> jr at
|
||||
0+00fc <[^>]*> nop
|
||||
|
|
@ -93,7 +93,7 @@ Disassembly of section \.text:
|
|||
0+010c <[^>]*> nop
|
||||
0+0110 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*110: R_MIPS_GOT16 \.text
|
||||
0+0114 <[^>]*> addiu at,at,876
|
||||
0+0114 <[^>]*> addiu at,at,868
|
||||
[ ]*114: R_MIPS_LO16 \.text
|
||||
0+0118 <[^>]*> jr at
|
||||
0+011c <[^>]*> lw v0,0\(a0\)
|
||||
|
|
@ -103,7 +103,7 @@ Disassembly of section \.text:
|
|||
0+012c <[^>]*> nop
|
||||
0+0130 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*130: R_MIPS_GOT16 \.text
|
||||
0+0134 <[^>]*> addiu at,at,876
|
||||
0+0134 <[^>]*> addiu at,at,868
|
||||
[ ]*134: R_MIPS_LO16 \.text
|
||||
0+0138 <[^>]*> jr at
|
||||
0+013c <[^>]*> sw v0,0\(a0\)
|
||||
|
|
@ -113,7 +113,7 @@ Disassembly of section \.text:
|
|||
0+014c <[^>]*> nop
|
||||
0+0150 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*150: R_MIPS_GOT16 \.text
|
||||
0+0154 <[^>]*> addiu at,at,876
|
||||
0+0154 <[^>]*> addiu at,at,868
|
||||
[ ]*154: R_MIPS_LO16 \.text
|
||||
0+0158 <[^>]*> jr at
|
||||
0+015c <[^>]*> sw v0,0\(a0\)
|
||||
|
|
@ -127,7 +127,7 @@ Disassembly of section \.text:
|
|||
0+017c <[^>]*> nop
|
||||
0+0180 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*180: R_MIPS_GOT16 \.text
|
||||
0+0184 <[^>]*> addiu at,at,876
|
||||
0+0184 <[^>]*> addiu at,at,868
|
||||
[ ]*184: R_MIPS_LO16 \.text
|
||||
0+0188 <[^>]*> jr at
|
||||
0+018c <[^>]*> nop
|
||||
|
|
@ -139,7 +139,7 @@ Disassembly of section \.text:
|
|||
0+01a4 <[^>]*> nop
|
||||
0+01a8 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*1a8: R_MIPS_GOT16 \.text
|
||||
0+01ac <[^>]*> addiu at,at,876
|
||||
0+01ac <[^>]*> addiu at,at,868
|
||||
[ ]*1ac: R_MIPS_LO16 \.text
|
||||
0+01b0 <[^>]*> jr at
|
||||
0+01b4 <[^>]*> move a2,a3
|
||||
|
|
@ -151,7 +151,7 @@ Disassembly of section \.text:
|
|||
0+01cc <[^>]*> nop
|
||||
0+01d0 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*1d0: R_MIPS_GOT16 \.text
|
||||
0+01d4 <[^>]*> addiu at,at,876
|
||||
0+01d4 <[^>]*> addiu at,at,868
|
||||
[ ]*1d4: R_MIPS_LO16 \.text
|
||||
0+01d8 <[^>]*> jr at
|
||||
0+01dc <[^>]*> nop
|
||||
|
|
@ -161,7 +161,7 @@ Disassembly of section \.text:
|
|||
0+01ec <[^>]*> move v0,a0
|
||||
0+01f0 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*1f0: R_MIPS_GOT16 \.text
|
||||
0+01f4 <[^>]*> addiu at,at,876
|
||||
0+01f4 <[^>]*> addiu at,at,868
|
||||
[ ]*1f4: R_MIPS_LO16 \.text
|
||||
0+01f8 <[^>]*> jr at
|
||||
0+01fc <[^>]*> nop
|
||||
|
|
@ -171,7 +171,7 @@ Disassembly of section \.text:
|
|||
0+020c <[^>]*> move v0,a0
|
||||
0+0210 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*210: R_MIPS_GOT16 \.text
|
||||
0+0214 <[^>]*> addiu at,at,876
|
||||
0+0214 <[^>]*> addiu at,at,868
|
||||
[ ]*214: R_MIPS_LO16 \.text
|
||||
0+0218 <[^>]*> jr at
|
||||
0+021c <[^>]*> nop
|
||||
|
|
@ -183,98 +183,96 @@ Disassembly of section \.text:
|
|||
0+0234 <[^>]*> move v0,a0
|
||||
0+0238 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*238: R_MIPS_GOT16 \.text
|
||||
0+023c <[^>]*> addiu at,at,876
|
||||
0+023c <[^>]*> addiu at,at,868
|
||||
[ ]*23c: R_MIPS_LO16 \.text
|
||||
0+0240 <[^>]*> jr at
|
||||
0+0244 <[^>]*> nop
|
||||
0+0248 <[^>]*> lw at,0\(gp\)
|
||||
[ ]*248: R_MIPS_GOT16 \.text
|
||||
0+024c <[^>]*> nop
|
||||
0+0250 <[^>]*> addiu at,at,600
|
||||
[ ]*250: R_MIPS_LO16 \.text
|
||||
0+0254 <[^>]*> sw v0,0\(at\)
|
||||
0+0258 <[^>]*> b 00000000 <foo>
|
||||
0+025c <[^>]*> nop
|
||||
0+0260 <[^>]*> lw at,0\(gp\)
|
||||
[ ]*260: R_MIPS_GOT16 \.text
|
||||
0+0264 <[^>]*> nop
|
||||
0+0268 <[^>]*> addiu at,at,624
|
||||
[ ]*268: R_MIPS_LO16 \.text
|
||||
0+026c <[^>]*> sw v0,0\(at\)
|
||||
0+0270 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*270: R_MIPS_GOT16 \.text
|
||||
0+0274 <[^>]*> addiu at,at,876
|
||||
[ ]*274: R_MIPS_LO16 \.text
|
||||
0+0278 <[^>]*> jr at
|
||||
0+027c <[^>]*> nop
|
||||
0+0280 <[^>]*> b 00000000 <foo>
|
||||
0+0284 <[^>]*> lwc1 \$f0,0\(a0\)
|
||||
0+0288 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*288: R_MIPS_GOT16 \.text
|
||||
0+028c <[^>]*> addiu at,at,876
|
||||
[ ]*28c: R_MIPS_LO16 \.text
|
||||
0+0290 <[^>]*> jr at
|
||||
0+0294 <[^>]*> lwc1 \$f0,0\(a0\)
|
||||
0+0298 <[^>]*> cfc1 v0,\$31
|
||||
0+029c <[^>]*> b 00000000 <foo>
|
||||
0+02a0 <[^>]*> nop
|
||||
0+02a4 <[^>]*> cfc1 v0,\$31
|
||||
0+02a8 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*2a8: R_MIPS_GOT16 \.text
|
||||
0+02ac <[^>]*> addiu at,at,876
|
||||
[ ]*2ac: R_MIPS_LO16 \.text
|
||||
0+02b0 <[^>]*> jr at
|
||||
0+02b4 <[^>]*> nop
|
||||
0+02b8 <[^>]*> ctc1 v0,\$31
|
||||
0+02bc <[^>]*> b 00000000 <foo>
|
||||
0+02c0 <[^>]*> nop
|
||||
0+02c4 <[^>]*> ctc1 v0,\$31
|
||||
0+02c8 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*2c8: R_MIPS_GOT16 \.text
|
||||
0+02cc <[^>]*> addiu at,at,876
|
||||
[ ]*2cc: R_MIPS_LO16 \.text
|
||||
0+02d0 <[^>]*> jr at
|
||||
0+02d4 <[^>]*> nop
|
||||
0+02d8 <[^>]*> mtc1 v0,\$f31
|
||||
0+02dc <[^>]*> b 00000000 <foo>
|
||||
0+02e0 <[^>]*> nop
|
||||
0+02e4 <[^>]*> mtc1 v0,\$f31
|
||||
0+02e8 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*2e8: R_MIPS_GOT16 \.text
|
||||
0+02ec <[^>]*> addiu at,at,876
|
||||
[ ]*2ec: R_MIPS_LO16 \.text
|
||||
0+02f0 <[^>]*> jr at
|
||||
0+02f4 <[^>]*> nop
|
||||
0+02f8 <[^>]*> mfhi v0
|
||||
0+02fc <[^>]*> b 00000000 <foo>
|
||||
0+0300 <[^>]*> nop
|
||||
0+0304 <[^>]*> mfhi v0
|
||||
0+0308 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*308: R_MIPS_GOT16 \.text
|
||||
0+030c <[^>]*> addiu at,at,876
|
||||
[ ]*30c: R_MIPS_LO16 \.text
|
||||
0+0310 <[^>]*> jr at
|
||||
0+0314 <[^>]*> nop
|
||||
0+0318 <[^>]*> move v0,a0
|
||||
0+031c <[^>]*> jr v0
|
||||
0+0320 <[^>]*> nop
|
||||
0+0324 <[^>]*> jr a0
|
||||
0+0328 <[^>]*> move v0,a0
|
||||
0+032c <[^>]*> move v0,a0
|
||||
0+0330 <[^>]*> jalr v0
|
||||
0+0334 <[^>]*> nop
|
||||
0+0338 <[^>]*> jalr a0
|
||||
0+033c <[^>]*> move v0,a0
|
||||
0+0340 <[^>]*> move v0,ra
|
||||
0+0344 <[^>]*> jalr v1
|
||||
0+0348 <[^>]*> nop
|
||||
0+034c <[^>]*> move ra,a0
|
||||
0+0350 <[^>]*> jalr a1
|
||||
0+0354 <[^>]*> nop
|
||||
0+0358 <[^>]*> jalr v0,v1
|
||||
0+035c <[^>]*> move ra,a0
|
||||
0+0360 <[^>]*> move v0,ra
|
||||
0+0364 <[^>]*> jalr v0,v1
|
||||
0+0368 <[^>]*> nop
|
||||
0+024c <[^>]*> addiu at,at,596
|
||||
[ ]*24c: R_MIPS_LO16 \.text
|
||||
0+0250 <[^>]*> sw v0,0\(at\)
|
||||
0+0254 <[^>]*> b 00000000 <foo>
|
||||
0+0258 <[^>]*> nop
|
||||
0+025c <[^>]*> lw at,0\(gp\)
|
||||
[ ]*25c: R_MIPS_GOT16 \.text
|
||||
0+0260 <[^>]*> addiu at,at,616
|
||||
[ ]*260: R_MIPS_LO16 \.text
|
||||
0+0264 <[^>]*> sw v0,0\(at\)
|
||||
0+0268 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*268: R_MIPS_GOT16 \.text
|
||||
0+026c <[^>]*> addiu at,at,868
|
||||
[ ]*26c: R_MIPS_LO16 \.text
|
||||
0+0270 <[^>]*> jr at
|
||||
0+0274 <[^>]*> nop
|
||||
0+0278 <[^>]*> b 00000000 <foo>
|
||||
0+027c <[^>]*> lwc1 \$f0,0\(a0\)
|
||||
0+0280 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*280: R_MIPS_GOT16 \.text
|
||||
0+0284 <[^>]*> addiu at,at,868
|
||||
[ ]*284: R_MIPS_LO16 \.text
|
||||
0+0288 <[^>]*> jr at
|
||||
0+028c <[^>]*> lwc1 \$f0,0\(a0\)
|
||||
0+0290 <[^>]*> cfc1 v0,\$31
|
||||
0+0294 <[^>]*> b 00000000 <foo>
|
||||
0+0298 <[^>]*> nop
|
||||
0+029c <[^>]*> cfc1 v0,\$31
|
||||
0+02a0 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*2a0: R_MIPS_GOT16 \.text
|
||||
0+02a4 <[^>]*> addiu at,at,868
|
||||
[ ]*2a4: R_MIPS_LO16 \.text
|
||||
0+02a8 <[^>]*> jr at
|
||||
0+02ac <[^>]*> nop
|
||||
0+02b0 <[^>]*> ctc1 v0,\$31
|
||||
0+02b4 <[^>]*> b 00000000 <foo>
|
||||
0+02b8 <[^>]*> nop
|
||||
0+02bc <[^>]*> ctc1 v0,\$31
|
||||
0+02c0 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*2c0: R_MIPS_GOT16 \.text
|
||||
0+02c4 <[^>]*> addiu at,at,868
|
||||
[ ]*2c4: R_MIPS_LO16 \.text
|
||||
0+02c8 <[^>]*> jr at
|
||||
0+02cc <[^>]*> nop
|
||||
0+02d0 <[^>]*> mtc1 v0,\$f31
|
||||
0+02d4 <[^>]*> b 00000000 <foo>
|
||||
0+02d8 <[^>]*> nop
|
||||
0+02dc <[^>]*> mtc1 v0,\$f31
|
||||
0+02e0 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*2e0: R_MIPS_GOT16 \.text
|
||||
0+02e4 <[^>]*> addiu at,at,868
|
||||
[ ]*2e4: R_MIPS_LO16 \.text
|
||||
0+02e8 <[^>]*> jr at
|
||||
0+02ec <[^>]*> nop
|
||||
0+02f0 <[^>]*> mfhi v0
|
||||
0+02f4 <[^>]*> b 00000000 <foo>
|
||||
0+02f8 <[^>]*> nop
|
||||
0+02fc <[^>]*> mfhi v0
|
||||
0+0300 <[^>]*> lw at,2\(gp\)
|
||||
[ ]*300: R_MIPS_GOT16 \.text
|
||||
0+0304 <[^>]*> addiu at,at,868
|
||||
[ ]*304: R_MIPS_LO16 \.text
|
||||
0+0308 <[^>]*> jr at
|
||||
0+030c <[^>]*> nop
|
||||
0+0310 <[^>]*> move v0,a0
|
||||
0+0314 <[^>]*> jr v0
|
||||
0+0318 <[^>]*> nop
|
||||
0+031c <[^>]*> jr a0
|
||||
0+0320 <[^>]*> move v0,a0
|
||||
0+0324 <[^>]*> move v0,a0
|
||||
0+0328 <[^>]*> jalr v0
|
||||
0+032c <[^>]*> nop
|
||||
0+0330 <[^>]*> jalr a0
|
||||
0+0334 <[^>]*> move v0,a0
|
||||
0+0338 <[^>]*> move v0,ra
|
||||
0+033c <[^>]*> jalr v1
|
||||
0+0340 <[^>]*> nop
|
||||
0+0344 <[^>]*> move ra,a0
|
||||
0+0348 <[^>]*> jalr a1
|
||||
0+034c <[^>]*> nop
|
||||
0+0350 <[^>]*> jalr v0,v1
|
||||
0+0354 <[^>]*> move ra,a0
|
||||
0+0358 <[^>]*> move v0,ra
|
||||
0+035c <[^>]*> jalr v0,v1
|
||||
0+0360 <[^>]*> nop
|
||||
\.\.\.
|
||||
\.\.\.
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue