Support for disassembling parallel instructions added.
Insn attributes hand patched until cgen can generate the correct values.
This commit is contained in:
Nick Clifton
parent
cc662e8676
commit
23cf992f4a
6 changed files with 1610 additions and 1065 deletions
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@ -21,6 +21,7 @@ You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "sysdep.h"
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#include <ctype.h>
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#include <stdio.h>
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#include "ansidecl.h"
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@ -34,10 +35,10 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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compiled with GCC), or switch to macros, or use something else.
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*/
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static const char *parse_insn_normal
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PARAMS ((const struct cgen_insn *, const char **, struct cgen_fields *));
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static const char * parse_insn_normal
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PARAMS ((const CGEN_INSN *, const char **, CGEN_FIELDS *));
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static void insert_insn_normal
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PARAMS ((const struct cgen_insn *, struct cgen_fields *, cgen_insn_t *));
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PARAMS ((const CGEN_INSN *, CGEN_FIELDS *, cgen_insn_t *));
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/* Default insertion routine.
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@ -119,393 +120,6 @@ insert_normal (value, attrs, start, length, shift, total_length, buffer)
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}
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/* -- assembler routines inserted here */
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/* -- asm.c */
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/* Handle shigh(), high(). */
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static const char *
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parse_h_hi16 (strp, opindex, min, max, valuep)
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const char **strp;
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int opindex;
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unsigned long min, max;
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unsigned long *valuep;
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{
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const char *errmsg;
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/* FIXME: Need # in assembler syntax (means '#' is optional). */
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if (**strp == '#')
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++*strp;
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if (strncmp (*strp, "high(", 5) == 0)
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{
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*strp += 5;
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/* FIXME: If value was a number, right shift by 16. */
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errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_HI16_ULO, valuep);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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return errmsg;
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}
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else if (strncmp (*strp, "shigh(", 6) == 0)
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{
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*strp += 6;
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/* FIXME: If value was a number, right shift by 16 (+ sign test). */
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errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_HI16_SLO, valuep);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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return errmsg;
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}
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return cgen_parse_unsigned_integer (strp, opindex, min, max, valuep);
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}
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/* Handle low() in a signed context. Also handle sda().
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The signedness of the value doesn't matter to low(), but this also
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handles the case where low() isn't present. */
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static const char *
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parse_h_slo16 (strp, opindex, min, max, valuep)
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const char **strp;
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int opindex;
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long min, max;
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long *valuep;
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{
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const char *errmsg;
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/* FIXME: Need # in assembler syntax (means '#' is optional). */
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if (**strp == '#')
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++*strp;
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if (strncmp (*strp, "low(", 4) == 0)
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{
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*strp += 4;
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errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_LO16, valuep);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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return errmsg;
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}
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if (strncmp (*strp, "sda(", 4) == 0)
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{
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*strp += 4;
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errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_SDA16, valuep);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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return errmsg;
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}
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return cgen_parse_signed_integer (strp, opindex, min, max, valuep);
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}
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/* Handle low() in an unsigned context.
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The signedness of the value doesn't matter to low(), but this also
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handles the case where low() isn't present. */
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static const char *
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parse_h_ulo16 (strp, opindex, min, max, valuep)
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const char **strp;
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int opindex;
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unsigned long min, max;
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unsigned long *valuep;
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{
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const char *errmsg;
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/* FIXME: Need # in assembler syntax (means '#' is optional). */
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if (**strp == '#')
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++*strp;
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if (strncmp (*strp, "low(", 4) == 0)
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{
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*strp += 4;
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errmsg = cgen_parse_address (strp, opindex, BFD_RELOC_M32R_LO16, valuep);
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if (**strp != ')')
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return "missing `)'";
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++*strp;
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return errmsg;
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}
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return cgen_parse_unsigned_integer (strp, opindex, min, max, valuep);
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}
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/* -- */
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/* Main entry point for operand parsing.
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This function is basically just a big switch statement. Earlier versions
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used tables to look up the function to use, but
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- if the table contains both assembler and disassembler functions then
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the disassembler contains much of the assembler and vice-versa,
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- there's a lot of inlining possibilities as things grow,
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- using a switch statement avoids the function call overhead.
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This function could be moved into `parse_insn_normal', but keeping it
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separate makes clear the interface between `parse_insn_normal' and each of
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the handlers.
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*/
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CGEN_INLINE const char *
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m32r_cgen_parse_operand (opindex, strp, fields)
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int opindex;
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const char **strp;
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struct cgen_fields *fields;
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{
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const char *errmsg;
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switch (opindex)
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{
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case 0 :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, &fields->f_r2);
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break;
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case 1 :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, &fields->f_r1);
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break;
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case 2 :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, &fields->f_r1);
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break;
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case 3 :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_gr, &fields->f_r2);
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break;
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case 4 :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_cr, &fields->f_r2);
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break;
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case 5 :
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errmsg = cgen_parse_keyword (strp, & m32r_cgen_opval_h_cr, &fields->f_r1);
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break;
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case 6 :
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errmsg = cgen_parse_signed_integer (strp, 6, -128, 127, &fields->f_simm8);
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break;
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case 7 :
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errmsg = cgen_parse_signed_integer (strp, 7, -32768, 32767, &fields->f_simm16);
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break;
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case 8 :
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errmsg = cgen_parse_unsigned_integer (strp, 8, 0, 15, &fields->f_uimm4);
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break;
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case 9 :
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errmsg = cgen_parse_unsigned_integer (strp, 9, 0, 31, &fields->f_uimm5);
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break;
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case 10 :
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errmsg = cgen_parse_unsigned_integer (strp, 10, 0, 65535, &fields->f_uimm16);
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break;
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case 11 :
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errmsg = parse_h_hi16 (strp, 11, 0, 65535, &fields->f_hi16);
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break;
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case 12 :
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errmsg = parse_h_slo16 (strp, 12, -32768, 32767, &fields->f_simm16);
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break;
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case 13 :
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errmsg = parse_h_ulo16 (strp, 13, 0, 65535, &fields->f_uimm16);
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break;
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case 14 :
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errmsg = cgen_parse_address (strp, 14, 0, &fields->f_uimm24);
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break;
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case 15 :
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errmsg = cgen_parse_address (strp, 15, 0, &fields->f_disp8);
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break;
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case 16 :
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errmsg = cgen_parse_address (strp, 16, 0, &fields->f_disp16);
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break;
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case 17 :
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errmsg = cgen_parse_address (strp, 17, 0, &fields->f_disp24);
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break;
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default :
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fprintf (stderr, "Unrecognized field %d while parsing.\n", opindex);
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abort ();
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}
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return errmsg;
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}
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/* Main entry point for operand insertion.
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This function is basically just a big switch statement. Earlier versions
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used tables to look up the function to use, but
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- if the table contains both assembler and disassembler functions then
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the disassembler contains much of the assembler and vice-versa,
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- there's a lot of inlining possibilities as things grow,
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- using a switch statement avoids the function call overhead.
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This function could be moved into `parse_insn_normal', but keeping it
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separate makes clear the interface between `parse_insn_normal' and each of
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the handlers. It's also needed by GAS to insert operands that couldn't be
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resolved during parsing.
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*/
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CGEN_INLINE void
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m32r_cgen_insert_operand (opindex, fields, buffer)
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int opindex;
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struct cgen_fields *fields;
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cgen_insn_t *buffer;
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{
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switch (opindex)
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{
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case 0 :
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insert_normal (fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 1 :
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insert_normal (fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 2 :
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insert_normal (fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 3 :
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insert_normal (fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 4 :
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insert_normal (fields->f_r2, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 5 :
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insert_normal (fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 6 :
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insert_normal (fields->f_simm8, 0, 8, 8, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 7 :
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insert_normal (fields->f_simm16, 0, 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 8 :
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insert_normal (fields->f_uimm4, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 9 :
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insert_normal (fields->f_uimm5, 0|(1<<CGEN_OPERAND_UNSIGNED), 11, 5, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 10 :
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insert_normal (fields->f_uimm16, 0|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 11 :
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insert_normal (fields->f_hi16, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 12 :
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insert_normal (fields->f_simm16, 0, 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 13 :
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insert_normal (fields->f_uimm16, 0|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 14 :
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insert_normal (fields->f_uimm24, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_UNSIGNED), 8, 24, 0, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 15 :
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insert_normal (fields->f_disp8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 8, 2, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 16 :
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insert_normal (fields->f_disp16, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 16, 16, 2, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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case 17 :
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insert_normal (fields->f_disp24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 24, 2, CGEN_FIELDS_BITSIZE (fields), buffer);
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break;
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default :
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fprintf (stderr, "Unrecognized field %d while building insn.\n",
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opindex);
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abort ();
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}
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}
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/* Main entry point for operand validation.
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This function is called from GAS when it has fully resolved an operand
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that couldn't be resolved during parsing.
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The result is NULL for success or an error message (which may be
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computed into a static buffer).
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*/
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CGEN_INLINE const char *
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m32r_cgen_validate_operand (opindex, fields)
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int opindex;
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const struct cgen_fields *fields;
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{
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const char *errmsg = NULL;
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switch (opindex)
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{
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case 0 :
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/* nothing to do */
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break;
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case 1 :
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/* nothing to do */
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break;
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case 2 :
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/* nothing to do */
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break;
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case 3 :
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/* nothing to do */
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break;
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case 4 :
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/* nothing to do */
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break;
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case 5 :
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/* nothing to do */
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break;
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case 6 :
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errmsg = cgen_validate_signed_integer (fields->f_simm8, -128, 127);
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break;
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case 7 :
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errmsg = cgen_validate_signed_integer (fields->f_simm16, -32768, 32767);
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break;
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case 8 :
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errmsg = cgen_validate_unsigned_integer (fields->f_uimm4, 0, 15);
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break;
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case 9 :
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errmsg = cgen_validate_unsigned_integer (fields->f_uimm5, 0, 31);
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break;
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case 10 :
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errmsg = cgen_validate_unsigned_integer (fields->f_uimm16, 0, 65535);
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break;
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case 11 :
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errmsg = cgen_validate_unsigned_integer (fields->f_hi16, 0, 65535);
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break;
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case 12 :
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errmsg = cgen_validate_signed_integer (fields->f_simm16, -32768, 32767);
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break;
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case 13 :
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errmsg = cgen_validate_unsigned_integer (fields->f_uimm16, 0, 65535);
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break;
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case 14 :
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/* nothing to do */
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break;
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case 15 :
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/* nothing to do */
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break;
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case 16 :
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/* nothing to do */
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break;
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case 17 :
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/* nothing to do */
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break;
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default :
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fprintf (stderr, "Unrecognized field %d while validating operand.\n",
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opindex);
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abort ();
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}
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return errmsg;
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}
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cgen_parse_fn *m32r_cgen_parse_handlers[] = {
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0, /* default */
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parse_insn_normal,
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};
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cgen_insert_fn *m32r_cgen_insert_handlers[] = {
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0, /* default */
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insert_insn_normal,
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};
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void
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m32r_cgen_init_asm (mach, endian)
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int mach;
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enum cgen_endian endian;
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{
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m32r_cgen_init_tables (mach);
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cgen_set_cpu (& m32r_cgen_opcode_data, mach, endian);
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cgen_asm_init ();
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}
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/* Default insn parser.
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@ -523,32 +137,26 @@ m32r_cgen_init_asm (mach, endian)
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static const char *
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parse_insn_normal (insn, strp, fields)
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const struct cgen_insn *insn;
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const CGEN_INSN *insn;
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const char **strp;
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struct cgen_fields *fields;
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CGEN_FIELDS *fields;
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{
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const struct cgen_syntax *syntax = CGEN_INSN_SYNTAX (insn);
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const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
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const char *str = *strp;
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const char *errmsg;
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const char *p;
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const unsigned char *syn;
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#ifdef CGEN_MNEMONIC_OPERANDS
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int past_opcode_p;
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#endif
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/* If mnemonics are constant, they're not stored with the syntax string. */
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#ifndef CGEN_MNEMONIC_OPERANDS
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{
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const char *p = syntax->mnemonic;
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while (*p && *p == *str)
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++p, ++str;
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if (*p || (*str && !isspace (*str)))
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return "unrecognized instruction";
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while (isspace (*str))
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++str;
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}
|
||||
#endif
|
||||
/* For now we assume the mnemonic is first (there are no leading operands).
|
||||
We can parse it without needing to set up operand parsing. */
|
||||
p = CGEN_INSN_MNEMONIC (insn);
|
||||
while (*p && *p == *str)
|
||||
++p, ++str;
|
||||
if (*p || (*str && !isspace (*str)))
|
||||
return "unrecognized instruction";
|
||||
|
||||
CGEN_INIT_PARSE ();
|
||||
cgen_init_parse_operand ();
|
||||
|
|
@ -558,7 +166,12 @@ parse_insn_normal (insn, strp, fields)
|
|||
|
||||
/* We don't check for (*str != '\0') here because we want to parse
|
||||
any trailing fake arguments in the syntax string. */
|
||||
for (syn = syntax->syntax; *syn != '\0'; )
|
||||
syn = CGEN_SYNTAX_STRING (CGEN_INSN_SYNTAX (insn));
|
||||
/* Mnemonics come first for now, ensure valid string. */
|
||||
if (! CGEN_SYNTAX_MNEMONIC_P (*syn))
|
||||
abort ();
|
||||
++syn;
|
||||
while (*syn != 0)
|
||||
{
|
||||
/* Non operand chars must match exactly. */
|
||||
/* FIXME: Need to better handle whitespace. */
|
||||
|
|
@ -617,16 +230,16 @@ parse_insn_normal (insn, strp, fields)
|
|||
|
||||
static void
|
||||
insert_insn_normal (insn, fields, buffer)
|
||||
const struct cgen_insn *insn;
|
||||
struct cgen_fields *fields;
|
||||
const CGEN_INSN *insn;
|
||||
CGEN_FIELDS *fields;
|
||||
cgen_insn_t *buffer;
|
||||
{
|
||||
const struct cgen_syntax *syntax = CGEN_INSN_SYNTAX (insn);
|
||||
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
|
||||
bfd_vma value;
|
||||
const unsigned char *syn;
|
||||
|
||||
CGEN_INIT_INSERT ();
|
||||
value = syntax->value;
|
||||
value = CGEN_INSN_VALUE (insn);
|
||||
|
||||
/* If we're recording insns as numbers (rather than a string of bytes),
|
||||
target byte order handling is deferred until later. */
|
||||
|
|
@ -660,7 +273,7 @@ insert_insn_normal (insn, fields, buffer)
|
|||
/* ??? Rather than scanning the syntax string again, we could store
|
||||
in `fields' a null terminated list of the fields that are present. */
|
||||
|
||||
for (syn = syntax->syntax; *syn != '\0'; ++syn)
|
||||
for (syn = CGEN_SYNTAX_STRING (syntax); *syn != '\0'; ++syn)
|
||||
{
|
||||
if (CGEN_SYNTAX_CHAR_P (*syn))
|
||||
continue;
|
||||
|
|
@ -677,10 +290,10 @@ insert_insn_normal (insn, fields, buffer)
|
|||
or NULL if an error occured (an error message will have already been
|
||||
printed). */
|
||||
|
||||
const struct cgen_insn *
|
||||
const CGEN_INSN *
|
||||
m32r_cgen_assemble_insn (str, fields, buf, errmsg)
|
||||
const char *str;
|
||||
struct cgen_fields *fields;
|
||||
CGEN_FIELDS *fields;
|
||||
cgen_insn_t *buf;
|
||||
char **errmsg;
|
||||
{
|
||||
|
|
@ -700,7 +313,7 @@ m32r_cgen_assemble_insn (str, fields, buf, errmsg)
|
|||
start = str;
|
||||
for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
|
||||
{
|
||||
const struct cgen_insn *insn = ilist->insn;
|
||||
const CGEN_INSN *insn = ilist->insn;
|
||||
|
||||
#if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */
|
||||
/* Is this insn supported by the selected cpu? */
|
||||
|
|
@ -758,12 +371,15 @@ m32r_cgen_assemble_insn (str, fields, buf, errmsg)
|
|||
This lets GAS parse registers for us.
|
||||
??? Interesting idea but not currently used. */
|
||||
|
||||
/* Record each member of OPVALS in the assembler's symbol table.
|
||||
FIXME: Not currently used. */
|
||||
|
||||
void
|
||||
m32r_cgen_asm_hash_keywords (opvals)
|
||||
struct cgen_keyword *opvals;
|
||||
CGEN_KEYWORD *opvals;
|
||||
{
|
||||
struct cgen_keyword_search search = cgen_keyword_search_init (opvals, NULL);
|
||||
const struct cgen_keyword_entry *ke;
|
||||
CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
|
||||
const CGEN_KEYWORD_ENTRY *ke;
|
||||
|
||||
while ((ke = cgen_keyword_search_next (&search)) != NULL)
|
||||
{
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue