CSKY: Add FPUV3 instructions, which supported by ck860f.
Co-Authored-By: Lifang Xia <lifang_xia@c-sky.com> gas/ * config/tc-csky.c (float_work_fpuv3_fmovi): New function, helper function to encode fpuv3 fmovi instructions. (float_work_fpuv3_fstore): New function. (struct literal): Add new member 'offset'. (csky_cpus): New cpu CK860f. (enter_literal): Return literal pool pointer instead of offset. (parse_rt): Adjust the change of enter_literal. (parse_rtf): Likewise. (v1_work_lrw): Likewise. (v1_work_jbsr): Likewise. (v2_work_lrw): Likewise. (v2_work_jbsr): Likewise. (v2_work_jsri): Likewise. (vdsp_work_vlrw): Likewise. (is_freglist_legal): Add handler for FPUV3. (parse_type_freg): Likewise. (is_imm_within_range): Set e.X_add_number if it is a signed and negtive number. (get_operand_value): Add handler for OPRND_TYPE_IMM9b, OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and OPRND_TYPE_DFLOAT_FMOVI. (float_to_half): Convert float number to harf float. opcodes/ * csky-dis.c (csky_output_operand): Add handlers for OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and OPRND_TYPE_DFLOAT_FMOVI. Refine OPRND_TYPE_FREGLIST_DASH to support FPUV3 instructions. * csky-opc.h (enum operand_type): New enum OPRND_TYPE_IMM9b, OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and OPRND_TYPE_DFLOAT_FMOVI. (OPRND_MASK_4_5, OPRND_MASK_6, OPRND_MASK_6_7, OPRND_MASK_6_8, OPRND_MASK_7, OPRND_MASK_7_8, OPRND_MASK_17_24, OPRND_MASK_20, OPRND_MASK_20_21, OPRND_MASK_20_22, OPRND_MASK_20_23, OPRND_MASK_20_24, OPRND_MASK_20_25, OPRND_MASK_0_3or5_8, OPRND_MASK_0_3or6_7, OPRND_MASK_0_3or25, OPRND_MASK_0_4or21_24, OPRND_MASK_5or20_21, OPRND_MASK_5or20_22, OPRND_MASK_5or20_23, OPRND_MASK_5or20_24, OPRND_MASK_5or20_25, OPRND_MASK_8_9or21_25, OPRND_MASK_8_9or16_25, OPRND_MASK_4_6or20, OPRND_MASK_5_7or20, OPRND_MASK_4_5or20or25, OPRND_MASK_4_6or20or25, OPRND_MASK_4_7or20or25, OPRND_MASK_6_9or17_24, OPRND_MASK_6_7or20, OPRND_MASK_6or20, OPRND_MASK_7or20, OPRND_MASK_5or8_9or16_25, OPRND_MASK_5or8_9or20_25): Define. (csky_v2_opcodes): Add FPUV3 instructions. include/ * opcode/csky.h (CSKY_ISA_FLOAT_7E60): Define.
This commit is contained in:
Cooper Qu
Lifang Xia
parent
dfbee68088
commit
1feede9b38
7 changed files with 2356 additions and 33 deletions
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@ -1,3 +1,31 @@
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2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com>
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* config/tc-csky.c (float_work_fpuv3_fmovi): New function,
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helper function to encode fpuv3 fmovi instructions.
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(float_work_fpuv3_fstore): New function.
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(struct literal): Add new member 'offset'.
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(csky_cpus): New cpu CK860f.
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(enter_literal): Return literal pool pointer instead of offset.
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(parse_rt): Adjust the change of enter_literal.
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(parse_rtf): Likewise.
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(v1_work_lrw): Likewise.
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(v1_work_jbsr): Likewise.
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(v2_work_lrw): Likewise.
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(v2_work_jbsr): Likewise.
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(v2_work_jsri): Likewise.
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(vdsp_work_vlrw): Likewise.
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(is_freglist_legal): Add handler for FPUV3.
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(parse_type_freg): Likewise.
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(is_imm_within_range): Set e.X_add_number if it is a signed and
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negtive number.
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(get_operand_value): Add handler for OPRND_TYPE_IMM9b,
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OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI
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and OPRND_TYPE_DFLOAT_FMOVI.
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(float_to_half): Convert float number to harf float.
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* testsuite/gas/csky/case-fpuv3-ck860f/ : New folder containing
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the test cases for FPUV3, they are divided by instruction
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operands format and both have legal cases and illegal cases.
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2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com>
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Kuan-Lin Chen <kuanlinchentw@gmail.com>
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@ -172,6 +172,8 @@ bfd_boolean v2_work_movih (void);
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bfd_boolean v2_work_ori (void);
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bfd_boolean float_work_fmovi (void);
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bfd_boolean dsp_work_bloop (void);
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bfd_boolean float_work_fpuv3_fmovi (void);
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bfd_boolean float_work_fpuv3_fstore (void);
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/* csky-opc.h must be included after workers are declared. */
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#include "opcodes/csky-opc.h"
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@ -295,6 +297,7 @@ struct csky_insn_info
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struct literal
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{
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unsigned short refcnt;
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unsigned int offset;
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unsigned char ispcrel;
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unsigned char unused;
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bfd_reloc_code_real_type r_type;
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@ -704,9 +707,10 @@ const struct csky_cpu_info csky_cpus[] =
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{"ck810ftv", CSKY_ARCH_810_BASE | CSKY_ARCH_FLOAT, CSKY_ISA_810 | CSKYV2_ISA_DSP | CSKY_ISA_VDSP | CSKY_ISA_FLOAT_810 | CSKY_ISA_TRUST},
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/* CK860 Series. */
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#define CSKY_ISA_860 (CSKY_ISA_810 | CSKYV2_ISA_10E60)
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#define CSKY_ISA_FLOAT_860 (CSKY_ISA_FLOAT_810)
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#define CSKY_ISA_860 (CSKY_ISA_810 | CSKYV2_ISA_10E60 | CSKYV2_ISA_3E3R3)
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#define CSKY_ISA_860F (CSKY_ISA_860 | CSKY_ISA_FLOAT_7E60)
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{"ck860", CSKY_ARCH_860, CSKY_ISA_860},
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{"ck860f", CSKY_ARCH_860, CSKY_ISA_860F},
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{NULL, 0, 0}
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};
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@ -1718,7 +1722,7 @@ dump_literals (int isforce)
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poolsize = 0;
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}
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static int
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static struct literal *
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enter_literal (expressionS *e,
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int ispcrel,
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unsigned char isdouble,
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@ -1772,7 +1776,7 @@ enter_literal (expressionS *e,
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p->e.X_add_number * sizeof (LITTLENUM_TYPE)) == 0)))
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{
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p->refcnt ++;
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return i;
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return p;
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}
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if (p->e.X_op == O_big)
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{
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@ -1787,6 +1791,7 @@ enter_literal (expressionS *e,
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p->e = *e;
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p->r_type = insn_reloc;
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p->isdouble = isdouble;
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p->offset = i;
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if (isdouble)
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p->dbnum = dbnum;
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if (e->X_op == O_big)
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@ -1806,7 +1811,7 @@ enter_literal (expressionS *e,
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} else
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poolsize += (p->isdouble ? 2 : 1);
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return i;
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return p;
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}
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/* Check whether we must dump the literal pool here.
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@ -2056,7 +2061,6 @@ parse_rt (char *s,
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long reg ATTRIBUTE_UNUSED)
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{
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expressionS e;
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int n;
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if (ep)
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/* Indicate nothing there. */
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@ -2089,24 +2093,45 @@ parse_rt (char *s,
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/* If the instruction has work, literal handling is in the work. */
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if (!csky_insn.opcode->work)
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{
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n = enter_literal (&e, ispcrel, 0, 0);
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struct literal *p = enter_literal (&e, ispcrel, 0, 0);
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if (ep)
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*ep = e;
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/* Create a reference to pool entry. */
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ep->X_op = O_symbol;
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ep->X_add_symbol = poolsym;
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ep->X_add_number = n << 2;
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ep->X_add_number = p->offset << 2;
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}
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}
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return s;
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}
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static int float_to_half (void *f, void *h)
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{
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int imm_e;
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int imm_f;
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unsigned int value_f = *(unsigned int *)f;
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unsigned short value_h;
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imm_e = ((value_f >> 23) & 0xff);
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imm_f = ((value_f & 0x7fffff));
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imm_e = ((imm_e - 127 + 15) << 10);
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imm_f = ((imm_f & 0x7fe000) >> 13);
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value_h = (value_f & 0x80000000 ? 0x8000 : 0x0) | imm_e | imm_f;
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if (h)
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*(unsigned short *)h = value_h;
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return value_h;
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}
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static char *
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parse_rtf (char *s, int ispcrel, expressionS *ep)
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{
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expressionS e;
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int n = 0;
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struct literal *p = NULL;
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if (ep)
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/* Indicate nothing there. */
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@ -2127,15 +2152,24 @@ parse_rtf (char *s, int ispcrel, expressionS *ep)
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else
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{
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uint64_t dbnum;
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if (strstr (csky_insn.opcode->mnemonic, "flrws"))
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if (strstr(csky_insn.opcode->mnemonic, "flrws")
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|| strstr(csky_insn.opcode->mnemonic, "flrw.32"))
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{
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s = parse_fexp (s, &e, 0, &dbnum);
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n = enter_literal (&e, ispcrel, 0, dbnum);
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p = enter_literal (& e, ispcrel, 0, dbnum);
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}
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else if (strstr (csky_insn.opcode->mnemonic, "flrwd"))
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else if (strstr(csky_insn.opcode->mnemonic, "flrwd")
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|| strstr(csky_insn.opcode->mnemonic, "flrw.64"))
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{
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s = parse_fexp (s, &e, 1, &dbnum);
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n = enter_literal (&e, ispcrel, 1, dbnum);
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p = enter_literal (& e, ispcrel, 1, dbnum);
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}
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else if (strstr(csky_insn.opcode->mnemonic, "flrwh")
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|| strstr(csky_insn.opcode->mnemonic, "flrw.16"))
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{
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s = parse_fexp (s, &e, 0, NULL);
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e.X_add_number = float_to_half (&e.X_add_number, &e.X_add_number);
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p = enter_literal (& e, ispcrel, 0, 0);
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}
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else
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as_bad (_("unrecognized opcode"));
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@ -2146,7 +2180,7 @@ parse_rtf (char *s, int ispcrel, expressionS *ep)
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/* Create a reference to pool entry. */
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ep->X_op = O_symbol;
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ep->X_add_symbol = poolsym;
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ep->X_add_number = n << 2;
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ep->X_add_number = p->offset << 2;
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}
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return s;
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}
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@ -2592,6 +2626,7 @@ is_freglist_legal (char **oper)
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int reg1 = -1;
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int reg2 = -1;
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int len = 0;
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int shift = 0;
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reg1 = csky_get_freg_val (*oper, &len);
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*oper += len;
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@ -2627,12 +2662,34 @@ is_freglist_legal (char **oper)
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}
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reg2 = reg2 - reg1;
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if (reg2 > (int)0x3)
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/* The fldm/fstm in CSKY_ISA_FLOAT_7E60 has 5 bits frz(reg1). */
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shift = 4;
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if (strncmp (csky_insn.opcode->mnemonic, "fstm", 4) == 0
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|| strncmp (csky_insn.opcode->mnemonic, "fldm", 4) == 0)
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{
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if ((!(isa_flag & CSKY_ISA_FLOAT_7E60)
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&& (reg2 > (int)15 || reg1 > 15))
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|| ((isa_flag & CSKY_ISA_FLOAT_7E60)
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&& (reg2 > (int)31 || reg1 > (int)31)))
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{
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/* ISA_FLOAT_E1 fstm/fldm fry-frx is within 15.
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ISA_FLOAT_7E60 fstm(u)/fldm(u) frx-fry is within 31. */
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SET_ERROR_STRING(ERROR_REG_FORMAT, (void *)"frx-fry is over range");
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return FALSE;
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}
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if ((mach_flag & CSKY_ARCH_MASK) == CSKY_ARCH_860)
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{
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shift = 5;
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}
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}
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else
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{
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if (reg2 > (int)0x3) {
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SET_ERROR_STRING(ERROR_REG_FORMAT, (void *)"vry-vrx is over range");
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return FALSE;
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}
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reg2 <<= 4;
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}
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reg2 <<= shift;
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reg1 |= reg2;
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csky_insn.val[csky_insn.idx++] = reg1;
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return TRUE;
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@ -2788,6 +2845,8 @@ is_imm_within_range (char **oper, int min, int max)
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ret = FALSE;
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SET_ERROR_STRING (ERROR_IMM_OVERFLOW, NULL);
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}
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if (!e.X_unsigned)
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e.X_add_number |= 0x80000000;
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csky_insn.val[csky_insn.idx++] = e.X_add_number;
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}
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@ -2990,7 +3049,8 @@ parse_type_freg (char** oper, int even)
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}
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if (IS_CSKY_V2 (mach_flag)
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&& (csky_insn.opcode->isa_flag32 & CSKY_ISA_VDSP_2)
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&& ((csky_insn.opcode->isa_flag32 & CSKY_ISA_VDSP_2)
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|| !(csky_insn.opcode->isa_flag32 & CSKY_ISA_FLOAT_7E60))
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&& reg > 15)
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{
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if ((csky_insn.opcode->isa_flag32 & CSKY_ISA_VDSP_2))
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@ -3537,6 +3597,8 @@ get_operand_value (struct csky_opcode_info *op,
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return is_imm_within_range (oper, 0, 127);
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case OPRND_TYPE_IMM8b:
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return is_imm_within_range (oper, 0, 255);
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case OPRND_TYPE_IMM9b:
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return is_imm_within_range (oper, -256, 255);
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case OPRND_TYPE_IMM12b:
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return is_imm_within_range (oper, 0, 4095);
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case OPRND_TYPE_IMM15b:
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@ -3720,7 +3782,37 @@ get_operand_value (struct csky_opcode_info *op,
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| ((dbnum & 0x8000000000000000ULL) >> 43));
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return TRUE;
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}
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case OPRND_TYPE_HFLOAT_FMOVI:
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case OPRND_TYPE_SFLOAT_FMOVI:
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case OPRND_TYPE_DFLOAT_FMOVI:
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/* For fpuv3 fmovis and fmovid, which accept a constant
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float with a limited range. */
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{
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uint64_t dbnum;
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int imm4, imm8, sign;
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*oper = parse_fexp (*oper, &csky_insn.e1, 1, &dbnum);
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if (csky_insn.e1.X_op == O_absent)
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return FALSE;
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/* Convert the representation from IEEE double to the 13-bit
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encoding used internally for fmovis and fmovid. */
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imm4 = 11 - (((dbnum & 0x7ff0000000000000ULL) >> 52) - 1023);
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/* Check float range. */
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if ((dbnum & 0x00000fffffffffffULL) || imm4 < 0 || imm4 > 15)
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{
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csky_show_error (ERROR_IMM_OVERFLOW, 2, NULL, NULL);
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return TRUE;
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}
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imm8 = (dbnum & 0x000ff00000000000ULL) >> 44;
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sign = (dbnum & 0x8000000000000000ULL) >> 58;
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csky_insn.e1.X_add_number
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= (((imm8 & 0x3) << 8)
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| ((imm8 & 0xfc) << 18)
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| ((imm4 & 0xf) << 16)
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| sign);
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return TRUE;
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}
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/* For grs v2. */
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case OPRND_TYPE_IMM_OFF18b:
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*oper = parse_exp (*oper, &csky_insn.e1);
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@ -5999,12 +6091,12 @@ v1_work_lrw (void)
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csky_insn.inst |= reg << 8;
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if (output_literal)
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{
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int n = enter_literal (&csky_insn.e1, 0, 0, 0);
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struct literal *p = enter_literal (&csky_insn.e1, 0, 0, 0);
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/* Create a reference to pool entry. */
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csky_insn.e1.X_op = O_symbol;
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csky_insn.e1.X_add_symbol = poolsym;
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csky_insn.e1.X_add_number = n << 2;
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csky_insn.e1.X_add_number = p->offset << 2;
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}
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if (insn_reloc == BFD_RELOC_CKCORE_TLS_GD32
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@ -6212,12 +6304,12 @@ v1_work_jbsr (void)
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csky_insn.opcode_idx = 0;
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csky_insn.isize = 2;
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int n = enter_literal (&csky_insn.e1, 1, 0, 0);
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struct literal *p = enter_literal (&csky_insn.e1, 1, 0, 0);
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/* Create a reference to pool entry. */
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csky_insn.e1.X_op = O_symbol;
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csky_insn.e1.X_add_symbol = poolsym;
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csky_insn.e1.X_add_number = n << 2;
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csky_insn.e1.X_add_number = p->offset << 2;
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/* Generate fixup BFD_RELOC_CKCORE_PCREL_IMM8BY4. */
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fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
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@ -6226,7 +6318,7 @@ v1_work_jbsr (void)
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if (csky_insn.e1.X_op != O_absent && do_jsri2bsr)
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/* Generate fixup BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2. */
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fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
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2, & (litpool + (csky_insn.e1.X_add_number >> 2))->e,
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2, &p->e,
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1, BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2);
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}
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csky_generate_insn ();
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@ -6815,11 +6907,11 @@ v2_work_lrw (void)
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if (output_literal)
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{
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int n = enter_literal (&csky_insn.e1, 0, 0, 0);
|
||||
struct literal *p = enter_literal (&csky_insn.e1, 0, 0, 0);
|
||||
/* Create a reference to pool entry. */
|
||||
csky_insn.e1.X_op = O_symbol;
|
||||
csky_insn.e1.X_add_symbol = poolsym;
|
||||
csky_insn.e1.X_add_number = n << 2;
|
||||
csky_insn.e1.X_add_number = p->offset << 2;
|
||||
}
|
||||
/* If 16bit force. */
|
||||
if (csky_insn.flag_force == INSN_OPCODE16F)
|
||||
|
|
@ -6960,11 +7052,11 @@ v2_work_jbsr (void)
|
|||
}
|
||||
else
|
||||
{
|
||||
int n = enter_literal (&csky_insn.e1, 0, 0, 0);
|
||||
struct literal *p = enter_literal (&csky_insn.e1, 0, 0, 0);
|
||||
csky_insn.output = frag_more (4);
|
||||
csky_insn.e1.X_op = O_symbol;
|
||||
csky_insn.e1.X_add_symbol = poolsym;
|
||||
csky_insn.e1.X_add_number = n << 2;
|
||||
csky_insn.e1.X_add_number = p->offset << 2;
|
||||
fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
|
||||
4, &csky_insn.e1, 1, BFD_RELOC_CKCORE_PCREL_IMM16BY4);
|
||||
if (do_jsri2bsr || IS_CSKY_ARCH_810 (mach_flag))
|
||||
|
|
@ -6994,10 +7086,10 @@ bfd_boolean
|
|||
v2_work_jsri (void)
|
||||
{
|
||||
/* dump literal. */
|
||||
int n = enter_literal (&csky_insn.e1, 1, 0, 0);
|
||||
struct literal *p = enter_literal (&csky_insn.e1, 1, 0, 0);
|
||||
csky_insn.e1.X_op = O_symbol;
|
||||
csky_insn.e1.X_add_symbol = poolsym;
|
||||
csky_insn.e1.X_add_number = n << 2;
|
||||
csky_insn.e1.X_add_number = p->offset << 2;
|
||||
|
||||
/* Generate relax or reloc if necessary. */
|
||||
csky_generate_frags ();
|
||||
|
|
@ -7012,7 +7104,7 @@ v2_work_jsri (void)
|
|||
For 'jbsr .L1', this reloc type's symbol
|
||||
is bound to '.L1', isn't bound to literal pool. */
|
||||
fix_new_exp (frag_now, csky_insn.output - frag_now->fr_literal,
|
||||
4, &(litpool + (csky_insn.e1.X_add_number >> 2))->e, 1,
|
||||
4, &p->e, 1,
|
||||
BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2);
|
||||
csky_insn.output = frag_more (4);
|
||||
dwarf2_emit_insn (0);
|
||||
|
|
@ -7155,6 +7247,57 @@ float_work_fmovi (void)
|
|||
return TRUE;
|
||||
}
|
||||
|
||||
/* Like float_work_fmovi, but for FPUV3 fmovi.16, fmovi.32 and fmovi.64
|
||||
instructions. */
|
||||
|
||||
bfd_boolean
|
||||
float_work_fpuv3_fmovi (void)
|
||||
{
|
||||
int rx = csky_insn.val[0];
|
||||
int idx = csky_insn.opcode_idx;
|
||||
int imm4 = 0;
|
||||
int imm8 = 0;
|
||||
int sign = 0;
|
||||
|
||||
csky_insn.inst = csky_insn.opcode->op32[idx].opcode | rx;
|
||||
|
||||
if (csky_insn.opcode->op32[idx].operand_num == 3)
|
||||
{
|
||||
/* fmovi.xx frz, imm9, imm4. */
|
||||
imm8 = csky_insn.val[1];
|
||||
imm4 = csky_insn.val[2];
|
||||
if (imm8 < 0 || (imm8 & 0x80000000))
|
||||
{
|
||||
sign = (1 << 5);
|
||||
imm8 = 0 - imm8;
|
||||
}
|
||||
|
||||
if (imm8 > 255)
|
||||
{
|
||||
csky_show_error (ERROR_IMM_OVERFLOW, 2, NULL, NULL);
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* imm8 store at bit [25:20] and [9:8]. */
|
||||
/* imm4 store at bit [19:16]. */
|
||||
/* sign store at bit [5]. */
|
||||
csky_insn.inst = csky_insn.inst
|
||||
| ((imm8 & 0x3) << 8)
|
||||
| ((imm8 & 0xfc) << 18)
|
||||
| ((imm4 & 0xf) << 16)
|
||||
| sign;
|
||||
}
|
||||
else
|
||||
{
|
||||
csky_insn.inst |= (uint32_t) csky_insn.e1.X_add_number;
|
||||
}
|
||||
|
||||
csky_insn.output = frag_more(4);
|
||||
csky_insn.isize = 4;
|
||||
csky_write_insn (csky_insn.output, csky_insn.inst, csky_insn.isize);
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
bfd_boolean
|
||||
dsp_work_bloop (void)
|
||||
{
|
||||
|
|
@ -7196,6 +7339,21 @@ dsp_work_bloop (void)
|
|||
return TRUE;
|
||||
}
|
||||
|
||||
bfd_boolean
|
||||
float_work_fpuv3_fstore(void)
|
||||
{
|
||||
/* Generate relax or reloc if necessary. */
|
||||
csky_generate_frags ();
|
||||
/* Generate the insn by mask. */
|
||||
csky_generate_insn ();
|
||||
/* Write inst to frag. */
|
||||
csky_write_insn (csky_insn.output,
|
||||
csky_insn.inst,
|
||||
csky_insn.isize);
|
||||
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
/* The following are for assembler directive handling. */
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,7 @@
|
|||
2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com>
|
||||
|
||||
* opcode/csky.h (CSKY_ISA_FLOAT_7E60): Define.
|
||||
|
||||
2020-09-08 Jozef Lawrynowicz <jozef.l@mittosystems.com>
|
||||
Kuan-Lin Chen <kuanlinchentw@gmail.com>
|
||||
|
||||
|
|
|
|||
|
|
@ -56,6 +56,8 @@
|
|||
#define CSKY_ISA_FLOAT_1E3 (1L << 27)
|
||||
/* 807 support (803f & 807f). */
|
||||
#define CSKY_ISA_FLOAT_3E4 (1L << 28)
|
||||
/* 860 support. */
|
||||
#define CSKY_ISA_FLOAT_7E60 (1L << 36)
|
||||
/* Vector DSP support. */
|
||||
#define CSKY_ISA_VDSP (1L << 29)
|
||||
#define CSKY_ISA_VDSP_2 (1L << 30)
|
||||
|
|
|
|||
|
|
@ -1,3 +1,27 @@
|
|||
2020-09-07 Cooper Qu <cooper.qu@linux.alibaba.com>
|
||||
|
||||
* csky-dis.c (csky_output_operand): Add handlers for
|
||||
OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and
|
||||
OPRND_TYPE_DFLOAT_FMOVI. Refine OPRND_TYPE_FREGLIST_DASH
|
||||
to support FPUV3 instructions.
|
||||
* csky-opc.h (enum operand_type): New enum OPRND_TYPE_IMM9b,
|
||||
OPRND_TYPE_HFLOAT_FMOVI, OPRND_TYPE_SFLOAT_FMOVI and
|
||||
OPRND_TYPE_DFLOAT_FMOVI.
|
||||
(OPRND_MASK_4_5, OPRND_MASK_6, OPRND_MASK_6_7, OPRND_MASK_6_8,
|
||||
OPRND_MASK_7, OPRND_MASK_7_8, OPRND_MASK_17_24,
|
||||
OPRND_MASK_20, OPRND_MASK_20_21, OPRND_MASK_20_22,
|
||||
OPRND_MASK_20_23, OPRND_MASK_20_24, OPRND_MASK_20_25,
|
||||
OPRND_MASK_0_3or5_8, OPRND_MASK_0_3or6_7, OPRND_MASK_0_3or25,
|
||||
OPRND_MASK_0_4or21_24, OPRND_MASK_5or20_21,
|
||||
OPRND_MASK_5or20_22, OPRND_MASK_5or20_23, OPRND_MASK_5or20_24,
|
||||
OPRND_MASK_5or20_25, OPRND_MASK_8_9or21_25,
|
||||
OPRND_MASK_8_9or16_25, OPRND_MASK_4_6or20, OPRND_MASK_5_7or20,
|
||||
OPRND_MASK_4_5or20or25, OPRND_MASK_4_6or20or25,
|
||||
OPRND_MASK_4_7or20or25, OPRND_MASK_6_9or17_24,
|
||||
OPRND_MASK_6_7or20, OPRND_MASK_6or20, OPRND_MASK_7or20,
|
||||
OPRND_MASK_5or8_9or16_25, OPRND_MASK_5or8_9or20_25): Define.
|
||||
(csky_v2_opcodes): Add FPUV3 instructions.
|
||||
|
||||
2020-09-08 Alex Coplan <alex.coplan@arm.com>
|
||||
|
||||
* aarch64-dis.c (print_operands): Pass CPU features to
|
||||
|
|
|
|||
|
|
@ -621,6 +621,62 @@ csky_output_operand (char *str, struct operand const *oprnd,
|
|||
|
||||
sprintf (buf, "%f", fvalue);
|
||||
strcat (str, buf);
|
||||
break;
|
||||
}
|
||||
case OPRND_TYPE_HFLOAT_FMOVI:
|
||||
case OPRND_TYPE_SFLOAT_FMOVI:
|
||||
{
|
||||
int imm4;
|
||||
int imm8;
|
||||
imm4 = ((inst >> 16) & 0xf);
|
||||
imm4 = (138 - imm4) << 23;
|
||||
|
||||
imm8 = ((inst >> 8) & 0x3);
|
||||
imm8 |= (((inst >> 20) & 0x3f) << 2);
|
||||
imm8 <<= 15;
|
||||
|
||||
value = ((inst >> 5) & 1) << 31;
|
||||
value |= imm4 | imm8;
|
||||
|
||||
imm4 = 138 - (imm4 >> 23);
|
||||
imm8 >>= 15;
|
||||
if ((inst >> 5) & 1)
|
||||
{
|
||||
imm8 = 0 - imm8;
|
||||
}
|
||||
|
||||
float f = 0;
|
||||
memcpy (&f, &value, sizeof (float));
|
||||
sprintf (str, "%s%f\t// imm9:%4d, imm4:%2d", str, f, imm8, imm4);
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case OPRND_TYPE_DFLOAT_FMOVI:
|
||||
{
|
||||
uint64_t imm4;
|
||||
uint64_t imm8;
|
||||
uint64_t dvalue;
|
||||
imm4 = ((inst >> 16) & 0xf);
|
||||
imm4 = (1034 - imm4) << 52;
|
||||
|
||||
imm8 = ((inst >> 8) & 0x3);
|
||||
imm8 |= (((inst >> 20) & 0x3f) << 2);
|
||||
imm8 <<= 44;
|
||||
|
||||
dvalue = (((uint64_t)inst >> 5) & 1) << 63;
|
||||
dvalue |= imm4 | imm8;
|
||||
|
||||
imm4 = 1034 - (imm4 >> 52);
|
||||
imm8 >>= 44;
|
||||
if (inst >> 5)
|
||||
{
|
||||
imm8 = 0 - imm8;
|
||||
}
|
||||
double d = 0;
|
||||
memcpy (&d, &dvalue, sizeof (double));
|
||||
sprintf (str, "%s%lf\t// imm9:%4ld, imm4:%2ld", str, d, imm8, imm4);
|
||||
|
||||
break;
|
||||
}
|
||||
case OPRND_TYPE_LABEL_WITH_BRACKET:
|
||||
|
|
@ -653,8 +709,20 @@ csky_output_operand (char *str, struct operand const *oprnd,
|
|||
case OPRND_TYPE_FREGLIST_DASH:
|
||||
if (IS_CSKY_V2 (mach_flag))
|
||||
{
|
||||
int vrx = value & 0xf;
|
||||
int vry = vrx + (value >> 4);
|
||||
int vrx = 0;
|
||||
int vry = 0;
|
||||
if (dis_info.isa & CSKY_ISA_FLOAT_7E60
|
||||
&& (strstr (str, "fstm") != NULL
|
||||
|| strstr (str, "fldm") != NULL))
|
||||
{
|
||||
vrx = value & 0x1f;
|
||||
vry = vrx + (value >> 5);
|
||||
}
|
||||
else
|
||||
{
|
||||
vrx = value & 0xf;
|
||||
vry = vrx + (value >> 4);
|
||||
}
|
||||
sprintf (buf, "fr%d-fr%d", vrx, vry);
|
||||
strcat (str, buf);
|
||||
}
|
||||
|
|
|
|||
2039
opcodes/csky-opc.h
2039
opcodes/csky-opc.h
File diff suppressed because it is too large
Load diff
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Add table
Add a link
Reference in a new issue