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sim: bfin: throw VEC_ILGAL_I with 32bit insn in group1/group2 slots

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Parallel insns can only do one 32bit, then two 16bits.  So if we see
a 2nd 32bit insn after the first 32bit in a parallel insn, abort.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Mike Frysinger 2012-04-01 04:31:46 +00:00
parent 2fa7a0570b
commit 1d18e9892e
2 changed files with 8 additions and 0 deletions
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5
sim/bfin/ChangeLog
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@ -1,3 +1,8 @@
2012-04-01 Mike Frysinger <vapier@gentoo.org>
* bfin-sim.c (_interp_insn_bfin): Call illegal_instruction_combination
when INSN_LEN is non-zero before 32bit decode.
2012-04-01 Mike Frysinger <vapier@gentoo.org>
* bfin-dis.c (fmtconst): Replace decimal handling with a single

3
sim/bfin/bfin-sim.c
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@ -6187,6 +6187,9 @@ _interp_insn_bfin (SIM_CPU *cpu, bu32 pc)
/* Only cache on first run through (in case of parallel insns). */
if (INSN_LEN == 0)
INSN_LEN = insn_len;
else
/* Once you're past the first slot, only 16bit insns are valid. */
illegal_instruction_combination (cpu);
if ((iw0 & 0xf7ff) == 0xc003 && (iw1 & 0xfe00) == 0x1800)
{