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* cgen-engine.h (EXTRACT_MSB0_LGSINT, EXTRACT_MSB0_LGUINT): Define.

Browse source 
(EXTRACT_LSB0_LGSINT, EXTRACT_LSB0_LGUINT): Define.
	(EXTRACT_FN, SEMANTIC_FN): Use CGEN_INSN_WORD in prototype
	instead of CGEN_INSN_INT.
plus, cgen files: Regenerate.
This commit is contained in:
Doug Evans 2009-11-23 04:12:17 +00:00
parent 1fbb9298a4
commit 197fa1aa2c
43 changed files with 1072 additions and 957 deletions
Download patch file Download diff file Expand all files Collapse all files

114
sim/m32r/decode.c
View file

@ -216,14 +216,14 @@ m32rbf_init_idesc_table (SIM_CPU *cpu)
const IDESC *
m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn,
CGEN_INSN_WORD base_insn, CGEN_INSN_WORD entire_insn,
ARGBUF *abuf)
{
/* Result of decoder. */
M32RBF_INSN_TYPE itype;
{
CGEN_INSN_INT insn = base_insn;
CGEN_INSN_WORD insn = base_insn;
{
unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0)));
@ -586,7 +586,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_add:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add.f
UINT f_r1;
UINT f_r2;
@ -617,7 +617,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_add3:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
@ -650,7 +650,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_and3:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_and3.f
UINT f_r1;
UINT f_r2;
@ -683,7 +683,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_or3:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_and3.f
UINT f_r1;
UINT f_r2;
@ -716,7 +716,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_addi:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_addi.f
UINT f_r1;
INT f_simm8;
@ -745,7 +745,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_addv:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add.f
UINT f_r1;
UINT f_r2;
@ -776,7 +776,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_addv3:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
@ -809,7 +809,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_addx:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add.f
UINT f_r1;
UINT f_r2;
@ -840,7 +840,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_bc8:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
@ -863,7 +863,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_bc24:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
@ -886,7 +886,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_beq:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_beq.f
UINT f_r1;
UINT f_r2;
@ -919,7 +919,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_beqz:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_beq.f
UINT f_r2;
SI f_disp16;
@ -947,7 +947,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_bl8:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
@ -971,7 +971,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_bl24:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
@ -995,7 +995,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_bra8:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl8.f
SI f_disp8;
@ -1018,7 +1018,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_bra24:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bl24.f
SI f_disp24;
@ -1041,7 +1041,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_cmp:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
@ -1071,7 +1071,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_cmpi:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_d.f
UINT f_r2;
INT f_simm16;
@ -1099,7 +1099,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_div:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add.f
UINT f_r1;
UINT f_r2;
@ -1130,7 +1130,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_jl:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_jl.f
UINT f_r2;
@ -1156,7 +1156,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_jmp:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_jl.f
UINT f_r2;
@ -1181,7 +1181,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_ld:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
@ -1211,7 +1211,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_ld_d:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
@ -1244,7 +1244,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_ldb:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
@ -1274,7 +1274,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_ldb_d:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
@ -1307,7 +1307,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_ldh:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
@ -1337,7 +1337,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_ldh_d:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
@ -1370,7 +1370,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_ld_plus:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
@ -1401,7 +1401,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_ld24:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld24.f
UINT f_r1;
UINT f_uimm24;
@ -1429,7 +1429,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_ldi8:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_addi.f
UINT f_r1;
INT f_simm8;
@ -1457,7 +1457,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_ldi16:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
INT f_simm16;
@ -1485,7 +1485,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_lock:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
@ -1515,7 +1515,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_machi:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
@ -1545,7 +1545,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_mulhi:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
@ -1575,7 +1575,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_mv:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
@ -1605,7 +1605,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_mvfachi:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_seth.f
UINT f_r1;
@ -1630,7 +1630,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_mvfc:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
@ -1658,7 +1658,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_mvtachi:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
@ -1683,7 +1683,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_mvtc:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_ld_plus.f
UINT f_r1;
UINT f_r2;
@ -1756,7 +1756,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_seth:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_seth.f
UINT f_r1;
UINT f_hi16;
@ -1784,7 +1784,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_sll3:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_add3.f
UINT f_r1;
UINT f_r2;
@ -1817,7 +1817,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_slli:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_slli.f
UINT f_r1;
UINT f_uimm5;
@ -1846,7 +1846,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_st:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
@ -1876,7 +1876,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_st_d:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_d.f
UINT f_r1;
UINT f_r2;
@ -1909,7 +1909,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_stb:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
@ -1939,7 +1939,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_stb_d:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_d.f
UINT f_r1;
UINT f_r2;
@ -1972,7 +1972,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_sth:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
@ -2002,7 +2002,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_sth_d:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_d.f
UINT f_r1;
UINT f_r2;
@ -2035,7 +2035,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_st_plus:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
@ -2066,7 +2066,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_trap:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_trap.f
UINT f_uimm4;
@ -2089,7 +2089,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_unlock:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_st_plus.f
UINT f_r1;
UINT f_r2;
@ -2119,7 +2119,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_clrpsw:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_clrpsw.f
UINT f_uimm8;
@ -2136,7 +2136,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_setpsw:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_clrpsw.f
UINT f_uimm8;
@ -2153,7 +2153,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_bset:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bset.f
UINT f_uimm3;
UINT f_r2;
@ -2184,7 +2184,7 @@ m32rbf_decode (SIM_CPU *current_cpu, IADDR pc,
extract_sfmt_btst:
{
const IDESC *idesc = &m32rbf_insn_data[itype];
CGEN_INSN_INT insn = entire_insn;
CGEN_INSN_WORD insn = entire_insn;
#define FLD(f) abuf->fields.sfmt_bset.f
UINT f_uimm3;
UINT f_r2;