Add support for the m32r2 processor
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30 changed files with 16057 additions and 168 deletions
112
sim/m32r/sem.c
112
sim/m32r/sem.c
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@ -2,7 +2,7 @@
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
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Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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@ -2563,6 +2563,111 @@ if (CPU (h_lock)) {
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#undef FLD
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}
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/* clrpsw: clrpsw $uimm8 */
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static SEM_PC
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SEM_FN_NAME (m32rbf,clrpsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_clrpsw.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
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{
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SI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (INVBI (FLD (f_uimm8)), 65280));
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SET_H_CR (((UINT) 0), opval);
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TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
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}
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return vpc;
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#undef FLD
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}
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/* setpsw: setpsw $uimm8 */
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static SEM_PC
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SEM_FN_NAME (m32rbf,setpsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_clrpsw.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
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{
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SI opval = FLD (f_uimm8);
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SET_H_CR (((UINT) 0), opval);
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TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
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}
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return vpc;
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#undef FLD
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}
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/* bset: bset $uimm3,@($slo16,$sr) */
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static SEM_PC
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SEM_FN_NAME (m32rbf,bset) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_bset.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLSI (1, SUBSI (7, FLD (f_uimm3))));
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SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
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TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
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}
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return vpc;
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#undef FLD
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}
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/* bclr: bclr $uimm3,@($slo16,$sr) */
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static SEM_PC
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SEM_FN_NAME (m32rbf,bclr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_bset.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLSI (1, SUBSI (7, FLD (f_uimm3)))));
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SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
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TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
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}
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return vpc;
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#undef FLD
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}
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/* btst: btst $uimm3,$sr */
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static SEM_PC
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SEM_FN_NAME (m32rbf,btst) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_bset.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
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{
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BI opval = ANDQI (SRLSI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
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CPU (h_cond) = opval;
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TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
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}
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return vpc;
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#undef FLD
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}
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/* Table of all semantic fns. */
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static const struct sem_fn_desc sem_fns[] = {
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@ -2671,6 +2776,11 @@ static const struct sem_fn_desc sem_fns[] = {
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{ M32RBF_INSN_SUBX, SEM_FN_NAME (m32rbf,subx) },
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{ M32RBF_INSN_TRAP, SEM_FN_NAME (m32rbf,trap) },
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{ M32RBF_INSN_UNLOCK, SEM_FN_NAME (m32rbf,unlock) },
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{ M32RBF_INSN_CLRPSW, SEM_FN_NAME (m32rbf,clrpsw) },
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{ M32RBF_INSN_SETPSW, SEM_FN_NAME (m32rbf,setpsw) },
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{ M32RBF_INSN_BSET, SEM_FN_NAME (m32rbf,bset) },
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{ M32RBF_INSN_BCLR, SEM_FN_NAME (m32rbf,bclr) },
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{ M32RBF_INSN_BTST, SEM_FN_NAME (m32rbf,btst) },
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{ 0, 0 }
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};
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