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x86/Intel: don't mistake riz/eiz as base register

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Just like we make rsp/esp a base register even if it comes second, make
riz/eiz an index register even if it comes first.
This commit is contained in:
Jan Beulich 2017-11-13 12:20:30 +01:00 • committed by Jan Beulich
parent 2abc2bec4d
commit 1187cf29b1
4 changed files with 20 additions and 1 deletions
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8
gas/ChangeLog
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@ -1,3 +1,11 @@
2017-11-13 Jan Beulich <jbeulich@suse.com>
* config/tc-i386-intel.c (i386_intel_simplify_register): Also
recognize RegRiz/RegEiz as index-only registers.
* testsuite/gas/i386/intel.s: Add tests exercising base/index
swapping.
* testsuite/gas/i386/intel.d: Adjust expectations.
2017-11-13 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (i386_index_check): Break out ...

4
gas/config/tc-i386-intel.c
View file

@ -288,7 +288,9 @@ i386_intel_simplify_register (expressionS *e)
else if (!intel_state.index
&& (i386_regtab[reg_num].reg_type.bitfield.regxmm
|| i386_regtab[reg_num].reg_type.bitfield.regymm
|| i386_regtab[reg_num].reg_type.bitfield.regzmm))
|| i386_regtab[reg_num].reg_type.bitfield.regzmm
|| i386_regtab[reg_num].reg_num == RegRiz
|| i386_regtab[reg_num].reg_num == RegEiz))
intel_state.index = i386_regtab + reg_num;
else if (!intel_state.base && !intel_state.in_scale)
intel_state.base = i386_regtab + reg_num;

3
gas/testsuite/gas/i386/intel.d
View file

@ -698,6 +698,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: 0f 4b 90 90 90 90 90 cmovnp -0x6f6f6f70\(%eax\),%edx
[ ]*[a-f0-9]+: 66 0f 4a 90 90 90 90 90 cmovp -0x6f6f6f70\(%eax\),%dx
[ ]*[a-f0-9]+: 66 0f 4b 90 90 90 90 90 cmovnp -0x6f6f6f70\(%eax\),%dx
[ ]*[a-f0-9]+: 8b 04 04 mov \(%esp,%eax(,1)?\),%eax
[ ]*[a-f0-9]+: 8b 04 20 mov \(%eax(,%eiz)?(,1)?\),%eax
[ ]*[a-f0-9]+: c4 e2 69 92 04 08 vgatherdps %xmm2,\(%eax,%xmm1(,1)?\),%xmm0
[ ]*[a-f0-9]+: 24 2f and \$0x2f,%al
[ ]*[a-f0-9]+: 0f \.byte 0xf
[a-f0-9]+ <barn>:

6
gas/testsuite/gas/i386/intel.s
View file

@ -699,6 +699,12 @@ fidivr dword ptr [ebx]
cmovpe dx, 0x90909090[eax]
cmovpo dx, 0x90909090[eax]
# Check base/index swapping
.allow_index_reg
mov eax, [eax+esp]
mov eax, [eiz+eax]
vgatherdps xmm0, [xmm1+eax], xmm2
# Test that disassembly of a partial instruction shows the partial byte:
# https://www.sourceware.org/ml/binutils/2015-08/msg00226.html
.byte 0x24