FreeChainXenon/binutils-gdb
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

* Reverted 2003-03-02's patch.

Browse source
This commit is contained in:
Alexandre Oliva 2003-03-12 23:06:08 +00:00
parent f958455d3b
commit 0b25d3e680
10 changed files with 56 additions and 83 deletions
Download patch file Download diff file Expand all files Collapse all files

2
bfd/ChangeLog
View file

@ -1,5 +1,7 @@
2003-03-12 Alexandre Oliva <aoliva@redhat.com> 2003-03-12 Alexandre Oliva <aoliva@redhat.com>
* Reverted 2003-03-02's patch.
* elfxx-target.h (bfd_elfNN_canonicalize_reloc): Make it * elfxx-target.h (bfd_elfNN_canonicalize_reloc): Make it
overridable. overridable.
* elf64-mips.c (mips_elf64_canonicalize_reloc, * elf64-mips.c (mips_elf64_canonicalize_reloc,

3
bfd/bfd-in2.h
View file

@ -2331,9 +2331,6 @@ to compensate for the borrow when the low bits are added. */
/* Like BFD_RELOC_LO16, but PC relative. */ /* Like BFD_RELOC_LO16, but PC relative. */
BFD_RELOC_PCREL_LO16, BFD_RELOC_PCREL_LO16,
/* Like BFD_RELOC_16_PCREL_S2, but for MIPS Embedded PIC. */
BFD_RELOC_MIPSEMB_16_PCREL_S2,
/* Relocation against a MIPS literal section. */ /* Relocation against a MIPS literal section. */
BFD_RELOC_MIPS_LITERAL, BFD_RELOC_MIPS_LITERAL,

10
bfd/elf32-mips.c
View file

@ -261,11 +261,9 @@ static reloc_howto_type elf_mips_howto_table_rel[] =
0x0000ffff, /* dst_mask */ 0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */ FALSE), /* pcrel_offset */
/* 16 bit PC relative reference. Note that the ABI document has a typo /* 16 bit PC relative reference. */
and claims R_MIPS_PC16 to be not rightshifted, rendering it useless.
We do the right thing here. */
HOWTO (R_MIPS_PC16, /* type */ HOWTO (R_MIPS_PC16, /* type */
2, /* rightshift */ 0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */ 2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */ 16, /* bitsize */
TRUE, /* pc_relative */ TRUE, /* pc_relative */
@ -1403,7 +1401,7 @@ static const struct elf_reloc_map mips_reloc_map[] =
{ BFD_RELOC_GPREL16, R_MIPS_GPREL16 }, { BFD_RELOC_GPREL16, R_MIPS_GPREL16 },
{ BFD_RELOC_MIPS_LITERAL, R_MIPS_LITERAL }, { BFD_RELOC_MIPS_LITERAL, R_MIPS_LITERAL },
{ BFD_RELOC_MIPS_GOT16, R_MIPS_GOT16 }, { BFD_RELOC_MIPS_GOT16, R_MIPS_GOT16 },
{ BFD_RELOC_16_PCREL_S2, R_MIPS_PC16 }, { BFD_RELOC_16_PCREL, R_MIPS_PC16 },
{ BFD_RELOC_MIPS_CALL16, R_MIPS_CALL16 }, { BFD_RELOC_MIPS_CALL16, R_MIPS_CALL16 },
{ BFD_RELOC_GPREL32, R_MIPS_GPREL32 }, { BFD_RELOC_GPREL32, R_MIPS_GPREL32 },
{ BFD_RELOC_MIPS_GOT_HI16, R_MIPS_GOT_HI16 }, { BFD_RELOC_MIPS_GOT_HI16, R_MIPS_GOT_HI16 },
@ -1460,7 +1458,7 @@ bfd_elf32_bfd_reloc_type_lookup (abfd, code)
return &elf_mips_gnu_rel_hi16; return &elf_mips_gnu_rel_hi16;
case BFD_RELOC_PCREL_LO16: case BFD_RELOC_PCREL_LO16:
return &elf_mips_gnu_rel_lo16; return &elf_mips_gnu_rel_lo16;
case BFD_RELOC_MIPSEMB_16_PCREL_S2: case BFD_RELOC_16_PCREL_S2:
return &elf_mips_gnu_rel16_s2; return &elf_mips_gnu_rel16_s2;
case BFD_RELOC_64_PCREL: case BFD_RELOC_64_PCREL:
return &elf_mips_gnu_pcrel64; return &elf_mips_gnu_pcrel64;

14
bfd/elf64-mips.c
View file

@ -306,11 +306,9 @@ static reloc_howto_type mips_elf64_howto_table_rel[] =
0x0000ffff, /* dst_mask */ 0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */ FALSE), /* pcrel_offset */
/* 16 bit PC relative reference. Note that the ABI document has a typo /* 16 bit PC relative reference. */
and claims R_MIPS_PC16 to be not rightshifted, rendering it useless.
We do the right thing here. */
HOWTO (R_MIPS_PC16, /* type */ HOWTO (R_MIPS_PC16, /* type */
2, /* rightshift */ 0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */ 2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */ 16, /* bitsize */
TRUE, /* pc_relative */ TRUE, /* pc_relative */
@ -803,11 +801,9 @@ static reloc_howto_type mips_elf64_howto_table_rela[] =
0x0000ffff, /* dst_mask */ 0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */ FALSE), /* pcrel_offset */
/* 16 bit PC relative reference. Note that the ABI document has a typo /* 16 bit PC relative reference. */
and claims R_MIPS_PC16 to be not rightshifted, rendering it useless.
We do the right thing here. */
HOWTO (R_MIPS_PC16, /* type */ HOWTO (R_MIPS_PC16, /* type */
2, /* rightshift */ 0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */ 2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */ 16, /* bitsize */
TRUE, /* pc_relative */ TRUE, /* pc_relative */
@ -1904,7 +1900,7 @@ static const struct elf_reloc_map mips_reloc_map[] =
/* There is no BFD reloc for R_MIPS_REL32. */ /* There is no BFD reloc for R_MIPS_REL32. */
{ BFD_RELOC_64, R_MIPS_64 }, { BFD_RELOC_64, R_MIPS_64 },
{ BFD_RELOC_CTOR, R_MIPS_64 }, { BFD_RELOC_CTOR, R_MIPS_64 },
{ BFD_RELOC_16_PCREL_S2, R_MIPS_PC16 }, { BFD_RELOC_16_PCREL, R_MIPS_PC16 },
{ BFD_RELOC_HI16_S, R_MIPS_HI16 }, { BFD_RELOC_HI16_S, R_MIPS_HI16 },
{ BFD_RELOC_LO16, R_MIPS_LO16 }, { BFD_RELOC_LO16, R_MIPS_LO16 },
{ BFD_RELOC_GPREL16, R_MIPS_GPREL16 }, { BFD_RELOC_GPREL16, R_MIPS_GPREL16 },

14
bfd/elfn32-mips.c
View file

@ -275,11 +275,9 @@ static reloc_howto_type elf_mips_howto_table_rel[] =
0x0000ffff, /* dst_mask */ 0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */ FALSE), /* pcrel_offset */
/* 16 bit PC relative reference. Note that the ABI document has a typo /* 16 bit PC relative reference. */
and claims R_MIPS_PC16 to be not rightshifted, rendering it useless.
We do the right thing here. */
HOWTO (R_MIPS_PC16, /* type */ HOWTO (R_MIPS_PC16, /* type */
2, /* rightshift */ 0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */ 2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */ 16, /* bitsize */
TRUE, /* pc_relative */ TRUE, /* pc_relative */
@ -774,11 +772,9 @@ static reloc_howto_type elf_mips_howto_table_rela[] =
0x0000ffff, /* dst_mask */ 0x0000ffff, /* dst_mask */
FALSE), /* pcrel_offset */ FALSE), /* pcrel_offset */
/* 16 bit PC relative reference. Note that the ABI document has a typo /* 16 bit PC relative reference. */
and claims R_MIPS_PC16 to be not rightshifted, rendering it useless.
We do the right thing here. */
HOWTO (R_MIPS_PC16, /* type */ HOWTO (R_MIPS_PC16, /* type */
2, /* rightshift */ 0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */ 2, /* size (0 = byte, 1 = short, 2 = long) */
16, /* bitsize */ 16, /* bitsize */
TRUE, /* pc_relative */ TRUE, /* pc_relative */
@ -1841,7 +1837,7 @@ static const struct elf_reloc_map mips_reloc_map[] =
/* There is no BFD reloc for R_MIPS_REL32. */ /* There is no BFD reloc for R_MIPS_REL32. */
{ BFD_RELOC_CTOR, R_MIPS_32 }, { BFD_RELOC_CTOR, R_MIPS_32 },
{ BFD_RELOC_64, R_MIPS_64 }, { BFD_RELOC_64, R_MIPS_64 },
{ BFD_RELOC_16_PCREL_S2, R_MIPS_PC16 }, { BFD_RELOC_16_PCREL, R_MIPS_PC16 },
{ BFD_RELOC_HI16_S, R_MIPS_HI16 }, { BFD_RELOC_HI16_S, R_MIPS_HI16 },
{ BFD_RELOC_LO16, R_MIPS_LO16 }, { BFD_RELOC_LO16, R_MIPS_LO16 },
{ BFD_RELOC_GPREL16, R_MIPS_GPREL16 }, { BFD_RELOC_GPREL16, R_MIPS_GPREL16 },

15
bfd/elfxx-mips.c
View file

@ -496,6 +496,7 @@ static struct mips_got_info *mips_elf_got_for_ibfd
static bfd *reldyn_sorting_bfd; static bfd *reldyn_sorting_bfd;
/* Nonzero if ABFD is using the N32 ABI. */ /* Nonzero if ABFD is using the N32 ABI. */
#define ABI_N32_P(abfd) \ #define ABI_N32_P(abfd) \
((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI2) != 0) ((elf_elfheader (abfd)->e_flags & EF_MIPS_ABI2) != 0)
@ -2129,7 +2130,7 @@ mips_elf_bfd2got_entry_eq (entry1, entry2)
return e1->bfd == e2->bfd; return e1->bfd == e2->bfd;
} }
/* In a multi-got link, determine the GOT to be used for IBFD. G must /* In a multi-got link, determine the GOT to be used for IBDF. G must
be the master GOT data. */ be the master GOT data. */
static struct mips_got_info * static struct mips_got_info *
@ -3315,6 +3316,12 @@ mips_elf_calculate_relocation (abfd, input_bfd, input_section, info,
value &= howto->dst_mask; value &= howto->dst_mask;
break; break;
case R_MIPS_GNU_REL16_S2:
value = symbol + mips_elf_sign_extend (addend << 2, 18) - p;
overflowed_p = mips_elf_overflow_p (value, 18);
value = (value >> 2) & howto->dst_mask;
break;
case R_MIPS_GNU_REL_HI16: case R_MIPS_GNU_REL_HI16:
/* Instead of subtracting 'p' here, we should be subtracting the /* Instead of subtracting 'p' here, we should be subtracting the
equivalent value for the LO part of the reloc, since the value equivalent value for the LO part of the reloc, since the value
@ -3443,10 +3450,8 @@ mips_elf_calculate_relocation (abfd, input_bfd, input_section, info,
break; break;
case R_MIPS_PC16: case R_MIPS_PC16:
case R_MIPS_GNU_REL16_S2: value = mips_elf_sign_extend (addend, 16) + symbol - p;
value = mips_elf_sign_extend (addend << 2, 18) + symbol - p; overflowed_p = mips_elf_overflow_p (value, 16);
overflowed_p = mips_elf_overflow_p (value, 18);
value = (value >> 2) & howto->dst_mask;
break; break;
case R_MIPS_GOT_HI16: case R_MIPS_GOT_HI16:

1
bfd/libbfd.h
View file

@ -850,7 +850,6 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_LO16", "BFD_RELOC_LO16",
"BFD_RELOC_PCREL_HI16_S", "BFD_RELOC_PCREL_HI16_S",
"BFD_RELOC_PCREL_LO16", "BFD_RELOC_PCREL_LO16",
"BFD_RELOC_MIPSEMB_16_PCREL_S2",
"BFD_RELOC_MIPS_LITERAL", "BFD_RELOC_MIPS_LITERAL",
"BFD_RELOC_MIPS_GOT16", "BFD_RELOC_MIPS_GOT16",
"BFD_RELOC_MIPS_CALL16", "BFD_RELOC_MIPS_CALL16",

6
bfd/reloc.c
View file

@ -2080,10 +2080,7 @@ ENUM
BFD_RELOC_PCREL_LO16 BFD_RELOC_PCREL_LO16
ENUMDOC ENUMDOC
Like BFD_RELOC_LO16, but PC relative. Like BFD_RELOC_LO16, but PC relative.
ENUM
BFD_RELOC_MIPSEMB_16_PCREL_S2
ENUMDOC
Like BFD_RELOC_16_PCREL_S2, but for MIPS Embedded PIC.
ENUM ENUM
BFD_RELOC_MIPS_LITERAL BFD_RELOC_MIPS_LITERAL
ENUMDOC ENUMDOC
@ -2153,6 +2150,7 @@ ENUMX
ENUMDOC ENUMDOC
Fujitsu Frv Relocations. Fujitsu Frv Relocations.
COMMENT COMMENT
COMMENT
ENUMDOC ENUMDOC
MIPS ELF relocations. MIPS ELF relocations.

4
gas/ChangeLog
View file

@ -1,3 +1,7 @@
2003-03-12 Alexandre Oliva <aoliva@redhat.com>
* Reverted 2003-03-02's patch.
2003-03-11 Steve Ellcey <sje@cup.hp.com> 2003-03-11 Steve Ellcey <sje@cup.hp.com>
* dwarf2dbg.c (generic_dwarf2_emit_offset): New. * dwarf2dbg.c (generic_dwarf2_emit_offset): New.

64
gas/config/tc-mips.c
View file

@ -2018,8 +2018,7 @@ append_insn (place, ip, address_expr, reloc_type)
if (place == NULL if (place == NULL
&& address_expr && address_expr
&& (*reloc_type == BFD_RELOC_16_PCREL_S2 && *reloc_type == BFD_RELOC_16_PCREL_S2
|| *reloc_type == BFD_RELOC_MIPSEMB_16_PCREL_S2)
&& (pinfo & INSN_UNCOND_BRANCH_DELAY || pinfo & INSN_COND_BRANCH_DELAY && (pinfo & INSN_UNCOND_BRANCH_DELAY || pinfo & INSN_COND_BRANCH_DELAY
|| pinfo & INSN_COND_BRANCH_LIKELY) || pinfo & INSN_COND_BRANCH_LIKELY)
&& mips_relax_branch && mips_relax_branch
@ -2141,18 +2140,6 @@ append_insn (place, ip, address_expr, reloc_type)
break; break;
case BFD_RELOC_16_PCREL_S2: case BFD_RELOC_16_PCREL_S2:
if ((address_expr->X_add_number & 3) != 0)
as_bad (_("branch to misaligned address (0x%lx)"),
(unsigned long) address_expr->X_add_number);
if (mips_relax_branch)
goto need_reloc;
if ((address_expr->X_add_number + 0x20000) & ~0x3ffff)
as_bad (_("branch address range overflow (0x%lx)"),
(unsigned long) address_expr->X_add_number);
ip->insn_opcode |= (address_expr->X_add_number >> 2) & 0xffff;
break;
case BFD_RELOC_MIPSEMB_16_PCREL_S2:
goto need_reloc; goto need_reloc;
default: default:
@ -2167,8 +2154,7 @@ append_insn (place, ip, address_expr, reloc_type)
{ {
fixp[0] = fix_new_exp (frag_now, f - frag_now->fr_literal, 4, fixp[0] = fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
address_expr, address_expr,
(*reloc_type == BFD_RELOC_16_PCREL_S2 *reloc_type == BFD_RELOC_16_PCREL_S2,
|| *reloc_type == BFD_RELOC_MIPSEMB_16_PCREL_S2),
reloc_type[0]); reloc_type[0]);
/* These relocations can have an addend that won't fit in /* These relocations can have an addend that won't fit in
@ -3118,32 +3104,20 @@ macro_build (place, counter, ep, name, fmt, va_alist)
case 'p': case 'p':
assert (ep != NULL); assert (ep != NULL);
/* /*
* This allows macro() to pass an immediate expression for * This allows macro() to pass an immediate expression for
* creating short branches without creating a symbol. * creating short branches without creating a symbol.
* * Note that the expression still might come from the assembly
* We don't allow branch relaxation for these branches, as * input, in which case the value is not checked for range nor
* they should only appear in ".set nomacro" anyway. * is a relocation entry generated (yuck).
*/ */
if (ep->X_op == O_constant) if (ep->X_op == O_constant)
{ {
if ((ep->X_add_number & 3) != 0)
as_bad (_("branch to misaligned address (0x%lx)"),
(unsigned long) ep->X_add_number);
if ((ep->X_add_number + 0x20000) & ~0x3ffff)
as_bad (_("branch address range overflow (0x%lx)"),
(unsigned long) ep->X_add_number);
insn.insn_opcode |= (ep->X_add_number >> 2) & 0xffff; insn.insn_opcode |= (ep->X_add_number >> 2) & 0xffff;
ep = NULL; ep = NULL;
} }
else
{
if (mips_pic == EMBEDDED_PIC)
*r = BFD_RELOC_MIPSEMB_16_PCREL_S2;
else else
*r = BFD_RELOC_16_PCREL_S2; *r = BFD_RELOC_16_PCREL_S2;
}
continue; continue;
case 'a': case 'a':
@ -9180,9 +9154,6 @@ mips_ip (str, ip)
continue; continue;
case 'p': /* pc relative offset */ case 'p': /* pc relative offset */
if (mips_pic == EMBEDDED_PIC)
*offset_reloc = BFD_RELOC_MIPSEMB_16_PCREL_S2;
else
*offset_reloc = BFD_RELOC_16_PCREL_S2; *offset_reloc = BFD_RELOC_16_PCREL_S2;
my_getExpression (&offset_expr, s); my_getExpression (&offset_expr, s);
s = expr_end; s = expr_end;
@ -11200,8 +11171,7 @@ md_apply_fix3 (fixP, valP, seg)
/* BFD's REL handling, for MIPS, is _very_ weird. /* BFD's REL handling, for MIPS, is _very_ weird.
This gives the right results, but it can't possibly This gives the right results, but it can't possibly
be the way things are supposed to work. */ be the way things are supposed to work. */
if ((fixP->fx_r_type != BFD_RELOC_16_PCREL_S2 if (fixP->fx_r_type != BFD_RELOC_16_PCREL_S2
&& fixP->fx_r_type != BFD_RELOC_MIPSEMB_16_PCREL_S2)
|| S_GET_SEGMENT (fixP->fx_addsy) != undefined_section) || S_GET_SEGMENT (fixP->fx_addsy) != undefined_section)
value += fixP->fx_frag->fr_address + fixP->fx_where; value += fixP->fx_frag->fr_address + fixP->fx_where;
} }
@ -11371,10 +11341,9 @@ md_apply_fix3 (fixP, valP, seg)
break; break;
case BFD_RELOC_16_PCREL_S2: case BFD_RELOC_16_PCREL_S2:
case BFD_RELOC_MIPSEMB_16_PCREL_S2:
if ((value & 0x3) != 0) if ((value & 0x3) != 0)
as_bad_where (fixP->fx_file, fixP->fx_line, as_bad_where (fixP->fx_file, fixP->fx_line,
_("Branch to misaligned address (%lx)"), (long) value); _("Branch to odd address (%lx)"), (long) value);
/* /*
* We need to save the bits in the instruction since fixup_segment() * We need to save the bits in the instruction since fixup_segment()
@ -11387,7 +11356,8 @@ md_apply_fix3 (fixP, valP, seg)
do the store, so it must be done here. This is probably do the store, so it must be done here. This is probably
a bug somewhere. */ a bug somewhere. */
if (!fixP->fx_done if (!fixP->fx_done
&& (fixP->fx_addsy == NULL /* ??? */ && (fixP->fx_r_type != BFD_RELOC_16_PCREL_S2
|| fixP->fx_addsy == NULL /* ??? */
|| ! S_IS_DEFINED (fixP->fx_addsy))) || ! S_IS_DEFINED (fixP->fx_addsy)))
value -= fixP->fx_frag->fr_address + fixP->fx_where; value -= fixP->fx_frag->fr_address + fixP->fx_where;
@ -13381,7 +13351,6 @@ tc_gen_reloc (section, fixp)
case BFD_RELOC_32_PCREL: case BFD_RELOC_32_PCREL:
case BFD_RELOC_64_PCREL: case BFD_RELOC_64_PCREL:
case BFD_RELOC_16_PCREL_S2: case BFD_RELOC_16_PCREL_S2:
case BFD_RELOC_MIPSEMB_16_PCREL_S2:
case BFD_RELOC_PCREL_HI16_S: case BFD_RELOC_PCREL_HI16_S:
case BFD_RELOC_PCREL_LO16: case BFD_RELOC_PCREL_LO16:
break; break;
@ -13405,7 +13374,17 @@ tc_gen_reloc (section, fixp)
reloc->addend += S_GET_VALUE (fixp->fx_addsy); reloc->addend += S_GET_VALUE (fixp->fx_addsy);
#endif #endif
/* To support a PC relative reloc when generating embedded PIC code
for ECOFF, we use a Cygnus extension. We check for that here to
make sure that we don't let such a reloc escape normally. */
if ((OUTPUT_FLAVOR == bfd_target_ecoff_flavour
|| OUTPUT_FLAVOR == bfd_target_elf_flavour)
&& code == BFD_RELOC_16_PCREL_S2
&& mips_pic != EMBEDDED_PIC)
reloc->howto = NULL;
else
reloc->howto = bfd_reloc_type_lookup (stdoutput, code); reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
if (reloc->howto == NULL) if (reloc->howto == NULL)
{ {
as_bad_where (fixp->fx_file, fixp->fx_line, as_bad_where (fixp->fx_file, fixp->fx_line,
@ -13491,9 +13470,8 @@ md_convert_frag (abfd, asec, fragp)
exp.X_add_number = fragp->fr_offset; exp.X_add_number = fragp->fr_offset;
fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal, fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal,
4, &exp, 1, ((mips_pic == EMBEDDED_PIC) 4, &exp, 1,
? BFD_RELOC_MIPSEMB_16_PCREL_S2 BFD_RELOC_16_PCREL_S2);
: BFD_RELOC_16_PCREL_S2));
fixp->fx_file = fragp->fr_file; fixp->fx_file = fragp->fr_file;
fixp->fx_line = fragp->fr_line; fixp->fx_line = fragp->fr_line;