2011-01-07 Michael Snyder <msnyder@vmware.com>
* ada-lang.c: Comment cleanup, mostly periods and spaces. * ada-lang.h: Ditto. * ada-tasks.c: Ditto. * ada-valprint.c: Ditto. * aix-threads.c: Ditto. * alpha-linux-nat.c: Ditto. * alpha-linux-tdep.c: Ditto. * alpha-mdebug-tdep.c: Ditto. * alpha-nat.c: Ditto. * alpha-osf1-tdep.c: Ditto. * alpha-tdep.c: Ditto. * alphabsd-nat.c: Ditto. * alphabsd-tdep.c: Ditto. * amd64-darwin-tdep.c: Ditto. * amd64-linux-nat.c: Ditto. * amd64-linux-tdep.c: Ditto. * amd64-sol2-tdep.c: Ditto. * amd64-tdep.c: Ditto. * amd64-fbsd-tdep.c: Ditto. * amd64-nbsd-tdep.c: Ditto. * amd64-obsd-tdep.c: Ditto. * amd64-linux-nat.c: Ditto. * amd64-linux-tdep.c: Ditto. * arm-tdep.c: Ditto. * arm-tdep.h: Ditto. * armnbsd-nat.c: Ditto. * avr-tdep.c: Ditto. * bfin-tdep.c: Ditto. * bsd-kvm.c: Ditto. * c-typeprintc: Ditto. * c-valprint.c: Ditto. * coff-pe-read.h: Ditto. * coffreead.c: Ditto. * cris-tdep.c: Ditto. * d-lang.c: Ditto. * darwin-nat-info.c: Ditto. * darwin-nat.c: Ditto. * dbug-rom.c: Ditto. * dbxread.c: Ditto. * dcache.c: Ditto. * dcache.h: Ditto. * dec-thread.c: Ditto. * defs.h: Ditto. * demangle.c: Ditto. * dicos-tdep.c: Ditto. * dictionary.c: Ditto. * dictionary.h: Ditto. * dink32-rom.c: Ditto. * disasm.c: Ditto. * doublest.c: Ditto. * dsrec.c: Ditto. * dummy-frame.c: Ditto. * dwarf2-frame.c: Ditto. * dwarf2expr.c: Ditto. * dwarf2loc.c: Ditto. * dwarf2read.c: Ditto. * elfread.c: Ditto. * environ.c: Ditto. * eval.c: Ditto. * event-top.h: Ditto. * exceptions.c: Ditto. * exceptions.h: Ditto. * exec.c: Ditto. * expprint.c: Ditto. * expression.h: Ditto. * f-exp.y: Ditto. * f-lang.c: Ditto. * f-lang.h: Ditto. * f-typeprint.c: Ditto. * f-valprint.c: Ditto. * fbsd-nat.c: Ditto. * findvar.c: Ditto. * fork-child.c: Ditto. * frame.c: Ditto. * frame.h: Ditto. * frv-linux-tdep.c: Ditto. * frv-tdep.c: Ditto. * gcore.c: Ditto. * gdb-stabs.h: Ditto. * gdb_assert.h: Ditto. * gdb_string.h: Ditto. * gdb_thread_db.h: Ditto. * gdb_wait.h: Ditto. * gdbarch.sh: Ditto. * gdbcore.h: Ditto. * gdbthread.h: Ditto. * gdbtypes.c: Ditto. * gdbtypes.h: Ditto. * gnu-nat.c: Ditto. * gnu-nat.h: Ditto. * gnu-v2-abi.c: Ditto. * gnu-v3-abi.c: Ditto. * go32-nat.c: Ditto. * gdbarch.c: Regenerate. * gdbarch.h: Regenerate.
This commit is contained in:
Michael Snyder
parent
87973e9f82
commit
0963b4bd45
97 changed files with 1538 additions and 1304 deletions
127
gdb/avr-tdep.c
127
gdb/avr-tdep.c
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@ -43,14 +43,14 @@
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(AVR micros are pure Harvard Architecture processors.)
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The AVR family of microcontrollers have three distinctly different memory
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spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for
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the most part to store program instructions. The sram is 8 bits wide and is
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used for the stack and the heap. Some devices lack sram and some can have
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spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for
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the most part to store program instructions. The sram is 8 bits wide and is
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used for the stack and the heap. Some devices lack sram and some can have
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an additional external sram added on as a peripheral.
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The eeprom is 8 bits wide and is used to store data when the device is
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powered down. Eeprom is not directly accessible, it can only be accessed
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via io-registers using a special algorithm. Accessing eeprom via gdb's
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powered down. Eeprom is not directly accessible, it can only be accessed
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via io-registers using a special algorithm. Accessing eeprom via gdb's
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remote serial protocol ('m' or 'M' packets) looks difficult to do and is
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not included at this time.
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@ -59,15 +59,15 @@
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work, the remote target must be able to handle eeprom accesses and perform
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the address translation.]
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All three memory spaces have physical addresses beginning at 0x0. In
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All three memory spaces have physical addresses beginning at 0x0. In
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addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit
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bytes instead of the 16 bit wide words used by the real device for the
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Program Counter.
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In order for remote targets to work correctly, extra bits must be added to
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addresses before they are send to the target or received from the target
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via the remote serial protocol. The extra bits are the MSBs and are used to
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decode which memory space the address is referring to. */
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via the remote serial protocol. The extra bits are the MSBs and are used to
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decode which memory space the address is referring to. */
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#undef XMALLOC
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#define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
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@ -97,10 +97,10 @@ enum
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AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */
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/* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */
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/* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */
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AVR_MAX_PUSHES = 18,
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/* Number of the last pushed register. r17 for current avr-gcc */
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/* Number of the last pushed register. r17 for current avr-gcc */
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AVR_LAST_PUSHED_REGNUM = 17,
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AVR_ARG1_REGNUM = 24, /* Single byte argument */
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@ -110,14 +110,14 @@ enum
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AVR_RETN_REGNUM = 25, /* Multi byte return value */
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/* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8
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bits? Do these have to match the bfd vma values?. It sure would make
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bits? Do these have to match the bfd vma values? It sure would make
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things easier in the future if they didn't need to match.
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Note: I chose these values so as to be consistent with bfd vma
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addresses.
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TRoth/2002-04-08: There is already a conflict with very large programs
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in the mega128. The mega128 has 128K instruction bytes (64K words),
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in the mega128. The mega128 has 128K instruction bytes (64K words),
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thus the Most Significant Bit is 0x10000 which gets masked off my
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AVR_MEM_MASK.
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@ -126,10 +126,10 @@ enum
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thus requires a 17-bit address.
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For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK
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from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet,
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from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet,
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but could be for some remote targets by just adding the correct offset
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to the address and letting the remote target handle the low-level
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details of actually accessing the eeprom. */
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details of actually accessing the eeprom. */
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AVR_IMEM_START = 0x00000000, /* INSN memory */
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AVR_SMEM_START = 0x00800000, /* SRAM memory */
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@ -194,7 +194,7 @@ struct gdbarch_tdep
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struct type *pc_type;
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};
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/* Lookup the name of a register given it's number. */
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/* Lookup the name of a register given it's number. */
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static const char *
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avr_register_name (struct gdbarch *gdbarch, int regnum)
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@ -229,7 +229,7 @@ avr_register_type (struct gdbarch *gdbarch, int reg_nr)
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return builtin_type (gdbarch)->builtin_uint8;
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}
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/* Instruction address checks and convertions. */
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/* Instruction address checks and convertions. */
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static CORE_ADDR
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avr_make_iaddr (CORE_ADDR x)
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@ -237,10 +237,10 @@ avr_make_iaddr (CORE_ADDR x)
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return ((x) | AVR_IMEM_START);
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}
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/* FIXME: TRoth: Really need to use a larger mask for instructions. Some
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/* FIXME: TRoth: Really need to use a larger mask for instructions. Some
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devices are already up to 128KBytes of flash space.
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TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */
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TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */
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static CORE_ADDR
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avr_convert_iaddr_to_raw (CORE_ADDR x)
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@ -248,7 +248,7 @@ avr_convert_iaddr_to_raw (CORE_ADDR x)
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return ((x) & 0xffffffff);
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}
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/* SRAM address checks and convertions. */
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/* SRAM address checks and convertions. */
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static CORE_ADDR
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avr_make_saddr (CORE_ADDR x)
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@ -266,11 +266,11 @@ avr_convert_saddr_to_raw (CORE_ADDR x)
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return ((x) & 0xffffffff);
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}
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/* EEPROM address checks and convertions. I don't know if these will ever
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actually be used, but I've added them just the same. TRoth */
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/* EEPROM address checks and convertions. I don't know if these will ever
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actually be used, but I've added them just the same. TRoth */
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/* TRoth/2002-04-08: Commented out for now to allow fix for problem with large
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programs in the mega128. */
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programs in the mega128. */
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/* static CORE_ADDR */
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/* avr_make_eaddr (CORE_ADDR x) */
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@ -290,7 +290,7 @@ avr_convert_saddr_to_raw (CORE_ADDR x)
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/* return ((x) & 0xffffffff); */
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/* } */
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/* Convert from address to pointer and vice-versa. */
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/* Convert from address to pointer and vice-versa. */
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static void
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avr_address_to_pointer (struct gdbarch *gdbarch,
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@ -476,13 +476,13 @@ avr_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
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/* Not really part of a prologue, but still need to scan for it, is when a
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function prologue moves values passed via registers as arguments to new
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registers. In this case, all local variables live in registers, so there
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may be some register saves. This is what it looks like:
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registers. In this case, all local variables live in registers, so there
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may be some register saves. This is what it looks like:
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movw rMM, rNN
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...
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There could be multiple movw's. If the target doesn't have a movw insn, it
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will use two mov insns. This could be done after any of the above prologue
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There could be multiple movw's. If the target doesn't have a movw insn, it
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will use two mov insns. This could be done after any of the above prologue
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types. */
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static CORE_ADDR
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@ -503,8 +503,8 @@ avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
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len = AVR_MAX_PROLOGUE_SIZE;
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/* FIXME: TRoth/2003-06-11: This could be made more efficient by only
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reading in the bytes of the prologue. The problem is that the figuring
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out where the end of the prologue is is a bit difficult. The old code
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reading in the bytes of the prologue. The problem is that the figuring
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out where the end of the prologue is is a bit difficult. The old code
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tried to do that, but failed quite often. */
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read_memory (pc_beg, prologue, len);
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@ -698,7 +698,7 @@ avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
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insn = extract_unsigned_integer (&prologue[vpc], 2, byte_order);
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if ((insn & 0xfe0f) == 0x920f) /* push rXX */
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{
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/* Bits 4-9 contain a mask for registers R0-R32. */
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/* Bits 4-9 contain a mask for registers R0-R32. */
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int regno = (insn & 0x1f0) >> 4;
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info->size++;
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info->saved_regs[regno].addr = info->size;
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@ -750,7 +750,7 @@ avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
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}
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}
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/* Third stage of the prologue scanning. (Really two stages)
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/* Third stage of the prologue scanning. (Really two stages).
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Scan for:
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sbiw r28,XX or subi r28,lo8(XX)
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sbci r29,hi8(XX)
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@ -798,7 +798,7 @@ avr_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc_beg, CORE_ADDR pc_end,
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else
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return pc_beg + vpc;
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/* Scan the last part of the prologue. May not be present for interrupt
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/* Scan the last part of the prologue. May not be present for interrupt
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or signal handler functions, which is why we set the prologue type
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when we saw the beginning of the prologue previously. */
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@ -875,17 +875,18 @@ avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
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/* Either we didn't find the start of this function (nothing we can do),
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or there's no line info, or the line after the prologue is after
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the end of the function (there probably isn't a prologue). */
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the end of the function (there probably isn't a prologue). */
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return pc;
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}
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/* Not all avr devices support the BREAK insn. Those that don't should treat
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it as a NOP. Thus, it should be ok. Since the avr is currently a remote
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only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */
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/* Not all avr devices support the BREAK insn. Those that don't should treat
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it as a NOP. Thus, it should be ok. Since the avr is currently a remote
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only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */
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static const unsigned char *
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avr_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR * pcptr, int *lenptr)
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avr_breakpoint_from_pc (struct gdbarch *gdbarch,
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CORE_ADDR *pcptr, int *lenptr)
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{
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static const unsigned char avr_break_insn [] = { 0x98, 0x95 };
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*lenptr = sizeof (avr_break_insn);
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@ -944,7 +945,7 @@ avr_return_value (struct gdbarch *gdbarch, struct type *func_type,
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the saved registers of frame described by FRAME_INFO. This
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includes special registers such as pc and fp saved in special ways
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in the stack frame. sp is even more special: the address we return
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for it IS the sp for the next frame. */
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for it IS the sp for the next frame. */
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static struct avr_unwind_cache *
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avr_frame_unwind_cache (struct frame_info *this_frame,
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@ -1012,7 +1013,7 @@ avr_frame_unwind_cache (struct frame_info *this_frame,
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info->saved_regs[i].addr = info->prev_sp - info->saved_regs[i].addr;
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/* Except for the main and startup code, the return PC is always saved on
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the stack and is at the base of the frame. */
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the stack and is at the base of the frame. */
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if (info->prologue_type != AVR_PROLOGUE_MAIN)
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info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp;
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@ -1098,7 +1099,7 @@ avr_frame_prev_register (struct frame_info *this_frame,
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And to confuse matters even more, the return address stored
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on the stack is in big endian byte order, even though most
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everything else about the avr is little endian. Ick! */
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everything else about the avr is little endian. Ick! */
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ULONGEST pc;
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int i;
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unsigned char buf[3];
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@ -1163,7 +1164,7 @@ avr_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
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}
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/* When arguments must be pushed onto the stack, they go on in reverse
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order. The below implements a FILO (stack) to do this. */
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order. The below implements a FILO (stack) to do this. */
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struct stack_item
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{
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@ -1202,7 +1203,7 @@ pop_stack_item (struct stack_item *si)
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(depending on size) may go into these registers. The rest go on the stack.
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All arguments are aligned to start in even-numbered registers (odd-sized
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arguments, including char, have one free register above them). For example,
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arguments, including char, have one free register above them). For example,
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an int in arg1 and a char in arg2 would be passed as such:
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arg1 -> r25:r24
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@ -1210,7 +1211,7 @@ pop_stack_item (struct stack_item *si)
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Arguments that are larger than 2 bytes will be split between two or more
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registers as available, but will NOT be split between a register and the
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stack. Arguments that go onto the stack are pushed last arg first (this is
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stack. Arguments that go onto the stack are pushed last arg first (this is
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similar to the d10v). */
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/* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be
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@ -1232,7 +1233,7 @@ pop_stack_item (struct stack_item *si)
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must allocate space into which the callee will copy the return value. In
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this case, a pointer to the return value location is passed into the callee
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in register R0, which displaces one of the other arguments passed in via
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registers R0 to R2. */
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registers R0 to R2. */
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static CORE_ADDR
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avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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@ -1269,16 +1270,16 @@ avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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const bfd_byte *contents = value_contents (arg);
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int len = TYPE_LENGTH (type);
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/* Calculate the potential last register needed. */
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/* Calculate the potential last register needed. */
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last_regnum = regnum - (len + (len & 1));
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/* If there are registers available, use them. Once we start putting
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stuff on the stack, all subsequent args go on stack. */
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/* If there are registers available, use them. Once we start putting
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stuff on the stack, all subsequent args go on stack. */
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if ((si == NULL) && (last_regnum >= 8))
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{
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ULONGEST val;
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/* Skip a register for odd length args. */
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/* Skip a register for odd length args. */
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if (len & 1)
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regnum--;
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@ -1287,19 +1288,19 @@ avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
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regcache_cooked_write_unsigned
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(regcache, regnum--, val >> (8 * (len - j - 1)));
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}
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/* No registers available, push the args onto the stack. */
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/* No registers available, push the args onto the stack. */
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else
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{
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/* From here on, we don't care about regnum. */
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/* From here on, we don't care about regnum. */
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si = push_stack_item (si, contents, len);
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}
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}
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/* Push args onto the stack. */
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/* Push args onto the stack. */
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while (si)
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{
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sp -= si->len;
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/* Add 1 to sp here to account for post decr nature of pushes. */
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/* Add 1 to sp here to account for post decr nature of pushes. */
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write_memory (sp + 1, si->data, si->len);
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si = pop_stack_item (si);
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}
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@ -1314,10 +1315,10 @@ avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
|
|||
}
|
||||
|
||||
sp -= call_length;
|
||||
/* Use 'sp + 1' since pushes are post decr ops. */
|
||||
/* Use 'sp + 1' since pushes are post decr ops. */
|
||||
write_memory (sp + 1, buf, call_length);
|
||||
|
||||
/* Finally, update the SP register. */
|
||||
/* Finally, update the SP register. */
|
||||
regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM,
|
||||
avr_convert_saddr_to_raw (sp));
|
||||
|
||||
|
|
@ -1341,7 +1342,7 @@ avr_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
|
|||
return -1;
|
||||
}
|
||||
|
||||
/* Initialize the gdbarch structure for the AVR's. */
|
||||
/* Initialize the gdbarch structure for the AVR's. */
|
||||
|
||||
static struct gdbarch *
|
||||
avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
||||
|
|
@ -1376,7 +1377,7 @@ avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|||
return best_arch->gdbarch;
|
||||
}
|
||||
|
||||
/* None found, create a new architecture from the information provided. */
|
||||
/* None found, create a new architecture from the information provided. */
|
||||
tdep = XMALLOC (struct gdbarch_tdep);
|
||||
gdbarch = gdbarch_alloc (&info, tdep);
|
||||
|
||||
|
|
@ -1448,17 +1449,17 @@ avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
|
|||
}
|
||||
|
||||
/* Send a query request to the avr remote target asking for values of the io
|
||||
registers. If args parameter is not NULL, then the user has requested info
|
||||
registers. If args parameter is not NULL, then the user has requested info
|
||||
on a specific io register [This still needs implemented and is ignored for
|
||||
now]. The query string should be one of these forms:
|
||||
now]. The query string should be one of these forms:
|
||||
|
||||
"Ravr.io_reg" -> reply is "NN" number of io registers
|
||||
|
||||
"Ravr.io_reg:addr,len" where addr is first register and len is number of
|
||||
registers to be read. The reply should be "<NAME>,VV;" for each io register
|
||||
registers to be read. The reply should be "<NAME>,VV;" for each io register
|
||||
where, <NAME> is a string, and VV is the hex value of the register.
|
||||
|
||||
All io registers are 8-bit. */
|
||||
All io registers are 8-bit. */
|
||||
|
||||
static void
|
||||
avr_io_reg_read_command (char *args, int from_tty)
|
||||
|
|
@ -1471,7 +1472,7 @@ avr_io_reg_read_command (char *args, int from_tty)
|
|||
unsigned int val;
|
||||
int i, j, k, step;
|
||||
|
||||
/* Find out how many io registers the target has. */
|
||||
/* Find out how many io registers the target has. */
|
||||
bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR,
|
||||
"avr.io_reg", &buf);
|
||||
|
||||
|
|
@ -1538,10 +1539,10 @@ _initialize_avr_tdep (void)
|
|||
|
||||
/* Add a new command to allow the user to query the avr remote target for
|
||||
the values of the io space registers in a saner way than just using
|
||||
`x/NNNb ADDR`. */
|
||||
`x/NNNb ADDR`. */
|
||||
|
||||
/* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr
|
||||
io_registers' to signify it is not available on other platforms. */
|
||||
io_registers' to signify it is not available on other platforms. */
|
||||
|
||||
add_cmd ("io_registers", class_info, avr_io_reg_read_command,
|
||||
_("query remote avr target for io space register values"),
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue