[ gas/ChangeLog ]

2003-01-02  Chris Demetriou  <cgd@broadcom.com>

        * config/tc-mips.c: Update copyright years to include 2003.
        (mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
        Additionally, clean up their code slightly and clean up their
        comments some more.


        * doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.

[ gas/testsuite/ChangeLog ]
2003-01-02  Chris Demetriou  <cgd@broadcom.com>

        * gas/mips/elf_arch_mips32r2.d: Fix file description comment.

[ include/opcode/ChangeLog ]
2003-01-02  Chris Demetriou  <cgd@broadcom.com>

        * mips.h: Update copyright years to include 2002 (which had
        been missed previously) and 2003.  Make comments about "+A",
        "+B", and "+C" operand types more descriptive.
This commit is contained in:
Chris Demetriou 2003-01-02 20:03:09 +00:00
parent 06825bd145
commit 071742cf97
7 changed files with 101 additions and 60 deletions

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@ -1,3 +1,12 @@
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c: Update copyright years to include 2003.
(mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
Additionally, clean up their code slightly and clean up their
comments some more.
* doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.
2003-01-01 Daniel Jacobowitz <drow@mvista.com> 2003-01-01 Daniel Jacobowitz <drow@mvista.com>
* doc/Makefile.am (as.1): Depend on "asconfig.texi gasver.texi * doc/Makefile.am (as.1): Depend on "asconfig.texi gasver.texi

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@ -1,5 +1,5 @@
/* tc-mips.c -- assemble code for a MIPS chip. /* tc-mips.c -- assemble code for a MIPS chip.
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
Free Software Foundation, Inc. Free Software Foundation, Inc.
Contributed by the OSF and Ralph Campbell. Contributed by the OSF and Ralph Campbell.
Written by Keith Knowles and Ralph Campbell, working independently. Written by Keith Knowles and Ralph Campbell, working independently.
@ -8118,6 +8118,7 @@ mips_ip (str, ip)
unsigned int regno; unsigned int regno;
unsigned int lastregno = 0; unsigned int lastregno = 0;
unsigned int lastpos = 0; unsigned int lastpos = 0;
unsigned int limlo, limhi;
char *s_reset; char *s_reset;
char save_c = 0; char save_c = 0;
@ -8286,58 +8287,76 @@ mips_ip (str, ip)
case '+': /* Opcode extension character. */ case '+': /* Opcode extension character. */
switch (*++args) switch (*++args)
{ {
case 'A': /* ins/ext "pos". */ case 'A': /* ins/ext position, becomes LSB. */
my_getExpression (&imm_expr, s); limlo = 0;
check_absolute_expr (ip, &imm_expr); limhi = 31;
if ((unsigned long) imm_expr.X_add_number > 31) my_getExpression (&imm_expr, s);
{ check_absolute_expr (ip, &imm_expr);
as_bad (_("Improper position (%lu)"), if ((unsigned long) imm_expr.X_add_number < limlo
(unsigned long) imm_expr.X_add_number); || (unsigned long) imm_expr.X_add_number > limhi)
imm_expr.X_add_number = 0; {
} as_bad (_("Improper position (%lu)"),
lastpos = imm_expr.X_add_number; (unsigned long) imm_expr.X_add_number);
ip->insn_opcode |= lastpos << OP_SH_SHAMT; imm_expr.X_add_number = limlo;
imm_expr.X_op = O_absent; }
s = expr_end; lastpos = imm_expr.X_add_number;
continue; ip->insn_opcode |= (imm_expr.X_add_number
& OP_MASK_SHAMT) << OP_SH_SHAMT;
imm_expr.X_op = O_absent;
s = expr_end;
continue;
case 'B': /* "ins" size spec (becomes MSB). */ case 'B': /* ins size, becomes MSB. */
my_getExpression (&imm_expr, s); limlo = 1;
check_absolute_expr (ip, &imm_expr); limhi = 32;
if (imm_expr.X_add_number == 0 my_getExpression (&imm_expr, s);
|| (unsigned long) imm_expr.X_add_number > 32 check_absolute_expr (ip, &imm_expr);
|| ((unsigned long) imm_expr.X_add_number /* Check for negative input so that small negative numbers
+ lastpos) > 32) will not succeed incorrectly. The checks against
{ (pos+size) transitively check "size" itself,
as_bad (_("Improper insert size (%lu, position %lu)"), assuming that "pos" is reasonable. */
(unsigned long) imm_expr.X_add_number, if ((long) imm_expr.X_add_number < 0
(unsigned long) lastpos); || ((unsigned long) imm_expr.X_add_number
imm_expr.X_add_number &= OP_MASK_INSMSB; + lastpos) < limlo
} || ((unsigned long) imm_expr.X_add_number
ip->insn_opcode |= (lastpos + imm_expr.X_add_number + lastpos) > limhi)
- 1) << OP_SH_INSMSB; {
imm_expr.X_op = O_absent; as_bad (_("Improper insert size (%lu, position %lu)"),
s = expr_end; (unsigned long) imm_expr.X_add_number,
continue; (unsigned long) lastpos);
imm_expr.X_add_number = limlo - lastpos;
}
ip->insn_opcode |= ((lastpos + imm_expr.X_add_number - 1)
& OP_MASK_INSMSB) << OP_SH_INSMSB;
imm_expr.X_op = O_absent;
s = expr_end;
continue;
case 'C': /* "ext" size spec (becomes MSBD). */ case 'C': /* ext size, becomes MSBD. */
my_getExpression (&imm_expr, s); limlo = 1;
check_absolute_expr (ip, &imm_expr); limhi = 32;
if (imm_expr.X_add_number == 0 my_getExpression (&imm_expr, s);
|| (unsigned long) imm_expr.X_add_number > 32 check_absolute_expr (ip, &imm_expr);
|| ((unsigned long) imm_expr.X_add_number /* Check for negative input so that small negative numbers
+ lastpos) > 32) will not succeed incorrectly. The checks against
{ (pos+size) transitively check "size" itself,
as_bad (_("Improper extract size (%lu, position %lu)"), assuming that "pos" is reasonable. */
(unsigned long) imm_expr.X_add_number, if ((long) imm_expr.X_add_number < 0
(unsigned long) lastpos); || ((unsigned long) imm_expr.X_add_number
imm_expr.X_add_number &= OP_MASK_EXTMSBD; + lastpos) < limlo
} || ((unsigned long) imm_expr.X_add_number
ip->insn_opcode |= (imm_expr.X_add_number + lastpos) > limhi)
- 1) << OP_SH_EXTMSBD; {
imm_expr.X_op = O_absent; as_bad (_("Improper extract size (%lu, position %lu)"),
s = expr_end; (unsigned long) imm_expr.X_add_number,
continue; (unsigned long) lastpos);
imm_expr.X_add_number = limlo - lastpos;
}
ip->insn_opcode |= ((imm_expr.X_add_number - 1)
& OP_MASK_EXTMSBD) << OP_SH_EXTMSBD;
imm_expr.X_op = O_absent;
s = expr_end;
continue;
case 'D': case 'D':
/* +D is for disassembly only; never match. */ /* +D is for disassembly only; never match. */

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@ -288,8 +288,8 @@ assembly language programmers!
@kindex @code{.set mips@var{n}} @kindex @code{.set mips@var{n}}
@sc{gnu} @code{@value{AS}} supports an additional directive to change @sc{gnu} @code{@value{AS}} supports an additional directive to change
the @sc{mips} Instruction Set Architecture level on the fly: @code{.set the @sc{mips} Instruction Set Architecture level on the fly: @code{.set
mips@var{n}}. @var{n} should be a number from 0 to 5, or 32 or 64. mips@var{n}}. @var{n} should be a number from 0 to 5, or 32, 32r2, or 64.
The values 1 to 5, 32, and 64 make the assembler accept instructions The values other than 0 make the assembler accept instructions
for the corresponding @sc{isa} level, from that point on in the for the corresponding @sc{isa} level, from that point on in the
assembly. @code{.set mips@var{n}} affects not only which instructions assembly. @code{.set mips@var{n}} affects not only which instructions
are permitted, but also how certain macros are expanded. @code{.set are permitted, but also how certain macros are expanded. @code{.set

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@ -1,3 +1,7 @@
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips32r2.d: Fix file description comment.
2002-12-31 Chris Demetriou <cgd@broadcom.com> 2002-12-31 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0sel-names-mips32.d: New test. * gas/mips/cp0sel-names-mips32.d: New test.

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@ -1,7 +1,7 @@
#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric #objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric
#name: MIPS MIPS32r2 instructions #name: MIPS MIPS32r2 instructions
# Check MIPS32 instruction assembly # Check MIPS32 Release 2 (mips32r2) instruction assembly
.*: +file format .*mips.* .*: +file format .*mips.*

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@ -1,3 +1,9 @@
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips.h: Update copyright years to include 2002 (which had
been missed previously) and 2003. Make comments about "+A",
"+B", and "+C" operand types more descriptive.
2002-12-31 Chris Demetriou <cgd@broadcom.com> 2002-12-31 Chris Demetriou <cgd@broadcom.com>
* mips.h: Note that the "+D" operand type name is now used. * mips.h: Note that the "+D" operand type name is now used.

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@ -1,5 +1,5 @@
/* mips.h. Mips opcode list for GDB, the GNU debugger. /* mips.h. Mips opcode list for GDB, the GNU debugger.
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
Free Software Foundation, Inc. Free Software Foundation, Inc.
Contributed by Ralph Campbell and OSF Contributed by Ralph Campbell and OSF
Commented and modified by Ian Lance Taylor, Cygnus Support Commented and modified by Ian Lance Taylor, Cygnus Support
@ -233,11 +233,14 @@ struct mips_opcode
"x" accept and ignore register name "x" accept and ignore register name
"z" must be zero register "z" must be zero register
"K" 5 bit Hardware Register (rdhwr instruction) (OP_*_RD) "K" 5 bit Hardware Register (rdhwr instruction) (OP_*_RD)
"+A" 5 bit ins/ext position/lsb (OP_*_SHAMT) "+A" 5 bit ins/ext position, which becomes LSB (OP_*_SHAMT).
"+B" 5 bit "ins" size spec (OP_*_INSMSB). Requires that "+A" Enforces: 0 <= pos < 32.
occur first! "+B" 5 bit ins size, which becomes MSB (OP_*_INSMSB).
"+C" 5 bit "ext" msbd spec (OP_*_EXTMSBD). Requires that "+A" Requires that "+A" occur first to set position.
occur first! Enforces: 0 < (pos+size) <= 32.
"+C" 5 bit ext size, which becomes MSBD (OP_*_EXTMSBD).
Requires that "+A" occur first to set position.
Enforces: 0 < (pos+size) <= 32.
Floating point instructions: Floating point instructions:
"D" 5 bit destination register (OP_*_FD) "D" 5 bit destination register (OP_*_FD)