2021-04-06 10:56:30 +02:00
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2021-04-06 Jan Beulich <jbeulich@suse.com>
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* write.c (fixup_segment): Move add_symbol_segment declaration
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into main loop.
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C99 gas configury
Also remove alloca stuff since we don't use alloca in gas nowadays.
* configure.ac: Don't check for string.h, strings.h, stdlib.h,
errno.h, limits.h, locale.h or time.h. Don't check for unlink,
remove, sbrk (unused) or setlocale. Adjust gas_test_headers.
Don't check for errno, free, malloc, realoc, sbrk, strstr, getenv
strstr, or vsnprintf declarations.
(AC_ISC_POSIX, AC_FUNC_ALLOCA, AC_C_INLINE): Don't invoke.
* as.h: Don't include alloca-conf.h, include config.h instead.
Include string.h, stdlib.h, errno.h unconditionally. Remove
various fallback declarations.
* asintl.h: Don't test HAVE_LOCALE_H.
* as.c: Don't test HAVE_SETLOCALE.
* dwarf2dbg.c: Include limits.h unconditionally.
* expr.c: Likewise.
* sb.c: Likewise.
* symbols.c: Likewise.
* config/tc-cr16.c: Likewise.
* config/tc-d30v.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-tic54x.c (tic54x_mlib): Call remove rather than unlink.
* config.in: Regenerate.
* configure: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
2021-04-05 15:31:25 +09:30
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2021-04-05 Alan Modra <amodra@gmail.com>
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* configure.ac: Don't check for string.h, strings.h, stdlib.h,
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errno.h, limits.h, locale.h or time.h. Don't check for unlink,
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remove, sbrk (unused) or setlocale. Adjust gas_test_headers.
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Don't check for errno, free, malloc, realoc, sbrk, strstr, getenv
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strstr, or vsnprintf declarations.
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(AC_ISC_POSIX, AC_FUNC_ALLOCA, AC_C_INLINE): Don't invoke.
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* as.h: Don't include alloca-conf.h, include config.h instead.
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Include string.h, stdlib.h, errno.h unconditionally. Remove
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various fallback declarations.
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* asintl.h: Don't test HAVE_LOCALE_H.
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* as.c: Don't test HAVE_SETLOCALE.
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* dwarf2dbg.c: Include limits.h unconditionally.
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* expr.c: Likewise.
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* sb.c: Likewise.
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* symbols.c: Likewise.
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* config/tc-cr16.c: Likewise.
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* config/tc-d30v.c: Likewise.
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* config/tc-i386.c: Likewise.
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* config/tc-ia64.c: Likewise.
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* config/tc-tic54x.c (tic54x_mlib): Call remove rather than unlink.
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* config.in: Regenerate.
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* configure: Regenerate.
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* Makefile.in: Regenerate.
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* doc/Makefile.in: Regenerate.
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2021-03-22 14:56:16 +01:00
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2021-04-01 Martin Liska <mliska@suse.cz>
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* config/obj-coff.c (strneq): Remove strneq and use startswith.
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(weak_is_altname): Likewise.
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(obj_coff_section): Likewise.
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* config/tc-cr16.c (process_label_constant): Likewise.
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* config/tc-crx.c (strneq): Likewise.
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2021-03-22 13:33:04 +01:00
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2021-04-01 Martin Liska <mliska@suse.cz>
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* as.c (select_emulation_mode): Use startswith.
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* config/m68k-parse.y: Likewise.
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* config/obj-aout.c (obj_aout_type): Likewise.
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* config/obj-elf.c (elf_common_parse): Likewise.
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(obj_elf_section_type): Likewise.
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(obj_elf_section_word): Likewise.
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(obj_elf_section): Likewise.
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(obj_elf_symver): Likewise.
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(adjust_stab_sections): Likewise.
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* config/obj-evax.c (evax_shorten_name): Likewise.
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* config/obj-macho.c (obj_mach_o_is_frame_section): Likewise.
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* config/tc-aarch64.c (parse_aarch64_imm_float): Likewise.
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(aarch64_parse_features): Likewise.
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(create_register_alias): Likewise.
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(aarch64_data_in_code): Likewise.
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(md_parse_option): Likewise.
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* config/tc-alpha.c (s_alpha_section_word): Likewise.
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(s_alpha_pdesc): Likewise.
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* config/tc-arc.c (tokenize_extregister): Likewise.
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* config/tc-arm.c (create_register_alias): Likewise.
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(create_neon_reg_alias): Likewise.
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(parse_ifimm_zero): Likewise.
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(parse_qfloat_immediate): Likewise.
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(arm_elf_section_type): Likewise.
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(arm_parse_extension): Likewise.
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(aeabi_set_public_attributes): Likewise.
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(s_arm_arch_extension): Likewise.
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(arm_data_in_code): Likewise.
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(start_unwind_section): Likewise.
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* config/tc-avr.c (avr_ldi_expression): Likewise.
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* config/tc-csky.c (is_freglist_legal): Likewise.
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(csky_s_section): Likewise.
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* config/tc-d30v.c (do_assemble): Likewise.
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* config/tc-dlx.c (parse_operand): Likewise.
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* config/tc-epiphany.c (md_assemble): Likewise.
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* config/tc-h8300.c (h8300_elf_section): Likewise.
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(get_operand): Likewise.
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* config/tc-hppa.c (pa_ip): Likewise.
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(pa_level): Likewise.
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(pa_space): Likewise.
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* config/tc-i386.c (i386_mach): Likewise.
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(md_assemble): Likewise.
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(check_VecOperations): Likewise.
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(i386_target_format): Likewise.
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(i386_elf_section_type): Likewise.
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* config/tc-ia64.c (start_unwind_section): Likewise.
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(md_parse_option): Likewise.
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(is_taken_branch): Likewise.
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(idesc->name,): Likewise.
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(note_register_values): Likewise.
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(do_alias): Likewise.
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* config/tc-m32c.c (insn_to_subtype): Likewise.
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* config/tc-m68hc11.c (get_operand): Likewise.
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(md_assemble): Likewise.
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* config/tc-m68k.c (m68k_ip): Likewise.
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(m68k_elf_suffix): Likewise.
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* config/tc-mcore.c (mcore_s_section): Likewise.
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* config/tc-metag.c (parse_get_set): Likewise.
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(md_parse_option): Likewise.
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* config/tc-microblaze.c (parse_imm): Likewise.
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(check_got): Likewise.
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(md_apply_fix): Likewise.
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* config/tc-mips.c (CPU_HAS_MIPS16): Likewise.
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(md_begin): Likewise.
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(s_is_linkonce): Likewise.
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(check_regno): Likewise.
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(match_float_constant): Likewise.
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(classify_vr4120_insn): Likewise.
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(match_insn): Likewise.
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(mips_after_parse_args): Likewise.
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(s_change_sec): Likewise.
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(s_option): Likewise.
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(parse_code_option): Likewise.
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(md_section_align): Likewise.
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(nopic_need_relax): Likewise.
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* config/tc-mmix.c (mmix_handle_mmixal): Likewise.
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* config/tc-mn10300.c (mn10300_fix_adjustable): Likewise.
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(mn10300_end_of_match): Likewise.
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* config/tc-msp430.c (msp430_make_init_symbols): Likewise.
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* config/tc-nds32.c (nds32_parse_option): Likewise.
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* config/tc-nds32.h (md_do_align): Likewise.
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* config/tc-nios2.c (strprefix): Likewise.
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(nios2_special_relocation_p): Likewise.
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(nios2_parse_base_register): Likewise.
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(nios2_cons): Likewise.
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* config/tc-ns32k.c (addr_mode): Likewise.
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* config/tc-pdp11.c (set_option): Likewise.
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(parse_reg): Likewise.
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(parse_ac5): Likewise.
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(parse_op_no_deferred): Likewise.
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(set_cpu_model): Likewise.
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(set_machine_model): Likewise.
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* config/tc-pj.c (md_operand): Likewise.
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* config/tc-ppc.c (ppc_set_cpu): Likewise.
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(ppc_arch): Likewise.
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(ppc_section_type): Likewise.
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* config/tc-s12z.c (tb_reg_rel): Likewise.
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(tb_opr_rel): Likewise.
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* config/tc-s390.c (s390_parse_cpu): Likewise.
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(md_parse_option): Likewise.
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* config/tc-score.c (s3_nopic_need_relax): Likewise.
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(s3_pic_need_relax): Likewise.
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* config/tc-score7.c (s7_nopic_need_relax): Likewise.
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(s7_pic_need_relax): Likewise.
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* config/tc-sh.h (SUB_SEGMENT_ALIGN): Likewise.
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* config/tc-sparc.c (md_parse_option): Likewise.
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(sparc_ip): Likewise.
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(s_reserve): Likewise.
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(s_common): Likewise.
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(s_seg): Likewise.
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(sparc_cons): Likewise.
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* config/tc-tic54x.c (stag_add_field): Likewise.
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(tic54x_endstruct): Likewise.
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* config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
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* config/tc-v850.c (v850_comm): Likewise.
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(md_begin): Likewise.
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(md_assemble): Likewise.
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* config/tc-vax.c (vax_cons): Likewise.
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* config/tc-wasm32.c (wasm32_leb128): Likewise.
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* config/tc-xstormy16.c (md_operand): Likewise.
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* config/tc-xtensa.c (get_directive): Likewise.
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(xg_instruction_matches_option_term): Likewise.
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(is_unaligned_label): Likewise.
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(cache_literal_section): Likewise.
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* config/xtensa-relax.c (parse_precond): Likewise.
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(parse_option_cond): Likewise.
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(transition_applies): Likewise.
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(wide_branch_opcode): Likewise.
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* dw2gencfi.c: Likewise.
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* dwarf2dbg.c (dwarf2_directive_filename): Likewise.
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* ehopt.c (get_cie_info): Likewise.
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* input-file.c (input_file_open): Likewise.
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* listing.c (listing_newline): Likewise.
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(debugging_pseudo): Likewise.
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* read.c (read_a_source_file): Likewise.
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* write.c (adjust_reloc_syms): Likewise.
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(compress_debug): Likewise.
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(maybe_generate_build_notes): Likewise.
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2021-03-31 18:15:46 +10:30
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2021-03-31 Alan Modra <amodra@gmail.com>
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* itbl-lex-wrapper.c: Include as.h not sysdep.h.
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* config/bfin-lex-wrapper.c: Likewise.
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* itbl-lex.l: Don't include as.h.
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* config/bfin-lex.l: Likewise.
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Use bool in gas
* as.h (POISON_BFD_BOOLEAN): Define.
* as.c, * as.h, * atof-generic.c, * config/atof-ieee.c,
* config/bfin-aux.h, * config/obj-coff.c, * config/obj-ecoff.c,
* config/obj-elf.c, * config/obj-elf.h, * config/obj-som.c,
* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
* config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h,
* config/tc-avr.c, * config/tc-avr.h, * config/tc-bfin.c,
* config/tc-bfin.h, * config/tc-bpf.c, * config/tc-cris.c,
* config/tc-csky.c, * config/tc-csky.h, * config/tc-d10v.c,
* config/tc-d10v.h, * config/tc-d30v.c, * config/tc-d30v.h,
* config/tc-dlx.c, * config/tc-dlx.h, * config/tc-epiphany.c,
* config/tc-epiphany.h, * config/tc-fr30.c, * config/tc-fr30.h,
* config/tc-frv.c, * config/tc-frv.h, * config/tc-ft32.c,
* config/tc-ft32.h, * config/tc-h8300.c, * config/tc-hppa.c,
* config/tc-i386-intel.c, * config/tc-i386.c, * config/tc-ia64.c,
* config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-iq2000.h,
* config/tc-lm32.c, * config/tc-lm32.h, * config/tc-m32c.c,
* config/tc-m32c.h, * config/tc-m32r.c, * config/tc-m32r.h,
* config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-mcore.c,
* config/tc-mcore.h, * config/tc-mep.c, * config/tc-mep.h,
* config/tc-metag.c, * config/tc-metag.h,
* config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mips.h,
* config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c,
* config/tc-mn10300.h, * config/tc-moxie.c, * config/tc-msp430.c,
* config/tc-msp430.h, * config/tc-mt.c, * config/tc-mt.h,
* config/tc-nds32.c, * config/tc-nds32.h, * config/tc-nios2.c,
* config/tc-ns32k.c, * config/tc-or1k.c, * config/tc-or1k.h,
* config/tc-pdp11.c, * config/tc-ppc.c, * config/tc-pru.c,
* config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h,
* config/tc-rx.c, * config/tc-rx.h, * config/tc-s12z.c,
* config/tc-s12z.h, * config/tc-s390.c, * config/tc-score.c,
* config/tc-score.h, * config/tc-score7.c, * config/tc-sh.c,
* config/tc-sh.h, * config/tc-spu.c, * config/tc-tic54x.c,
* config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-tilegx.c,
* config/tc-tilepro.c, * config/tc-v850.c, * config/tc-v850.h,
* config/tc-visium.c, * config/tc-visium.h, * config/tc-wasm32.c,
* config/tc-wasm32.h, * config/tc-xc16x.c, * config/tc-xgate.c,
* config/tc-xstormy16.c, * config/tc-xstormy16.h,
* config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c,
* config/tc-z8k.c, * config/xtensa-istack.h,
* config/xtensa-relax.c, * config/xtensa-relax.h, * dw2gencfi.c,
* dwarf2dbg.c, * dwarf2dbg.h, * expr.c, * expr.h, * frags.c,
* frags.h, * listing.c, * macro.c, * output-file.c, * read.c,
* read.h, * stabs.c, * symbols.c, * write.c: Replace bfd_boolean
with bool, FALSE with false, and TRUE with true.
2021-03-31 10:42:05 +10:30
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2021-03-31 Alan Modra <amodra@gmail.com>
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* as.h (POISON_BFD_BOOLEAN): Define.
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* as.c, * as.h, * atof-generic.c, * config/atof-ieee.c,
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* config/bfin-aux.h, * config/obj-coff.c, * config/obj-ecoff.c,
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* config/obj-elf.c, * config/obj-elf.h, * config/obj-som.c,
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* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
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* config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h,
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* config/tc-avr.c, * config/tc-avr.h, * config/tc-bfin.c,
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* config/tc-bfin.h, * config/tc-bpf.c, * config/tc-cris.c,
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* config/tc-csky.c, * config/tc-csky.h, * config/tc-d10v.c,
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* config/tc-d10v.h, * config/tc-d30v.c, * config/tc-d30v.h,
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* config/tc-dlx.c, * config/tc-dlx.h, * config/tc-epiphany.c,
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* config/tc-epiphany.h, * config/tc-fr30.c, * config/tc-fr30.h,
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* config/tc-frv.c, * config/tc-frv.h, * config/tc-ft32.c,
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* config/tc-ft32.h, * config/tc-h8300.c, * config/tc-hppa.c,
|
|
|
|
|
* config/tc-i386-intel.c, * config/tc-i386.c, * config/tc-ia64.c,
|
|
|
|
|
* config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-iq2000.h,
|
|
|
|
|
* config/tc-lm32.c, * config/tc-lm32.h, * config/tc-m32c.c,
|
|
|
|
|
* config/tc-m32c.h, * config/tc-m32r.c, * config/tc-m32r.h,
|
|
|
|
|
* config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-mcore.c,
|
|
|
|
|
* config/tc-mcore.h, * config/tc-mep.c, * config/tc-mep.h,
|
|
|
|
|
* config/tc-metag.c, * config/tc-metag.h,
|
|
|
|
|
* config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mips.h,
|
|
|
|
|
* config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c,
|
|
|
|
|
* config/tc-mn10300.h, * config/tc-moxie.c, * config/tc-msp430.c,
|
|
|
|
|
* config/tc-msp430.h, * config/tc-mt.c, * config/tc-mt.h,
|
|
|
|
|
* config/tc-nds32.c, * config/tc-nds32.h, * config/tc-nios2.c,
|
|
|
|
|
* config/tc-ns32k.c, * config/tc-or1k.c, * config/tc-or1k.h,
|
|
|
|
|
* config/tc-pdp11.c, * config/tc-ppc.c, * config/tc-pru.c,
|
|
|
|
|
* config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h,
|
|
|
|
|
* config/tc-rx.c, * config/tc-rx.h, * config/tc-s12z.c,
|
|
|
|
|
* config/tc-s12z.h, * config/tc-s390.c, * config/tc-score.c,
|
|
|
|
|
* config/tc-score.h, * config/tc-score7.c, * config/tc-sh.c,
|
|
|
|
|
* config/tc-sh.h, * config/tc-spu.c, * config/tc-tic54x.c,
|
|
|
|
|
* config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-tilegx.c,
|
|
|
|
|
* config/tc-tilepro.c, * config/tc-v850.c, * config/tc-v850.h,
|
|
|
|
|
* config/tc-visium.c, * config/tc-visium.h, * config/tc-wasm32.c,
|
|
|
|
|
* config/tc-wasm32.h, * config/tc-xc16x.c, * config/tc-xgate.c,
|
|
|
|
|
* config/tc-xstormy16.c, * config/tc-xstormy16.h,
|
|
|
|
|
* config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c,
|
|
|
|
|
* config/tc-z8k.c, * config/xtensa-istack.h,
|
|
|
|
|
* config/xtensa-relax.c, * config/xtensa-relax.h, * dw2gencfi.c,
|
|
|
|
|
* dwarf2dbg.c, * dwarf2dbg.h, * expr.c, * expr.h, * frags.c,
|
|
|
|
|
* frags.h, * listing.c, * macro.c, * output-file.c, * read.c,
|
|
|
|
|
* read.h, * stabs.c, * symbols.c, * write.c: Replace bfd_boolean
|
|
|
|
|
with bool, FALSE with false, and TRUE with true.
|
|
|
|
|
|
2021-03-31 10:07:02 +10:30
|
|
|
|
2021-03-31 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c: Include stdint.h in place of bfd_stdint.h.
|
|
|
|
|
* config/tc-crx.c: Likewise.
|
|
|
|
|
* config/tc-nds32.h: Likewise.
|
|
|
|
|
|
2021-03-30 14:09:41 +02:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (build_modrm_byte): Change return type.
|
|
|
|
|
Change type of "default_seg". Use NULL. Adjust setting of
|
|
|
|
|
"default_seg".
|
|
|
|
|
(reg_ds, reg_es, reg_ss): New.
|
|
|
|
|
(struct _i386_insn): Change type of seg[].
|
|
|
|
|
(md_begin): Initialize reg_ds, reg_es, and reg_ss.
|
|
|
|
|
(swap_operands): Change type of "temp_seg".
|
|
|
|
|
(check_string): Adjust %es check.
|
|
|
|
|
(process_operands): Change type of "default_seg". Use NULL.
|
|
|
|
|
Adjust segment override processing..
|
|
|
|
|
(i386_att_operand): Adjust segment override handling.
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_operand): Likewise.
|
|
|
|
|
|
2021-03-30 14:08:48 +02:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (reg_eax): New.
|
|
|
|
|
(md_begin): Initialize reg_eax.
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_simplify_register): Use
|
|
|
|
|
reg_eax.
|
|
|
|
|
(i386_intel_simplify): Likewise.
|
|
|
|
|
|
2021-03-30 14:08:11 +02:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (reg_st0): New.
|
|
|
|
|
(md_begin): Convert to switch(). Initialize reg_st0. Don't
|
|
|
|
|
insert other st(N).
|
|
|
|
|
(parse_real_register): Adjust st(N) processing.
|
|
|
|
|
|
2021-03-30 14:06:37 +02:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (rc_op): Delete.
|
|
|
|
|
(struct Rounding_Operation): Move ...
|
|
|
|
|
(struct _i386_insn): ... here. Change field "rounding".
|
|
|
|
|
(build_evex_prefix): Adjust rounding processing.
|
|
|
|
|
(swap_2_operands): Likewise.
|
|
|
|
|
(check_VecOperands): Likewise.
|
|
|
|
|
(RC_SAE_immediate): Likewise.
|
|
|
|
|
(optimize_encoding): Adjust check for rounding.
|
|
|
|
|
(build_modrm_byte): Likewise.
|
|
|
|
|
(output_imm): Likewise.
|
|
|
|
|
(md_assemble): Initialize rounding type.
|
|
|
|
|
|
2021-03-30 14:06:09 +02:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (broadcast_op): Delete.
|
|
|
|
|
(struct Broadcast_Operation): Move ...
|
|
|
|
|
(struct _i386_insn): ... here. Change field "broadcast".
|
|
|
|
|
(match_mem_size): Adjust check for broadcast.
|
|
|
|
|
(optimize_encoding): Likewise.
|
|
|
|
|
(process_suffix): Likewise.
|
|
|
|
|
(build_evex_prefix): Adjust broadcast processing.
|
|
|
|
|
(swap_2_operands): Likewise.
|
|
|
|
|
(check_VecOperations): Likewise.
|
|
|
|
|
(match_template): Likewise.
|
|
|
|
|
(check_VecOperands): Likewise.
|
|
|
|
|
|
2021-03-30 14:05:42 +02:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (reg_k0): New.
|
|
|
|
|
(mask_op): Delete.
|
|
|
|
|
(struct Mask_Operation): Move ...
|
|
|
|
|
(struct _i386_insn): ... here. Change field "mask".
|
|
|
|
|
(md_begin): Initialize reg_k0.
|
|
|
|
|
(build_evex_prefix): Adjust mask processing.
|
|
|
|
|
(swap_2_operands): Likewise.
|
|
|
|
|
(check_VecOperands): Likewise.
|
|
|
|
|
(check_VecOperations): Likewise.
|
|
|
|
|
(optimize_encoding): Adjust checks for masking.
|
|
|
|
|
(output_insn): Likewise.
|
|
|
|
|
|
2021-03-30 14:05:10 +02:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (swap_2_operands): Switch parameters to
|
|
|
|
|
unsigned.
|
|
|
|
|
(struct RC_Operation): Switch operand field to unsigned.
|
|
|
|
|
(struct Mask_Operation): Likewise.
|
|
|
|
|
(struct Broadcast_Operation): Likewise.
|
|
|
|
|
(build_evex_prefix): Drop cast.
|
|
|
|
|
(check_VecOperands): Likewise.
|
|
|
|
|
(build_modrm_byte): Likewise.
|
|
|
|
|
(output_imm): Likewise.
|
|
|
|
|
(check_VecOperations): Add casts to unsigned.
|
|
|
|
|
|
2021-03-29 12:06:09 +02:00
|
|
|
|
2021-03-29 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-sse2avx.s: Add vpsadbw case.
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx-swap-2.d.
|
|
|
|
|
testsuite/gas/i386/x86-64-sse2avx.d: Adjust expectations.
|
|
|
|
|
|
2021-03-29 12:02:50 +02:00
|
|
|
|
2021-03-29 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (optimize_encoding): Replace VEX-encoding
|
|
|
|
|
checks by opcodespace ones.
|
|
|
|
|
(insert_lfence_before): Likewise.
|
|
|
|
|
(maybe_fused_with_jcc_p): Likewise.
|
|
|
|
|
(add_branch_padding_frag_p): Likewise.
|
|
|
|
|
(output_disp): Likewise.
|
|
|
|
|
(load_insn_p): Re-arrange checks to key applicable ones off of
|
|
|
|
|
an opcodespace check.
|
|
|
|
|
(md_assemble): Adjust opcode checks.
|
|
|
|
|
(check_byte_reg): Likewise.
|
|
|
|
|
(process_operands): Likewise.
|
|
|
|
|
(i386_index_check): Likewise.
|
|
|
|
|
(process_suffix): Likewise. New local variable is_movx. Adjust
|
|
|
|
|
movsx/movzx and crc32 handling.
|
|
|
|
|
(output_insn): Adjust opcode checks. Drop no longer reachable
|
|
|
|
|
case labels. Output legacy encoding prefixes in addition to the
|
|
|
|
|
base_opcode byte(s). Rework counting of prefixes for extended
|
|
|
|
|
opcode maps.
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_simplify_register): Adjust
|
|
|
|
|
opcode checks.
|
|
|
|
|
|
TRUE/FALSE simplification
There is really no need to write code like "foo != 0 ? TRUE : FALSE"
unless we had stupidly defined FALSE as something other than 0 or TRUE
as something other than 1. The simpler "foo != 0" does just as well.
Similarly "(condition == TRUE)" or "(condition == FALSE) can be
simplified to "(condition)" and "(!condition)" respectively.
I'll note that there is reason to use "integer_expression != 0" when
assigning a bfd_boolean rather than the simpler "integer_expression",
if you expect the variable to have 0 or 1 value. It's probably even a
good idea to not rely on implicit conversion if bfd_boolean were _Bool.
bfd/
* aoutx.h (aout_link_write_symbols): Don't cast boolean expression
to bfd_boolean.
* elf32-or1k.c (or1k_set_got_and_rela_sizes): Dont compare booleans
against FALSE.
* elf32-arc.c (name_for_global_symbol): Don't compare boolean to TRUE.
(is_reloc_PC_relative): Don't use "boolean_condition ? TRUE : FALSE".
(is_reloc_SDA_relative, is_reloc_for_GOT): Likewise.
(is_reloc_for_PLT, is_reloc_for_TLS): Likewise.
* elf32-arm.c (stm32l4xx_need_create_replacing_stub): Likewise.
* elf32-nds32.c (insert_nds32_elf_blank): Likewise.
* elf32-rx.c (rx_set_section_contents): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise.
* elfxx-mips.c (_bfd_mips_elf_ignore_undef_symbol): Likewise.
* mach-o.c (bfd_mach_o_read_command): Likewise.
* targets.c (bfd_get_target_info): Likewise.
binutils/
* dlltool.c (main): Don't use "boolean_condition ? TRUE : FALSE".
* dwarf.c (read_and_display_attr_value): Likewise.
(display_debug_str_offsets): Likewise.
* objdump.c (dump_bfd): Likewise.
* readelf.c (dump_section_as_strings): Likewise.
(dump_section_as_bytes): Likewise.
gas/
* atof-generic.c (FALSE, TRUE): Don't define.
* config/obj-elf.h (FALSE, TRUE): Don't define.
* config/obj-som.h (FALSE, TRUE): Don't define.
* config/tc-hppa.h (FALSE, TRUE): Don't define.
* config/tc-pdp11.c (FALSE, TRUE): Don't define.
* config/tc-iq2000.h (obj_fix_adjustable): Delete.
* config/tc-m32r.h (TC_FIX_ADJUSTABLE): Delete.
* config/tc-mt.h (obj_fix_adjustable): Delete.
* config/tc-nds32.h (TC_FIX_ADJUSTABLE): Delete.
* config/tc-arc.c (parse_opcode_flags): Simplify boolean expression.
(relaxable_flag, relaxable_operand, assemble_insn): Likewise.
(tokenize_extregister): Likewise.
* config/tc-csky.c (parse_opcode, get_operand_value): Likewise.
(parse_operands_op, parse_operands, md_assemble): Likewise.
* config/tc-d10v.c (build_insn): Likewise.
* config/tc-score.c (s3_gen_insn_frag): Likewise.
* config/tc-score7.c (s7_gen_insn_frag, s7_relax_frag): Likewise.
* config/tc-tic6x.c (tic6x_update_features, md_assemble): Likewise.
* config/tc-z80.c (emit_byte): Likewise.
include/
* opcode/aarch64.h (alias_opcode_p): Simplify boolean expression.
(opcode_has_alias, pseudo_opcode_p, optional_operand_p): Likewise.
(opcode_has_special_coder): Likewise.
ld/
* emultempl/aix.em (gld${EMULATION_NAME}_before_allocation): Simplify
boolean expression.
* lexsup.c (parse_args): Likewise.
* pe-dll.c (pe_dll_id_target): Likewise.
opcodes/
* aarch64-opc.c (vector_qualifier_p): Simplify boolean expression.
(fp_qualifier_p, get_data_pattern): Likewise.
(aarch64_get_operand_modifier_from_value): Likewise.
(aarch64_extend_operator_p, aarch64_shift_operator_p): Likewise.
(operand_variant_qualifier_p): Likewise.
(qualifier_value_in_range_constraint_p): Likewise.
(aarch64_get_qualifier_esize): Likewise.
(aarch64_get_qualifier_nelem): Likewise.
(aarch64_get_qualifier_standard_value): Likewise.
(get_lower_bound, get_upper_bound): Likewise.
(aarch64_find_best_match, match_operands_qualifier): Likewise.
(aarch64_print_operand): Likewise.
* aarch64-opc.h (operand_has_inserter, operand_has_extractor): Likewise.
(operand_need_sign_extension, operand_need_shift_by_two): Likewise.
(operand_need_shift_by_four, operand_maybe_stack_pointer): Likewise.
* arm-dis.c (print_insn_mve, print_insn_thumb32): Likewise.
* tic6x-dis.c (tic6x_check_fetch_packet_header): Likewise.
(print_insn_tic6x): Likewise.
2021-03-29 09:52:56 +10:30
|
|
|
|
2021-03-29 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* atof-generic.c (FALSE, TRUE): Don't define.
|
|
|
|
|
* config/obj-elf.h (FALSE, TRUE): Don't define.
|
|
|
|
|
* config/obj-som.h (FALSE, TRUE): Don't define.
|
|
|
|
|
* config/tc-hppa.h (FALSE, TRUE): Don't define.
|
|
|
|
|
* config/tc-pdp11.c (FALSE, TRUE): Don't define.
|
|
|
|
|
* config/tc-iq2000.h (obj_fix_adjustable): Delete.
|
|
|
|
|
* config/tc-m32r.h (TC_FIX_ADJUSTABLE): Delete.
|
|
|
|
|
* config/tc-mt.h (obj_fix_adjustable): Delete.
|
|
|
|
|
* config/tc-nds32.h (TC_FIX_ADJUSTABLE): Delete.
|
|
|
|
|
* config/tc-arc.c (parse_opcode_flags): Simplify boolean expression.
|
|
|
|
|
(relaxable_flag, relaxable_operand, assemble_insn): Likewise.
|
|
|
|
|
(tokenize_extregister): Likewise.
|
|
|
|
|
* config/tc-csky.c (parse_opcode, get_operand_value): Likewise.
|
|
|
|
|
(parse_operands_op, parse_operands, md_assemble): Likewise.
|
|
|
|
|
* config/tc-d10v.c (build_insn): Likewise.
|
|
|
|
|
* config/tc-score.c (s3_gen_insn_frag): Likewise.
|
|
|
|
|
* config/tc-score7.c (s7_gen_insn_frag, s7_relax_frag): Likewise.
|
|
|
|
|
* config/tc-tic6x.c (tic6x_update_features, md_assemble): Likewise.
|
|
|
|
|
* config/tc-z80.c (emit_byte): Likewise.
|
|
|
|
|
|
gas int vs bfd_boolean fixes
* config/tc-arm.c (struct arm_long_option_table <func>): Return
bfd_boolean.
* config/tc-arm.h (arm_optimize_expr, arm_data_in_code): Likewise.
* config/tc-metag.c (parse_mov_port): Replace unsigned int variable
with bfd_boolean.
(parse_mmov, parse_mov_ct, parse_alu, parse_shift, parse_bitop),
(parse_cmp, parse_fmmov, parse_fmov_data, parse_fearith),
(parse_dget_set, parse_dalu): Likewise, ensuring assignment from
logical expressions.
(struct metag_long_option <func>): Return bfd_boolean.
(metag_parse_cpu, metag_parse_fpu, metag_parse_dsp): Likewise.
* config/tc-msp430.c (msp430_dstoperand): Correct dummy type.
* config/tc-s12z.c (parse_operand_func): Return bfd_boolean.
(no_operands, lex_force_match, lex_reg_list): Likewise.
(size_from_suffix): Return int.
(s12z_relax_frag, md_estimate_size_before_relax): Return 0.
* config/tc-s12z.h (tc_s12z_fix_adjustable): Likewise.
2021-03-29 09:49:35 +10:30
|
|
|
|
2021-03-29 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (struct arm_long_option_table <func>): Return
|
|
|
|
|
bfd_boolean.
|
|
|
|
|
* config/tc-arm.h (arm_optimize_expr, arm_data_in_code): Likewise.
|
|
|
|
|
* config/tc-metag.c (parse_mov_port): Replace unsigned int variable
|
|
|
|
|
with bfd_boolean.
|
|
|
|
|
(parse_mmov, parse_mov_ct, parse_alu, parse_shift, parse_bitop),
|
|
|
|
|
(parse_cmp, parse_fmmov, parse_fmov_data, parse_fearith),
|
|
|
|
|
(parse_dget_set, parse_dalu): Likewise, ensuring assignment from
|
|
|
|
|
logical expressions.
|
|
|
|
|
(struct metag_long_option <func>): Return bfd_boolean.
|
|
|
|
|
(metag_parse_cpu, metag_parse_fpu, metag_parse_dsp): Likewise.
|
|
|
|
|
* config/tc-msp430.c (msp430_dstoperand): Correct dummy type.
|
|
|
|
|
* config/tc-s12z.c (parse_operand_func): Return bfd_boolean.
|
|
|
|
|
(no_operands, lex_force_match, lex_reg_list): Likewise.
|
|
|
|
|
(size_from_suffix): Return int.
|
|
|
|
|
(s12z_relax_frag, md_estimate_size_before_relax): Return 0.
|
|
|
|
|
* config/tc-s12z.h (tc_s12z_fix_adjustable): Likewise.
|
|
|
|
|
|
2021-03-26 11:43:19 +01:00
|
|
|
|
2021-03-26 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-nosse2.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-nosse2.l: New.
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new test.
|
|
|
|
|
|
2021-03-24 21:24:35 +00:00
|
|
|
|
2021-03-25 Abid Qadeer <abidh@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/nios2/brn.d: New.
|
|
|
|
|
* testsuite/gas/nios2/brn.d: New.
|
|
|
|
|
|
2021-03-25 08:20:55 +01:00
|
|
|
|
2021-03-25 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Use t instead of i.tm.
|
|
|
|
|
|
2021-03-25 08:20:19 +01:00
|
|
|
|
2021-03-25 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/avx512f-nondef.s: Add vgather cases.
|
|
|
|
|
* testsuite/gas/i386/x86-64-vgather-check.s: Add cases with
|
|
|
|
|
colliding registers in the upper half of the space.
|
|
|
|
|
* testsuite/gas/i386/avx512f-nondef.d,
|
|
|
|
|
testsuite/gas/i386/vgather-check.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-vgather-check.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-vgather-check-error.l,
|
|
|
|
|
testsuite/gas/i386/x86-64-vgather-check-warn.e: Adjust
|
|
|
|
|
expecations.
|
|
|
|
|
* testsuite/gas/i386/vgather-check-none.d,
|
|
|
|
|
testsuite/gas/i386/vgather-check-warn.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-vgather-check-none.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-vgather-check-warn.d: Refer to "base"
|
|
|
|
|
tests for expected dump output.
|
|
|
|
|
|
2021-03-25 08:19:21 +01:00
|
|
|
|
2021-03-25 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/avx512f-nondef.s: Add case for EVEX.z
|
|
|
|
|
without mask register.
|
|
|
|
|
* testsuite/gas/i386/avx512f-nondef.d: Adjust expectations.
|
|
|
|
|
|
2021-03-25 08:18:41 +01:00
|
|
|
|
2021-03-25 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Widen set of insns to avoid
|
|
|
|
|
swapping operands for.
|
|
|
|
|
* testsuite/gas/i386/invlpgb.s: Fix, re-arrange, and add Intel
|
|
|
|
|
syntax tests.
|
|
|
|
|
* testsuite/gas/i386/snp.s: Re-arrange and add multi-operand as
|
|
|
|
|
well as Intel syntax tests.
|
|
|
|
|
* testsuite/gas/i386/invlpgb.d, testsuite/gas/i386/snp.d: Adjust
|
|
|
|
|
expectations.
|
|
|
|
|
* testsuite/gas/i386/invlpgb64.d, testsuite/gas/i386/snp64.d:
|
|
|
|
|
Likewise. Drop passing --def-sym to as.
|
|
|
|
|
|
2021-03-25 08:17:45 +01:00
|
|
|
|
2021-03-25 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
PR/gas 27419
|
|
|
|
|
* config/tc-i386.c (process_suffix): Restrict (%rip) -> (%eip)
|
|
|
|
|
conversion to x32 mode.
|
|
|
|
|
* testsuite/gas/i386/ilp32/enqcmd.s,
|
|
|
|
|
testsuite/gas/i386/ilp32/enqcmd.d,
|
|
|
|
|
testsuite/gas/i386/ilp32/movdir.s,
|
|
|
|
|
testsuite/gas/i386/ilp32/movdir.d: New.
|
|
|
|
|
* testsuite/gas/i386/x86-64-enqcmd.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-movdir.s: Drop mismatched operand
|
|
|
|
|
cases.
|
|
|
|
|
* testsuite/gas/i386/x86-64-enqcmd-inval.s: Add (%rip) and
|
|
|
|
|
(%eip) cases.
|
|
|
|
|
* testsuite/gas/i386/x86-64-movdir64b-reg.s Add (%eip) case.
|
|
|
|
|
* testsuite/gas/i386/x86-64-enqcmd.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-enqcmd-intel.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-enqcmd-inval.l,
|
|
|
|
|
testsuite/gas/i386/x86-64-movdir.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-movdir-intel.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-movdir64b-reg.l: Adjust expectations.
|
|
|
|
|
|
2021-03-25 11:29:34 +10:30
|
|
|
|
2021-03-25 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 27647
|
|
|
|
|
* testsuite/gas/ppc/a2.d: Update expected output.
|
|
|
|
|
* testsuite/gas/ppc/power8.d: Likewise.
|
|
|
|
|
|
2021-03-24 08:33:33 +01:00
|
|
|
|
2021-03-24 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (struct _i386_insn): New field
|
|
|
|
|
opcode_length.
|
|
|
|
|
(md_begin): Drop assertion.
|
|
|
|
|
(install_template): New.
|
|
|
|
|
(build_vex_prefix): Call install_template.
|
|
|
|
|
(match_template): Likewise.
|
|
|
|
|
(process_operands): Use new opcode_length field.
|
|
|
|
|
(output_jump): Likewise.
|
|
|
|
|
(output_insn): Likewise. Adjust psedo prefix check.
|
|
|
|
|
|
2021-03-24 08:32:32 +01:00
|
|
|
|
2021-03-24 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_begin): Add assertion.
|
|
|
|
|
(build_vex_prefix): Drop implied prefix calculation.
|
|
|
|
|
(build_evex_prefix): Likewise.
|
|
|
|
|
(optimize_encoding): Adjust opcode checks.
|
|
|
|
|
(load_insn_p): Also check opcodeprefix.
|
|
|
|
|
(match_template): Also check opcodespace.
|
|
|
|
|
(process_suffix): Likewise.
|
|
|
|
|
(process_operands): Likewise.
|
|
|
|
|
(output_insn): Likewise. Also check isprefix when discaring
|
|
|
|
|
standalone LOCK.
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_operand): Also check
|
|
|
|
|
opcodespace.
|
|
|
|
|
|
2021-03-24 08:31:41 +01:00
|
|
|
|
2021-03-24 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (parse_insn): Recognize pseudo prefixes by
|
|
|
|
|
base_opcode and extension_opcode.
|
|
|
|
|
|
2021-03-23 17:09:53 +01:00
|
|
|
|
2021-03-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (pte): Re-order opc_pfx[] entries.
|
|
|
|
|
|
2021-03-23 17:09:11 +01:00
|
|
|
|
2021-03-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (output_i386_opcode): Invoke
|
|
|
|
|
process_i386_cpu_flag() slightly later.
|
|
|
|
|
(process_i386_opcodes): Likewise.
|
|
|
|
|
|
2021-03-23 17:08:39 +01:00
|
|
|
|
2021-03-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (pte): Print prefix and encoding space.
|
|
|
|
|
(build_vex_prefix): Check opcodespace instead of opcodeprefix.
|
|
|
|
|
(build_evex_prefix): Likewise.
|
|
|
|
|
(load_insn_p): Likewise.
|
|
|
|
|
|
2021-03-23 08:44:35 +01:00
|
|
|
|
2021-03-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (load_insn_p): Use PREFIX_NONE. Fold two
|
|
|
|
|
if()-s.
|
|
|
|
|
(match_template, output_insn): Use PREFIX_NONE.
|
|
|
|
|
|
2021-03-23 08:44:03 +01:00
|
|
|
|
2021-03-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_index_check): New local variable t.
|
|
|
|
|
Correct MPX insn check.
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_simplify_register): Correct
|
|
|
|
|
MPX insn check.
|
|
|
|
|
* testsuite/gas/i386/x86-64-mpx.s: Add RIP-relative cases. Test
|
|
|
|
|
index scaling by other than 1.
|
|
|
|
|
* testsuite/gas/i386/x86-64-mpx.d: Adjust expectations.
|
|
|
|
|
|
2021-03-19 11:50:26 +01:00
|
|
|
|
2021-03-22 Martin Liska <mliska@suse.cz>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_parse_option): Replace usage of CONST_STRNEQ with startswith.
|
|
|
|
|
(x86_64_section_word): Likewise.
|
|
|
|
|
* config/tc-sparc.c (md_parse_option): Likewise.
|
|
|
|
|
|
2021-03-19 14:24:05 +10:30
|
|
|
|
2021-03-19 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* app.c (do_scrub_chars): Don't lose spaces before a slash.
|
|
|
|
|
|
2021-03-18 21:33:51 +01:00
|
|
|
|
2021-03-18 Christian Groessler <chris@groessler.org>
|
|
|
|
|
|
|
|
|
|
* config/tc-z8k.c (apply_fix): Handle 7-bit relocations correctly.
|
|
|
|
|
Problem found by Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>.
|
|
|
|
|
|
2021-02-24 13:26:29 +08:00
|
|
|
|
2021-03-16 Kuan-Lin Chen <kuanlinchentw@gmail.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (ext_version_table): Add b, zba, zbb and zbc.
|
|
|
|
|
(riscv_multi_subset_supports): Add INSN_CLASS_ZB*.
|
|
|
|
|
* testsuite/gas/riscv/b-ext-64.s: Bitmanip test case.
|
|
|
|
|
* testsuite/gas/riscv/b-ext-64.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/b-ext.s: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/b-ext.d: Likewise.
|
|
|
|
|
|
aarch64: Add few missing system registers
This patch adds few missing system registers to GAS: LORC_EL1,
LOREA_EL1, LORN_EL1, LORSA_EL1, ICC_CTLR_EL3, ICC_SRE_ELX, ICH_VTR_EL2.
gas/ChangeLog:
2021-03-02 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* testsuite/gas/aarch64/illegal-sysreg-7.d: New test.
* testsuite/gas/aarch64/illegal-sysreg-7.l: New test.
* testsuite/gas/aarch64/illegal-sysreg-7.s: New test.
* testsuite/gas/aarch64/sysreg-7.d: New test.
* testsuite/gas/aarch64/sysreg-7.s: New test.
opcodes/ChangeLog:
2021-03-02 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* aarch64-opc.c: Add lorc_el1, lorea_el1, lorn_el1, lorsa_el1,
icc_ctlr_el3, icc_sre_elx, ich_vtr_el2 system registers.
2021-03-12 14:18:59 +00:00
|
|
|
|
2021-03-12 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/illegal-sysreg-7.d: New test.
|
|
|
|
|
* testsuite/gas/aarch64/illegal-sysreg-7.l: New test.
|
|
|
|
|
* testsuite/gas/aarch64/illegal-sysreg-7.s: New test.
|
|
|
|
|
* testsuite/gas/aarch64/sysreg-7.d: New test.
|
|
|
|
|
* testsuite/gas/aarch64/sysreg-7.s: New test.
|
|
|
|
|
|
aix: implement TLS relocation for gas and ld
Add support for TLS in XCOFF. Amongst the things done by this commit:
- Update XCOFF auxialiary header to match new version and allow TLS
sections.
- Add TLS sections (.tdata and .tbss) support in gas and ld.
- Add support for the TLS relocations in gas and ld.
Two different types BFD_RELOC are created for PPC and PPC64 as
the size is a pointer, thus distinct in 32 or 64bit.
The addresses given by ld to .tdata and .tbss is a bit special. In
XCOFF, these addresses are actually offsets from the TLS pointer
computed at runtime. AIX assembly and linker does the same. In
top of that, the .tdata must be before .data (this is mandatory for AIX
loader). Thus, the aix ld script is recomputing "." before .data to restore
its original value. There might be a simpler way, but this one is working.
Optimisation linked to TLS relocations aren't yet implemented.
bfd/
* reloc.c (BFD_RELOC_PPC_TLS_LE, BFD_RELOC_PPC_TLS_IE,
BFD_RELOC_PPC_TLS_M, BFD_RELOC_PPC_TLS_ML, BFD_RELOC_PPC64_TLS_GD,
BFD_RELOC_PPC64_TLS_LD, BFD_RELOC_PPC64_TLS_LE,
BFD_RELOC_PPC64_TLS_IE, BFD_RELOC_PPC64_TLS_M,
BFD_RELOC_PPC64_TLS_ML): New relocations.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* coff-rs6000.c (xcoff_calculate_relocation): Call
xcoff_reloc_type_tls for TLS relocations.
(xcoff_howto_table): Implement TLS relocations.
(_bfd_xcoff_reloc_type_lookup): Add cases TLS relocations.
(xcoff_reloc_type_tls): New function.
* coff64-rs6000.c (xcoff_calculate_relocation): Likewise.
(xcoff_howto_table): Likewise.
(_bfd_xcoff_reloc_type_lookup): Likewise.
* coffcode.h (sec_to_styp_flags): Handle TLS sections.
(styp_to_sec_flags): Likewise.
(coff_compute_section_file_positions): Avoid file offset
optimisation for .data when the previous section is .tdata.
(coff_write_object_contents): Handle TLS sections.
* coffswap.h (coff_swap_aouthdr_out): Add support for
new fields in aouthdr.
* libxcoff.h (xcoff_reloc_type_tls): Add prototype.
* xcofflink.c (xcoff_link_add_symbols): Handle XMC_UL.
(xcoff_need_ldrel_p): Add cases for TLS relocations.
(xcoff_create_ldrel): Add l_symndx for TLS sections.
gas/
* config/tc-ppc.c (ppc_xcoff_text_section, ppc_xcoff_data_section,
(ppc_xcoff_bss_section, ppc_xcoff_tdata_section,
(ppc_xcoff_tbss_section): New variables.
(ppc_text_subsegment, ppc_text_csects, ppc_data_subgments,
(ppc_data_csects): Removed.
(ppc_xcoff_section_is_initialized, ppc_init_xcoff_section,
ppc_xcoff_parse_cons): New functions.
(md_being): Initialize XCOFF sections.
(ppc_xcoff_suffix): Add support for TLS relocations
(fixup_size, md_apply_fix): Add support for new BFD_RELOC.
(ppc_change_csect): Handle XMC_TL, XMC_UL. Correctly, add XMC_BS
to .bss section. Handle new XCOFF section variables.
(ppc_comm): Likewise.
(ppc_toc): Likewise.
(ppc_symbol_new_hook): Likewise.
(ppc_frob_symbol): Likewise.
(ppc_fix_adjustable): Add tbss support.
* config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): New define.
(ppc_xcoff_parse_cons): Add prototype.
(struct ppc_xcoff_section): New structure.
ld/
* emultempl/aix.em: Ensure .tdata section is removed
if empty, even with -r flag.
* scripttempl/aix.sc: Handle TLS sections.
* testsuite/ld-powerpc/aix52.exp: Add new tests.
* testsuite/ld-powerpc/aix-tls-reloc-32.d: New test.
* testsuite/ld-powerpc/aix-tls-reloc-64.d: New test.
* testsuite/ld-powerpc/aix-tls-reloc.ex: New test.
* testsuite/ld-powerpc/aix-tls-reloc.s: New test.
* testsuite/ld-powerpc/aix-tls-section-32.d: New test.
* testsuite/ld-powerpc/aix-tls-section-64.d: New test.
* testsuite/ld-powerpc/aix-tls-section.ex: New test.
* testsuite/ld-powerpc/aix-tls-section.s: New test.
include/
* coff/internal.h (struct internal_aouthdr): Add new fields.
* coff/rs6000.h (AOUTHDRÃ): Add new fields.
* coff/rs6k64.h (struct external_filehdr): Likewise.
* coff/xcoff.h (_TDATA), _TBSS): New defines
(RS6K_AOUTHDR_TLS_LE, RS6K_AOUTHDR_RAS, RS6K_AOUTHDR_ALGNTDATA,
RS6K_AOUTHDR_SHR_SYMTAB, RS6K_AOUTHDR_FORK_POLICY,
RS6K_AOUTHDR_FORK_COR): New defines.
(XMC_TU): Removed.
(XMC_UL): New define.
2021-03-11 11:08:19 +01:00
|
|
|
|
2021-03-12 Clément Chigot <clement.chigot@atos.net>
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (ppc_xcoff_text_section, ppc_xcoff_data_section,
|
|
|
|
|
(ppc_xcoff_bss_section, ppc_xcoff_tdata_section,
|
|
|
|
|
(ppc_xcoff_tbss_section): New variables.
|
|
|
|
|
(ppc_text_subsegment, ppc_text_csects, ppc_data_subgments,
|
|
|
|
|
(ppc_data_csects): Removed.
|
|
|
|
|
(ppc_xcoff_section_is_initialized, ppc_init_xcoff_section,
|
|
|
|
|
ppc_xcoff_parse_cons): New functions.
|
|
|
|
|
(md_being): Initialize XCOFF sections.
|
|
|
|
|
(ppc_xcoff_suffix): Add support for TLS relocations
|
|
|
|
|
(fixup_size, md_apply_fix): Add support for new BFD_RELOC.
|
|
|
|
|
(ppc_change_csect): Handle XMC_TL, XMC_UL. Correctly, add XMC_BS
|
|
|
|
|
to .bss section. Handle new XCOFF section variables.
|
|
|
|
|
(ppc_comm): Likewise.
|
|
|
|
|
(ppc_toc): Likewise.
|
|
|
|
|
(ppc_symbol_new_hook): Likewise.
|
|
|
|
|
(ppc_frob_symbol): Likewise.
|
|
|
|
|
(ppc_fix_adjustable): Add tbss support.
|
|
|
|
|
* config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): New define.
|
|
|
|
|
(ppc_xcoff_parse_cons): Add prototype.
|
|
|
|
|
(struct ppc_xcoff_section): New structure.
|
|
|
|
|
|
2021-03-11 11:08:19 +01:00
|
|
|
|
2021-03-12 Clément Chigot <clement.chigot@atos.net>
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (ppc_xcoff_suffix): New function.
|
|
|
|
|
(MAP, MAP32, MAP64): New macros for XCOFF.
|
|
|
|
|
(ppc_xcoff_fixup_addis): New function.
|
|
|
|
|
(ppc_is_toc_sym): Handle XMC_TE.
|
|
|
|
|
(fixup_size): Add cases for BFD_RELOC_PPC_TOC16_HI and
|
|
|
|
|
BFD_RELOC_PPC_TOC16_LO.
|
|
|
|
|
(md_assemble): Call ppc_xcoff_fixup_addis for XCOFF.
|
|
|
|
|
(ppc_change_csect): Handle XMC_TE.
|
|
|
|
|
(ppc_tc): Enable .tc symbols to have only a XMC_TC or XMC_TE
|
|
|
|
|
storage class.
|
|
|
|
|
(ppc_symbol_new_hook): Handle XMC_TE.
|
|
|
|
|
(ppc_frob_symbol): Likewise.
|
|
|
|
|
(ppc_fix_adjustable): Likewise.
|
|
|
|
|
(md_apply_fix): Handle BFD_RELOC_PPC_TOC16_HI and
|
|
|
|
|
BFD_RELOC_PPC_TOC16_LO.
|
|
|
|
|
|
2021-03-10 08:20:29 +01:00
|
|
|
|
2021-03-10 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/avx512f-intel.d,
|
|
|
|
|
testsuite/gas/i386/avx512f_vl-intel.d,
|
|
|
|
|
testsuite/gas/i386/avx512pf-intel.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512f-intel.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512f_vl-intel.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512pf-intel.d: Adjust expectations.
|
|
|
|
|
|
2021-03-10 08:14:11 +01:00
|
|
|
|
2021-03-10 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/prefetch.d,
|
|
|
|
|
testsuite/gas/i386/prefetch-intel.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-prefetch.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-prefetch-intel.d: Adjust expectations.
|
|
|
|
|
* testsuite/gas/i386/nops-8.s, testsuite/gas/i386/nops-8.d: New.
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new test.
|
|
|
|
|
|
2021-03-09 08:54:32 +01:00
|
|
|
|
2021-03-09 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (check_hle): Replace HLEPrefix* by Prefix*.
|
|
|
|
|
(md_assemble): Replace use of repprefixok, islockable, and
|
|
|
|
|
notrackprefixok.
|
|
|
|
|
(i386_index_check): Replace use of repprefixok.
|
|
|
|
|
|
2021-03-09 08:53:38 +01:00
|
|
|
|
2021-03-09 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/noreg64.s: Add sysexit.
|
|
|
|
|
* testsuite/gas/i386/x86-64-sysenter-amd.s: Split sysexit into
|
|
|
|
|
sysexitl and sysexitq.
|
|
|
|
|
* testsuite/gas/i386/noreg-intel64.l,
|
|
|
|
|
testsuite/gas/i386/noreg64-data16.d,
|
|
|
|
|
testsuite/gas/i386/noreg64-data16.e,
|
|
|
|
|
testsuite/gas/i386/noreg64-rex64.d,
|
|
|
|
|
testsuite/gas/i386/noreg64.d,
|
|
|
|
|
testsuite/gas/i386/noreg64.l,
|
|
|
|
|
testsuite/gas/i386/x86-64-sysenter-amd.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-sysenter-amd.l,
|
|
|
|
|
testsuite/gas/i386/x86-64-sysenter-intel.d: Adjust expectations.
|
|
|
|
|
|
2021-02-26 16:37:30 +00:00
|
|
|
|
2021-02-26 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
PR 27411
|
|
|
|
|
* config/tc-arm.c (do_t_add_sub): Correct error message.
|
|
|
|
|
* testsuite/gas/arm/pr27411.s: New test.
|
|
|
|
|
* testsuite/gas/arm/pr27411.d: New test driver.
|
|
|
|
|
* testsuite/gas/arm/pr27411.l: Expected error output for new test.
|
|
|
|
|
|
PR23691, gas .y files vs. automatic make dependencies
A number of targets, bfin, rl78, rx, can show odd failures when
bfd/reloc.c changes BFD_RELOC_* enum values, if recompiling over a
build dir with existing objects. The problem is caused by
bfin-parse.o and similar not being recompiled and so using stale
BFD_RELOC_* values. This isn't fixed by making bfin-parse.c depend on
bfd/reloc.c, which isn't necessary anyway. bfin-parse.o should have
been recompiled due to bfd/bfd.h changing when extracted bfd/reloc.c
BFD_RELOC_* values change, but that wasn't happening. The problem is
that automake generates a makefile that loads gas/config/.deps/
dependency file for objects with corresponding sources mentioned in
EXTRA_as_new_SOURCES. Unless we want to mess around generating
explicit dependencies, I think that mean moving some object files to
the build gas/config/. This patch does that, removing some hacks for
m68k-parse.c that should no longer be necessary, and removes some
rules that catered to old bison producing code that triggers compiler
warnings.
PR 23691
* Makefile.am (TARGET_CPU_CFILES): Split off config/xtensa-relax.c..
(TARGET_CPU_HFILES): ..and config/xtensa-relax.h..
(TARGET_EXTRA_FILES): ..to here. Add config/bfin-lex-wrapper.c,
and use alongside TARGET_CPU_CFILES.
(EXTRA_DIST): Update location of generated .c files.
(config/m68k-parse.c): New rule replacing m68k-parse.c rule.
(config/bfin-parse.c, config/rl78-parse.cm config/rx-parse.c),
(config/bfin-lex.c, config/bfin-lex-wrapper.@OBJEXT@): Similarly.
(itbl-lex-wrapper.@OBJEXT@): Simplify to just the needed
dependencies.
(itbl-parse.@OBJEXT@): Delete rule using NO_WERROR.
(itbl-parse.c, itbl-parse.h): Tidy.
* config/bfin-lex-wrapper.c: Include config/bfin-lex.c.
* config/bfin-lex.l: Include config/bfin-parse.h.
* configure.ac (extra_objects): Move object files corresponding
to .y and .l files now in config/ to config/.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
2021-02-23 21:54:25 +10:30
|
|
|
|
2021-02-24 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 23691
|
|
|
|
|
* Makefile.am (TARGET_CPU_CFILES): Split off config/xtensa-relax.c..
|
|
|
|
|
(TARGET_CPU_HFILES): ..and config/xtensa-relax.h..
|
|
|
|
|
(TARGET_EXTRA_FILES): ..to here. Add config/bfin-lex-wrapper.c,
|
|
|
|
|
and use alongside TARGET_CPU_CFILES.
|
|
|
|
|
(EXTRA_DIST): Update location of generated .c files.
|
|
|
|
|
(config/m68k-parse.c): New rule replacing m68k-parse.c rule.
|
|
|
|
|
(config/bfin-parse.c, config/rl78-parse.cm config/rx-parse.c),
|
|
|
|
|
(config/bfin-lex.c, config/bfin-lex-wrapper.@OBJEXT@): Similarly.
|
|
|
|
|
(itbl-lex-wrapper.@OBJEXT@): Simplify to just the needed
|
|
|
|
|
dependencies.
|
|
|
|
|
(itbl-parse.@OBJEXT@): Delete rule using NO_WERROR.
|
|
|
|
|
(itbl-parse.c, itbl-parse.h): Tidy.
|
|
|
|
|
* config/bfin-lex-wrapper.c: Include config/bfin-lex.c.
|
|
|
|
|
* config/bfin-lex.l: Include config/bfin-parse.h.
|
|
|
|
|
* configure.ac (extra_objects): Move object files corresponding
|
|
|
|
|
to .y and .l files now in config/ to config/.
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
2021-02-19 10:14:09 +00:00
|
|
|
|
2021-02-19 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_ip): Fix compile time warnings about
|
|
|
|
|
misleading indentation.
|
|
|
|
|
|
2021-01-26 18:02:38 +08:00
|
|
|
|
2021-02-19 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
PR 27158
|
|
|
|
|
* config/tc-riscv.c (riscv_ip): Updated encoding macros.
|
|
|
|
|
(md_apply_fix): Likewise.
|
|
|
|
|
(md_convert_frag_branch): Likewise.
|
|
|
|
|
(validate_riscv_insn): Likewise. Also arranged operands, including
|
|
|
|
|
added C5 and C6 operands, and removed unused Ci and C< operands.
|
|
|
|
|
* doc/c-riscv.texi: Updated and added CSS/CL/CS types.
|
|
|
|
|
* testsuite/gas/riscv/insn.d: Added CSS/CL/CS instructions.
|
|
|
|
|
* testsuite/gas/riscv/insn.s: Likewise.
|
|
|
|
|
|
2021-01-28 10:45:56 +08:00
|
|
|
|
2021-02-18 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c: Included cpu-riscv.h.
|
|
|
|
|
(enum riscv_csr_clas): Moved from include/opcode/riscv.h.
|
|
|
|
|
(struct riscv_csr_extra): Likewise.
|
|
|
|
|
(struct riscv_ext_version): Likewise.
|
|
|
|
|
(ext_version_table): Moved from opcodes/riscv-opc.c.
|
|
|
|
|
(default_isa_spec): Updated type to riscv_spec_class.
|
|
|
|
|
(default_priv_spec): Likewise.
|
|
|
|
|
(riscv_set_default_isa_spec): Updated.
|
|
|
|
|
(init_ext_version_hash): Likewise.
|
|
|
|
|
(riscv_init_csr_hash): Likewise, also fixed indent.
|
|
|
|
|
|
2021-02-17 16:48:41 +10:30
|
|
|
|
2021-02-17 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/elf/section28.d: xfail h8300.
|
|
|
|
|
|
2021-02-16 04:55:42 -08:00
|
|
|
|
2021-02-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR gas/27412
|
|
|
|
|
* config/obj-elf.c (obj_elf_change_section): Strip SHF_GNU_RETAIN
|
|
|
|
|
when checking incorrect section attributes.
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run section28 and section29.
|
|
|
|
|
* testsuite/gas/elf/section28.d: New file.
|
|
|
|
|
* testsuite/gas/elf/section28.s: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section29.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section29.s: Likewise.
|
|
|
|
|
|
2021-02-16 11:34:25 +01:00
|
|
|
|
2021-02-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/sse-check.s,
|
|
|
|
|
testsuite/gas/i386/sse2avx.s,
|
|
|
|
|
testsuite/gas/i386/x86-64-sse2avx.s: Add CVTPI2PD cases.
|
|
|
|
|
* testsuite/gas/i386/sse-check-error.l,
|
|
|
|
|
testsuite/gas/i386/sse-check-warn.e,
|
|
|
|
|
testsuite/gas/i386/sse-check.d,
|
|
|
|
|
testsuite/gas/i386/sse2avx.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-sse-check-error.l,
|
|
|
|
|
testsuite/gas/i386/x86-64-sse2avx.d: Adjust expecations.
|
|
|
|
|
* testsuite/gas/i386/property-cvtpi2pd.s,
|
|
|
|
|
testsuite/gas/i386/property-cvtpi2pd.d,
|
|
|
|
|
testsuite/gas/i386/property-cvtpi2ps.s,
|
|
|
|
|
testsuite/gas/i386/property-cvtpi2ps.d: New.
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new tests.
|
|
|
|
|
|
2021-02-16 11:33:04 +01:00
|
|
|
|
2021-02-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Use template rather than
|
|
|
|
|
actuals when updating i.xstate.
|
|
|
|
|
* testsuite/gas/i386/property-4.d,
|
|
|
|
|
testsuite/gas/i386/property-5.d,
|
|
|
|
|
testsuite/gas/i386/property-12.d: Adjust expectations.
|
|
|
|
|
|
2021-02-16 11:32:18 +01:00
|
|
|
|
2021-02-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (output_insn): Handle ldmxcsr, stmxcsr,
|
|
|
|
|
vldmxcsr, vstmxcsr, vzeroall, and vzeroupper.
|
|
|
|
|
* testsuite/gas/i386/property-ldmxcsr.s,
|
|
|
|
|
testsuite/gas/i386/property-ldmxcsr.d,
|
|
|
|
|
testsuite/gas/i386/property-vldmxcsr.s,
|
|
|
|
|
testsuite/gas/i386/property-vldmxcsr.d,
|
|
|
|
|
testsuite/gas/i386/property-vzeroall.s,
|
|
|
|
|
testsuite/gas/i386/property-vzeroall.d: New.
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new tests.
|
|
|
|
|
|
2021-02-16 11:30:49 +01:00
|
|
|
|
2021-02-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Move bitness-independent property
|
|
|
|
|
tests to bitness independent section.
|
|
|
|
|
* testsuite/gas/i386/x86-64-property-2.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-property-3.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-property-4.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-property-5.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-property-6.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-property-10.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-property-11.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-property-12.d,
|
|
|
|
|
testsuite/gas/i386/x86-64-property-13.d: Delete.
|
|
|
|
|
|
2021-02-16 11:26:58 +01:00
|
|
|
|
2021-02-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/enqcmd-16bit.s: Include enqcmd.s, not
|
|
|
|
|
movdir.s.
|
|
|
|
|
* testsuite/gas/i386/enqcmd-16bit.d: Adjust expectations.
|
|
|
|
|
|
2021-02-16 14:39:04 +10:30
|
|
|
|
2021-02-16 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 27426
|
|
|
|
|
* dwarf2dbg.c (allocate_filename_to_slot): Allocate the dirs array
|
|
|
|
|
in another place.
|
|
|
|
|
|
2021-02-16 14:32:36 +10:30
|
|
|
|
2021-02-16 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* read.c (demand_copy_C_string): Really check for embedded zeros.
|
|
|
|
|
|
2021-02-15 14:20:00 +01:00
|
|
|
|
2021-02-15 Andreas Krebbel <krebbel@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (s390_parse_cpu): New entry for arch14.
|
|
|
|
|
* doc/c-s390.texi: Document arch14 march option.
|
|
|
|
|
* testsuite/gas/s390/s390.exp: Run the arch14 related tests.
|
|
|
|
|
* testsuite/gas/s390/zarch-arch14.d: New test.
|
|
|
|
|
* testsuite/gas/s390/zarch-arch14.s: New test.
|
|
|
|
|
|
2021-02-12 14:52:22 +00:00
|
|
|
|
2021-02-12 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mach-o/sections-1.d: Stop automatic debug link
|
|
|
|
|
following.
|
|
|
|
|
* testsuite/gas/xgate/insns-dwarf2.d: Likewise.
|
|
|
|
|
|
2021-02-12 11:41:16 +10:30
|
|
|
|
2021-02-12 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/pr27381.err: Don't match source file name.
|
|
|
|
|
* testsuite/gas/all/pr27381.s: Don't start directive in first column.
|
|
|
|
|
* testsuite/gas/all/pr27384.err: Don't match source file name.
|
|
|
|
|
Adjust line number.
|
|
|
|
|
* testsuite/gas/all/pr27384.s: Add ".text" directive.
|
|
|
|
|
* testsuite/gas/elf/pr27355.err: Don't match source file name.
|
|
|
|
|
|
2021-02-10 12:36:52 +10:30
|
|
|
|
2021-02-11 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention arm-symbianelf removal.
|
|
|
|
|
|
2021-02-10 09:56:33 +00:00
|
|
|
|
2021-02-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* listing.c (buffer_line): Remove debugging code accidentally
|
|
|
|
|
included with the fix for PR 27384.
|
|
|
|
|
|
2021-02-09 14:22:23 +00:00
|
|
|
|
2021-02-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
PR 27381
|
|
|
|
|
* read.c (s_incbin): Check that the file to be included is a
|
|
|
|
|
regular, non-directory file.
|
|
|
|
|
* testsuite/gas/all/pr27381.s: New test source file.
|
|
|
|
|
* testsuite/gas/all/pr27381.d: New test control file.
|
|
|
|
|
* testsuite/gas/all/pr27381.err: Expected error output for the new test.
|
|
|
|
|
* testsuite/gas/all/gas.exp: Run the new test.
|
|
|
|
|
|
2021-02-08 21:06:17 +10:30
|
|
|
|
2021-02-09 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.am (TARG_ENV_HFILES): Remove config/te-symbian.h.
|
|
|
|
|
* config/tc-arm.c (elf32_arm_target_format): Remove TE_SYMBIAN
|
|
|
|
|
support.
|
|
|
|
|
* config/te-symbian.h: Delete.
|
|
|
|
|
* configure.tgt: Remove arm-*-symbianelf*.
|
|
|
|
|
* testsuite/gas/arm/arch4t-eabi.d: Don't mention symbianelf in
|
|
|
|
|
target selection.
|
|
|
|
|
* testsuite/gas/arm/arch4t.d: Likewise.
|
|
|
|
|
* testsuite/gas/arm/got_prel.d: Likewise.
|
|
|
|
|
* testsuite/gas/arm/mapdir.d: Likewise.
|
|
|
|
|
* testsuite/gas/arm/mapmisc.d: Likewise.
|
|
|
|
|
* testsuite/gas/arm/mapsecs.d: Likewise.
|
|
|
|
|
* testsuite/gas/arm/mapshort-eabi.d: Likewise.
|
|
|
|
|
* testsuite/gas/arm/thumb-eabi.d: Likewise.
|
|
|
|
|
* testsuite/gas/arm/thumb.d: Likewise.
|
|
|
|
|
* testsuite/gas/arm/thumbrel.d: Likewise.
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
2021-02-09 12:53:32 +00:00
|
|
|
|
2021-02-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
PR 27384
|
|
|
|
|
* listing.c (listing_psize): Check the result of the width
|
|
|
|
|
expression before assigning it to paper_width.
|
|
|
|
|
* testsuite/gas/all/pr27384.s: New test source file.
|
|
|
|
|
* testsuite/gas/all/pr27384.d: New test control file.
|
|
|
|
|
* testsuite/gas/all/pr27384.err: Expected errors from new test.
|
|
|
|
|
* testsuite/gas/all/gas.exp: Run the new test.
|
|
|
|
|
|
2021-02-09 10:51:40 +00:00
|
|
|
|
2021-02-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
PR 27355
|
|
|
|
|
* testsuite/gas/elf/pr27355.s: New test source file.
|
|
|
|
|
* testsuite/gas/elf/pr27355.d: New test control file.
|
|
|
|
|
* testsuite/gas/elf/pr27355.err: Expected errors from new test.
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run the new test.
|
|
|
|
|
|
2021-01-16 01:00:45 -05:00
|
|
|
|
2021-02-08 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
* config/tc-tic54x (tic54x_mmregs): Rename to ...
|
|
|
|
|
(tic54x_register_mmregs): ... this. Change mmregs to tic54x_mmregs.
|
|
|
|
|
(md_pseudo_table): Change tic54x_mmregs to tic54x_register_mmregs.
|
|
|
|
|
(md_begin): Add tic54x_ prefix to regs, mmregs, condition_codes,
|
|
|
|
|
cc2_codes, cc3_codes, status_bits, and misc_symbols.
|
|
|
|
|
|
2021-02-08 18:31:21 +00:00
|
|
|
|
2021-02-08 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
PR 27355
|
|
|
|
|
* dwarf2dbg.c (allocate_filename_to_slot): Allocate the dirs array
|
|
|
|
|
if it has not already been created.
|
|
|
|
|
|
2021-02-04 16:15:03 +08:00
|
|
|
|
2021-02-04 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_multi_subset_supports): Removed
|
|
|
|
|
INSN_CLASS_ZB*.
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns-32.d: Removed.
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns-64.d: Removed.
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns.s: Removed.
|
|
|
|
|
|
2021-02-03 12:01:12 +01:00
|
|
|
|
2021-02-03 Andreas Krebbel <krebbel@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
* doc/c-s390.texi: Document vector instruction formats.
|
|
|
|
|
|
2021-02-01 17:31:47 +00:00
|
|
|
|
2021-02-01 Emery Hemingway <ehmry@posteo.net>
|
|
|
|
|
|
|
|
|
|
* configure.tgt: Add *-*-genode* as a target for AArch64 and x86.
|
|
|
|
|
|
2021-01-31 12:02:54 +10:30
|
|
|
|
2021-02-01 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 27283
|
|
|
|
|
* config/tc-alpha.c (insert_operand): Delete dead code.
|
|
|
|
|
|
2021-01-26 08:18:39 -08:00
|
|
|
|
2021-01-26 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR gas/27243
|
|
|
|
|
* config/tc-nios2.c (md_begin): Don't disable relaxation with
|
|
|
|
|
--gdwarf-N.
|
|
|
|
|
* testsuite/gas/nios2/relax.d: New file.
|
|
|
|
|
* testsuite/gas/nios2/relax.s: Likewise.
|
|
|
|
|
|
2021-01-25 22:53:31 +10:30
|
|
|
|
2021-01-26 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/local-label-overflow.d: Use xfail rather than
|
|
|
|
|
notarget all except hppa. Comment.
|
|
|
|
|
* testsuite/gas/all/sleb128-2.d: Use xfail rather than notarget.
|
|
|
|
|
* testsuite/gas/all/sleb128-4.d: Likewise. Don't skip msp430.
|
|
|
|
|
* testsuite/gas/all/sleb128-5.d: Use xfail rather than notarget.
|
|
|
|
|
* testsuite/gas/all/sleb128-7.d: Likewise.
|
|
|
|
|
* testsuite/gas/all/sleb128-9.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/bignums.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/group0c.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/group1a.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section-symbol-redef.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section15.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section4.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section7.d: Likewise.
|
|
|
|
|
* testsuite/gas/macros/irp.d: Likewise.
|
|
|
|
|
* testsuite/gas/macros/repeat.d: Likewise.
|
|
|
|
|
* testsuite/gas/macros/rept.d: Likewise.
|
|
|
|
|
* testsuite/gas/macros/test2.d: Likewise.
|
|
|
|
|
* testsuite/gas/macros/vararg.d: Likewise.
|
|
|
|
|
* testsuite/gas/all/string.d: Use xfail rather than skip.
|
|
|
|
|
* testsuite/gas/elf/missing-build-notes.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section0.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section1.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section10.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section11.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/section6.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/symtab.d: Use xfail rather than skip, adjust hppa.
|
|
|
|
|
* testsuite/gas/elf/symtab.s: Don't start directives in first column.
|
|
|
|
|
* testsuite/gas/macros/test3.d: Don't notarget nds32.
|
|
|
|
|
|
2021-01-25 15:18:55 +10:30
|
|
|
|
2021-01-26 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/byte.d,
|
|
|
|
|
* testsuite/gas/all/byte.l,
|
|
|
|
|
* testsuite/gas/all/byte.s: Delete.
|
|
|
|
|
* testsuite/gas/all/gas.exp: Don't run byte test.
|
|
|
|
|
|
2021-01-25 15:17:15 +10:30
|
|
|
|
2021-01-26 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 27282
|
|
|
|
|
* testsuite/gas/all/none.d: Replace skip with xfail, don't xfail ft32.
|
|
|
|
|
* testsuite/gas/elf/pr27228.d: xfail hppa and allow OBJECT match.
|
|
|
|
|
|
2021-01-24 04:14:30 -08:00
|
|
|
|
2021-01-24 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR gas/27228
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run pr27228.
|
|
|
|
|
* testsuite/gas/elf/pr27228.d: New file.
|
|
|
|
|
* testsuite/gas/elf/pr27228.s: Likewise.
|
|
|
|
|
|
2021-01-24 12:39:07 +10:30
|
|
|
|
2021-01-24 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 27228
|
|
|
|
|
* write.c (resolve_reloc_expr_symbols): Don't assume local symbol
|
|
|
|
|
is defined.
|
|
|
|
|
|
2021-01-21 16:50:02 +10:30
|
|
|
|
2021-01-21 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 27221
|
|
|
|
|
* dwarf2dbg.c (dwarf2_gen_line_info_1): Don't warn about ignored
|
|
|
|
|
line number info when gas is generating it.
|
|
|
|
|
* testsuite/gas/elf/dwarf2-20.d: Adjust to not expect warnings.
|
|
|
|
|
* testsuite/gas/m68hc11/indexed12.d: Likewise.
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Don't run warn-2.
|
|
|
|
|
* gas/testsuite/gas/elf/warn-2.s: Delete.
|
|
|
|
|
|
2021-01-21 16:46:20 +10:30
|
|
|
|
2021-01-21 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 27218
|
|
|
|
|
* dwarf2dbg.c (dwarf2_gen_line_info): Correct setting of dwarf_level.
|
|
|
|
|
(dwarf2_directive_filename, dwarf2_directive_loc): Likewise, and
|
|
|
|
|
error for negative file numbers.
|
|
|
|
|
|
2021-01-20 15:55:46 +10:30
|
|
|
|
2021-01-20 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/power4.d: Adjust for removal of section sym.
|
|
|
|
|
* testsuite/gas/ppc/test1elf32.d: Likewise.
|
|
|
|
|
* testsuite/gas/ppc/test1elf64.d: Likewise.
|
|
|
|
|
|
2021-01-18 06:25:05 -08:00
|
|
|
|
2021-01-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR gas/27195
|
|
|
|
|
* dwarf2dbg.c (dwarf2_gen_line_info): Set dwarf_level to 5 if
|
|
|
|
|
needed.
|
|
|
|
|
(dwarf2_directive_filename): Likewise.
|
|
|
|
|
(dwarf2_directive_loc): Likewise.
|
|
|
|
|
* testsuite/gas/elf/dwarf-5-file0.d: Pass --gdwarf-3.
|
|
|
|
|
* testsuite/gas/lns/lns-diag-1.l: Remove the
|
|
|
|
|
"Error: file number less than one" errors.
|
|
|
|
|
|
2021-01-18 09:38:22 +10:30
|
|
|
|
2021-01-18 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 27198
|
|
|
|
|
* config/tc-i386.c (need_plt32_p): Return FALSE for NULL symbol.
|
|
|
|
|
* testsuite/gas/i386/pr27198.d,
|
|
|
|
|
* gas/testsuite/gas/i386/pr27198.err,
|
|
|
|
|
* gas/testsuite/gas/i386/pr27198.s: New test.
|
|
|
|
|
* gas/testsuite/gas/i386/i386.exp: Run it.
|
|
|
|
|
|
2021-01-15 09:36:51 +08:00
|
|
|
|
2021-01-15 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c: Indent and GNU coding standards tidy,
|
|
|
|
|
also aligned the code.
|
|
|
|
|
* config/tc-riscv.h: Likewise.
|
|
|
|
|
|
2021-01-13 16:52:14 +08:00
|
|
|
|
2021-01-15 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c: Error and warning messages tidy.
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-fext.l: Updated.
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
|
|
|
|
|
|
2021-01-13 10:05:48 +08:00
|
|
|
|
2021-01-15 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c: Comments tidy and improvement. Also update
|
|
|
|
|
comment "fallthru" to "Fall through" that end with a period and
|
|
|
|
|
two spaces.
|
|
|
|
|
|
2021-01-13 22:14:10 -05:00
|
|
|
|
2021-01-14 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
* doc/as.texi: Delete @ifset ELF wrapping around [248]byte entries.
|
|
|
|
|
Delete warning that these are only available with ELF targets.
|
|
|
|
|
* obj-elf.c (elf_pseudo_table): Move 2byte/4byte/8byte entries ...
|
|
|
|
|
* read.c (potable): ... here.
|
|
|
|
|
|
2021-01-14 01:03:54 -05:00
|
|
|
|
2021-01-14 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
* Makefile.am (bfin-lex-wrapper.@OBJEXT@): Delete $(NO_WERROR).
|
|
|
|
|
* Makefile.in: Regenerated.
|
|
|
|
|
|
2021-01-14 00:51:59 -05:00
|
|
|
|
2021-01-14 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
* bfin-lex.l (YY_NO_INPUT, YY_NO_UNPUT): Define.
|
|
|
|
|
(parse_int): Mark char_bag const.
|
|
|
|
|
|
2021-01-13 05:42:11 -08:00
|
|
|
|
2021-01-13 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR gas/27178
|
|
|
|
|
* config/tc-i386.c (lex_got::gotrel): Add need_GOT_symbol.
|
|
|
|
|
Don't generate GOT_symbol for PLT relocations.
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run PR gas/27178 tests.
|
|
|
|
|
* testsuite/gas/i386/no-got.d: New file.
|
|
|
|
|
* testsuite/gas/i386/no-got.s: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-no-got.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-no-got.s: Likewise.
|
|
|
|
|
|
2021-01-13 19:13:23 +10:30
|
|
|
|
2021-01-13 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
2021-01-12 05:45:28 -08:00
|
|
|
|
2021-01-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR binutils/26792
|
|
|
|
|
* configure.ac: Use GNU_MAKE_JOBSERVER.
|
|
|
|
|
* aclocal.m4: Regenerated.
|
|
|
|
|
* configure: Likewise.
|
|
|
|
|
|
2021-01-12 13:18:50 +00:00
|
|
|
|
2021-01-12 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* po/fr.po: Updated French translation.
|
|
|
|
|
|
2021-01-11 16:29:31 -08:00
|
|
|
|
2021-01-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR ld/27173
|
|
|
|
|
* configure: Regenerated.
|
|
|
|
|
|
2021-01-05 17:39:04 +00:00
|
|
|
|
2021-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
|
|
|
|
|
|
|
|
|
* NEWS: Remove CSRE.
|
|
|
|
|
* config/tc-aarch64.c (parse_csr_operand): Delete.
|
|
|
|
|
(parse_operands): Delete handling of
|
|
|
|
|
AARCH64_OPND_CSRE_CSR.
|
|
|
|
|
(aarch64_features): Remove csre.
|
|
|
|
|
* doc/c-aarch64.texi: Remove CSRE.
|
|
|
|
|
* testsuite/gas/aarch64/csre.d: Delete.
|
|
|
|
|
* testsuite/gas/aarch64/csre-invalid.s: Likewise.
|
|
|
|
|
* testsuite/gas/aarch64/csre-invalid.d: Likewise.
|
|
|
|
|
* testsuite/gas/aarch64/csre_csr.s: Likewise.
|
|
|
|
|
* testsuite/gas/aarch64/csre_csr.d: Likewise.
|
|
|
|
|
* testsuite/gas/aarch64/csre_csr-invalid.s: Likewise.
|
|
|
|
|
* testsuite/gas/aarch64/csre_csr-invalid.l: Likewise.
|
|
|
|
|
* testsuite/gas/aarch64/csre_csr-invalid.d: Likewise.
|
|
|
|
|
|
2021-01-11 12:55:33 +00:00
|
|
|
|
2021-01-11 Nick Clifton <nickc@redhat.com>
|
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|
|
|
|
|
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|
|
* po/uk.po: Updated Ukranian translation.
|
|
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|
2021-01-09 06:47:58 -08:00
|
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|
|
2021-01-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
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|
|
* configure: Regenerated.
|
|
|
|
|
|
2021-01-09 11:01:01 +00:00
|
|
|
|
2021-01-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
* po/gas.pot: Regenerate.
|
|
|
|
|
|
2021-01-09 10:40:28 +00:00
|
|
|
|
2021-01-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
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|
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|
|
* 2.36 release branch crated.
|
|
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|
|
|
POWER10: Add Return-Oriented Programming instructions
POWER10 adds some return-oriented programming (ROP) instructions and
this patch adds support for them. You will notice that they are enabled
for POWER8 and later, not just POWER10 and later. This is on purpose.
This allows the instructions to be added to POWER8 binaries that can be
run on POWER8, POWER9 and POWER10 cpus. On POWER8 and POWER9, these
instructions just act as nop's.
opcodes/
* ppc-opc.c (insert_dw, (extract_dw): New functions.
(DW, (XRC_MASK): Define.
(powerpc_opcodes) <hashchk, hashchkp, hashst, haststp>: New mnemonics.
gas/
* testsuite/gas/ppc/rop-checks.d,
* testsuite/gas/ppc/rop-checks.l,
* testsuite/gas/ppc/rop-checks.s,
* testsuite/gas/ppc/rop.d,
* testsuite/gas/ppc/rop.s: New tests.
* testsuite/gas/ppc/ppc.exp: Run them.
2021-01-08 16:07:12 -06:00
|
|
|
|
2021-01-08 Peter Bergner <bergner@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/rop-checks.d,
|
|
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|
|
* testsuite/gas/ppc/rop-checks.l,
|
|
|
|
|
* testsuite/gas/ppc/rop-checks.s,
|
|
|
|
|
* testsuite/gas/ppc/rop.d,
|
|
|
|
|
* testsuite/gas/ppc/rop.s: New tests.
|
|
|
|
|
* testsuite/gas/ppc/ppc.exp: Run them.
|
|
|
|
|
|
2021-01-09 11:03:29 +10:30
|
|
|
|
2021-01-09 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
2021-01-07 16:47:36 +00:00
|
|
|
|
2021-01-07 Samuel Thibault <samuel.thibault@gnu.org>
|
|
|
|
|
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|
|
* configure: Regenerate.
|
|
|
|
|
|
2021-01-07 06:42:00 -08:00
|
|
|
|
2021-01-07 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR 27109
|
|
|
|
|
* read.c (s_reloc): Call symbol_mark_used_in_reloc on the
|
|
|
|
|
section symbol.
|
|
|
|
|
* subsegs.c (subseg_set_rest): Set BSF_SECTION_SYM_USED if needed.
|
|
|
|
|
* write.c (adjust_reloc_syms): Call symbol_mark_used_in_reloc
|
|
|
|
|
on the section symbol.
|
|
|
|
|
(set_symtab): Don't generate unused section symbols.
|
|
|
|
|
(maybe_generate_build_notes): Call symbol_mark_used_in_reloc
|
|
|
|
|
on the section symbol.
|
|
|
|
|
* config/obj-elf.c (elf_adjust_symtab): Call
|
|
|
|
|
symbol_mark_used_in_reloc on the group signature symbol.
|
|
|
|
|
* testsuite/gas/cfi/cfi-label.d: Remove unused section symbols
|
|
|
|
|
from expected output.
|
|
|
|
|
* testsuite/gas/elf/elf.exp (run_elf_list_test): Check
|
|
|
|
|
is_elf_unused_section_symbols.
|
|
|
|
|
* testsuite/gas/elf/section2.e: Updated.
|
|
|
|
|
* testsuite/gas/elf/section2.e-unused: New file.
|
|
|
|
|
* testsuite/gas/elf/symver.d: Remove unused section symbols.
|
|
|
|
|
* testsuite/gas/i386/ilp32/elf/symver.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-size-1.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-size-3.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-size-5.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-unwind.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/size-1.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/size-3.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/svr4.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-size-1.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-size-3.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-size-5.d: Likewise.
|
|
|
|
|
* testsuite/gas/i386/x86-64-unwind.d: Likewise.
|
|
|
|
|
|
2021-01-07 15:53:25 +08:00
|
|
|
|
2021-01-07 Philipp Tomsich <prt@gnu.org>
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_multi_subset_supports): Added
|
|
|
|
|
INSN_CLASS_ZIHINTPAUSE.
|
|
|
|
|
* testsuite/gas/riscv/pause.d: New testcase. Adding coverage for
|
|
|
|
|
the pause hint instruction.
|
|
|
|
|
* testsuite/gas/riscv/pause.s: Likewise.
|
|
|
|
|
|
2020-12-15 07:11:03 -08:00
|
|
|
|
2021-01-07 Claire Xenia Wolf <claire@symbioticeda.com>
|
|
|
|
|
Jim Wilson <jimw@sifive.com>
|
|
|
|
|
Andrew Waterman <andrew@sifive.com>
|
|
|
|
|
Maxim Blinov <maxim.blinov@embecosm.com>
|
|
|
|
|
Kito Cheng <kito.cheng@sifive.com>
|
|
|
|
|
Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_multi_subset_supports): Handle INSN_CLASS_ZB*.
|
|
|
|
|
(riscv_get_default_ext_version): Do not check the default_isa_spec when
|
|
|
|
|
the version defined in the riscv_opcodes table is ISA_SPEC_CLASS_DRAFT.
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns-32.d: New testcase.
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns-64.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns.s: Likewise.
|
|
|
|
|
|
2021-01-06 12:36:31 +10:30
|
|
|
|
2021-01-06 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/sparc/sparc.exp: Move 64-bit tests inside gas_64_check.
|
|
|
|
|
|
2021-01-06 11:53:33 +10:30
|
|
|
|
2021-01-06 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/macros/app1.d: xfail tic30.
|
|
|
|
|
* testsuite/gas/macros/app2.d: Likewise.
|
|
|
|
|
* testsuite/gas/macros/app3.d: Likewise.
|
|
|
|
|
* testsuite/gas/macros/app4.d: Likewise.
|
|
|
|
|
|
2021-01-05 22:50:37 +01:00
|
|
|
|
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
|
|
|
|
|
|
|
|
|
|
* doc/as.texi: Add -mlittle-endian and -mbig-endian to docs.
|
|
|
|
|
* doc/c-riscv.texi: Likewise.
|
|
|
|
|
|
2021-01-05 22:50:39 +01:00
|
|
|
|
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/riscv/li32.d: Accept bigriscv in addition
|
|
|
|
|
to littleriscv.
|
|
|
|
|
* testsuite/gas/riscv/li64.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/lla32.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/lla64.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/march-ok-g2.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/march-ok-g2_p1.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/march-ok-g2p0.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/march-ok-i2p0.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/march-ok-i2p0m2_a2f2.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/march-ok-nse-with-version.d: Likewise.
|
|
|
|
|
* testsuite/gas/riscv/march-ok-two-nse.d: Likewise.
|
|
|
|
|
|
RISC-V: Implement support for big endian targets.
RISC-V instruction/code is always little endian, but data might be
big-endian. Therefore, we can not use the original bfd_get/bfd_put
to get/put the code for big endian targets. Add new riscv_get_insn
and riscv_put_insn to always get/put code as little endian can resolve
the problem. Just remember to update them once we have supported
the 48-bit/128-bit instructions in the future patches.
bfd/
* config.bfd: Added targets riscv64be*-*-*, riscv32be*-*-* and
riscvbe*-*-*. Also added riscv_elf[32|64]_be_vec.
* configure.ac: Handle riscv_elf[32|64]_be_vec.
* configure: Regenerate.
* elfnn-riscv.c: Include <limits.h> and define CHAR_BIT for
riscv_is_insn_reloc.
(riscv_get_insn): RISC-V instructions are always little endian, but
bfd_get may be used for big-endian, so add new riscv_get_insn to handle
the insturctions.
(riscv_put_insn): Likewsie.
(riscv_is_insn_reloc): Check if we are relocaing an instruction.
(perform_relocation): Call riscv_is_insn_reloc to decide if we should
use riscv_[get|put]_insn or bfd_[get|put].
(riscv_zero_pcrel_hi_reloc): Use riscv_[get|put]_insn, bfd_[get|put]l32
or bfd_[get|put]l16 for code.
(riscv_elf_relocate_section): Likewise.
(riscv_elf_finish_dynamic_symbol): Likewise.
(riscv_elf_finish_dynamic_sections): Likewise.
(_bfd_riscv_relax_call): Likewise.
(_bfd_riscv_relax_lui): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_pc): Likewise.
(riscv_elf_object_p): Handled for big endian.
(TARGET_BIG_SYM, TARGET_BIG_NAME): Defined.
* targets.c: Add riscv_elf[32|64]_be_vec.
(_bfd_target_vector): Likewise.
gas/
* config/tc-riscv.c (riscv_target_format): Add elf64-bigriscv and
elf32-bigriscv.
(install_insn): Always write instructions as little endian.
(riscv_make_nops): Likewise.
(md_convert_frag_branch): Likewise.
(md_number_to_chars): Write data in target endianness.
(options, md_longopts): Add -mbig-endian and -mlittle-endian options.
(md_parse_option): Handle the endian options.
* config/tc-riscv.h: Only define TARGET_BYTES_BIG_ENDIAN if not
already defined.
* configure.tgt: Added riscv64be*, riscv32be*, riscvbe*.
ld/
* configure.tgt: Added riscvbe-*-*, riscv32be*-*-*, riscv64be*-*-*,
riscv32be*-*-linux*, and riscv64be*-*-linux*.
* Makefile.am: Added eelf32briscv.c, eelf32briscv_ilp32f.c and
eelf32briscv_ilp32.c.
* Makefile.in: Regenerate.
* emulparams/elf32briscv.sh: Added.
* emulparams/elf32briscv_ilp32.sh: Likewise.
* emulparams/elf32briscv_ilp32f.sh: Likewise.
* emulparams/elf64briscv.sh: Likewise.
* emulparams/elf64briscv_lp64.sh: Likewise.
* emulparams/elf64briscv_lp64f.sh: Likewise.
2021-01-05 22:50:32 +01:00
|
|
|
|
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_target_format): Add elf64-bigriscv and
|
|
|
|
|
elf32-bigriscv.
|
|
|
|
|
(install_insn): Always write instructions as little endian.
|
|
|
|
|
(riscv_make_nops): Likewise.
|
|
|
|
|
(md_convert_frag_branch): Likewise.
|
|
|
|
|
(md_number_to_chars): Write data in target endianness.
|
|
|
|
|
(options, md_longopts): Add -mbig-endian and -mlittle-endian options.
|
|
|
|
|
(md_parse_option): Handle the endian options.
|
|
|
|
|
* config/tc-riscv.h: Only define TARGET_BYTES_BIG_ENDIAN if not
|
|
|
|
|
already defined.
|
|
|
|
|
* configure.tgt: Added riscv64be*, riscv32be*, riscvbe*.
|
|
|
|
|
|
2021-01-04 12:37:49 -08:00
|
|
|
|
2021-01-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
PR ld/26256
|
|
|
|
|
* config/obj-elf.c (obj_elf_change_section): Also filter out
|
|
|
|
|
SHF_LINK_ORDER.
|
|
|
|
|
|
2021-01-04 11:16:21 +10:30
|
|
|
|
2021-01-04 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 27102
|
|
|
|
|
* symbols.c (S_SET_EXTERNAL): Revise section symbol warning
|
|
|
|
|
message and register symbol error message.
|
|
|
|
|
|
2021-01-04 08:53:37 +10:30
|
|
|
|
2021-01-04 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
PR 27101
|
|
|
|
|
* read.c (s_align): Use a large enough type for "align" to hold
|
|
|
|
|
the result of get_absolute_expression.
|
|
|
|
|
|
2021-01-01 14:21:52 +10:30
|
|
|
|
2021-01-01 Nicolas Boulenguez <nicolas@debian.org>
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c: Correct comment spelling.
|
|
|
|
|
* config/tc-riscv.c: Likewise.
|
|
|
|
|
* config/tc-s390.c: Correct comment grammar.
|
|
|
|
|
* doc/c-i386.texi: Correct spelling.
|
|
|
|
|
* doc/c-s390.texi: Correct grammar.
|
|
|
|
|
|
2021-01-01 09:28:58 +10:30
|
|
|
|
2021-01-01 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
Update year range in copyright notice of all files.
|
|
|
|
|
|
2021-01-01 00:47:36 +01:00
|
|
|
|
2021-01-01 Hans-Peter Nilsson <hp@bitrange.com>
|
|
|
|
|
|
|
|
|
|
* config/tc-mmix.h (md_single_noop_insn): Change to "swym 0".
|
|
|
|
|
|
2021-01-01 09:17:13 +10:30
|
|
|
|
For older changes see ChangeLog-2020
|
2016-01-01 21:14:31 +10:30
|
|
|
|
|
2021-01-01 09:17:13 +10:30
|
|
|
|
Copyright (C) 2021 Free Software Foundation, Inc.
|
2016-01-01 21:14:31 +10:30
|
|
|
|
|
|
|
|
|
Copying and distribution of this file, with or without modification,
|
|
|
|
|
are permitted in any medium without royalty provided the copyright
|
|
|
|
|
notice and this notice are preserved.
|
|
|
|
|
|
|
|
|
|
Local Variables:
|
|
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|
|
mode: change-log
|
|
|
|
|
left-margin: 8
|
|
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|
|
fill-column: 74
|
|
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|
|
version-control: never
|
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|
|
End:
|